INTEGRATED CIRCUITS DATA SHEET 74LVC2244A Octal buffer/line driver with 30 Ω series termination resistors; 5 V input/output tolerant; 3-state Product specification File under Integrated Circuits, IC24 1999 Sep 30 Philips Semiconductors Product specification Octal buffer/line driver with 30 Ω series termination resistors; 5 V input/output tolerant; 3-state 74LVC2244A FEATURES DESCRIPTION • 5 V tolerant inputs/outputs for interfacing with 5 V logic The 74LVC2244A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. • Wide supply voltage range of 1.2 to 3.6 V • CMOS low power consumption Inputs can be driven from either 3.3 or 5 V devices. In 3-state operation, outputs can handle 5 V. These features allow the use of these devices as translators in a mixed 3.3/5 V environment. • Direct interface with TTL levels • Integrated 30 Ω termination resistors. The 74LVC2244A is an octal non-inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Schmitt-trigger action at all inputs makes the circuit highly tolerant for slower input rise and fall times. The 74LVC2244A is designed with 30 Ω series termination resistors in both HIGH and LOW output stages to reduce line noise. QUICK REFERENCE DATA Ground = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns. SYMBOL PARAMETER tPHL/tPLH propagation delay 1An to 1Yn; 2An to 2Yn CI input capacitance CPD power dissipation capacitance per buffer CONDITIONS 4.0 5.0 pF VI = GND to VCC; note 1 25 pF 1. CPD is used to determine the dynamic power dissipation (PD in µW). fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; Σ(CL × VCC2 × fo) = sum of the outputs. 1999 Sep 30 2 UNIT CL = 50 pF; VCC = 3.3 V Note PD = CPD × VCC2 × fi + Σ(CL × VCC2 × fo) where: TYPICAL ns Philips Semiconductors Product specification Octal buffer/line driver with 30 Ω series termination resistors; 5 V input/output tolerant; 3-state 74LVC2244A FUNCTION TABLE See note 1. INPUT OUTPUT nOE nAn nYn L L L L H H H X Z Note 1. H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. ORDERING INFORMATION PACKAGE OUTSIDE NORTH AMERICA NORTH AMERICA TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE −40 to +85 °C 20 SO plastic SOT163-1 74LVC2244AD 74LVC2244AD 74LVC2244ADB 74LVC2244ADB 20 SSOP plastic SOT339-1 74LVC2244APW 74LVC2244APW DH 20 TSSOP plastic SOT360-1 PINNING PIN SYMBOL DESCRIPTION 1 1OE output enable input (active LOW) 2, 4, 6, 8 1A0 to 1A3 data inputs 3, 5, 7, 9 2Y0 to 2Y3 bus outputs 10 GND ground (0 V) 11, 13, 15, 17 2A3 to 2A0 data inputs 12, 14, 16, 18 1Y3 to 1Y0 bus outputs 19 2OE output enable input (active LOW) 20 VCC DC supply voltage 1999 Sep 30 3 Philips Semiconductors Product specification Octal buffer/line driver with 30 Ω series termination resistors; 5 V input/output tolerant; 3-state handbook, halfpage 1OE 1 20 VCC 1A0 2 19 2OE 2Y0 3 18 1Y0 1A1 4 17 2A0 74LVC2244A 16 1Y1 2Y1 5 2244 1A2 6 15 2A1 2Y2 7 14 1Y2 1A3 8 13 2A2 2Y3 9 12 1Y3 GND 10 11 2A3 handbook, halfpage 2 4 6 MNA357 8 1 Fig.1 Pin configuration. 17 15 handbook, halfpage 1 13 1Y0 1A1 1Y1 1A2 1Y2 1A3 1Y3 18 16 14 12 1OE 2A0 2Y0 2A1 2Y1 2A2 2Y2 2A3 2Y3 3 5 7 EN 2 18 4 16 6 14 8 12 19 1A0 11 19 9 2OE MNA360 EN 17 3 15 5 13 7 11 9 MNA359 Fig.3 IEC logic symbol. 1999 Sep 30 Fig.2 Functional diagram. 4 Philips Semiconductors Product specification Octal buffer/line driver with 30 Ω series termination resistors; 5 V input/output tolerant; 3-state 74LVC2244A RECOMMENDED OPERATING CONDITIONS SYMBOL VCC PARAMETER CONDITIONS MIN. MAX. UNIT DC supply voltage for max. speed performance 2.7 3.6 V for low-voltage applications 1.2 3.6 V 0 5.5 V 0 VCC V VI DC input voltage VO DC output voltage output HIGH or LOW state 0 5.5 V Tamb operating ambient temperature 3-state see DC and AC characteristics per device −40 +85 °C tr,tf input rise and fall times VCC = 1.2 to 2.7 V 0 20 ns/V VCC = 2.7 to 3.6 V 0 10 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0 V). SYMBOL PARAMETER VCC DC supply voltage CONDITIONS MIN. MAX. UNIT −0.5 +6.5 V IIK DC input diode current VI < 0 − −50 mA VI DC input voltage note 1 −0.5 +5.5 V IOK DC output diode current VO > VCC or VO < 0 − ±50 mA VO DC output voltage output HIGH or LOW note 1 −0.5 VCC + 0.5 V output 3-state note 1 −0.5 +6.5 V VO = 0 to VCC IO DC output diode current − ±50 mA ICC, IGND DC VCC or GND current − ±100 mA Tstg storage temperature −65 +150 °C Ptot power dissipation per package note 2 − 500 mW plastic shrink mini-pack (SSOP and note 3 TSSOP) − 500 mW plastic mini-pack (SO) Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. For SO package: above 70 °C the value of Ptot derates linearly with 8 mW/K. 3. For SSOP and TSSOP package: above 60 °C the value of Ptot derates linearly with 5.5 mW/K. 1999 Sep 30 5 Philips Semiconductors Product specification Octal buffer/line driver with 30 Ω series termination resistors; 5 V input/output tolerant; 3-state 74LVC2244A DC CHARACTERISTICS Over recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL −40 to +85 PARAMETER OTHER VIH Tamb (°C) HIGH-level input voltage VCC (V) MIN. VOH VOL LOW-level input voltage HIGH-level output voltage − − − − − GND 2.7 to 3.6 − − 0.8 LOW-level output voltage 1.2 VI = VIH or VIL; IO = −6 mA TYP.(1) MAX. − 1.2 VCC 2.7 to 3.6 2.0 VIL UNIT 2.7 VCC − 0.5 − − VI = VIH or VIL; IO = −100 µA 3.0 VCC − 0.2 VCC − VI = VIH or VIL; IO = −12 mA 3.0 VCC − 0.8 − − VI = VIH or VIL; IO = 6 mA 2.7 − − 0.40 VI = VIH or VIL; IO = 100 µA 3.0 − − 0.20 V V V V VI = VIH or VIL; IO = 12 mA 3.0 − − 0.55 II input leakage current VI = 5.5 V or GND 3.6 − ±0.1 ±5 µA IOZ 3-state output OFF-state current VI = VIH or VIL; VO = 5.5 V or GND 3.6 − 0.1 ±10 µA Ioff power off leakage supply VI or VO = 5.5 V 0.0 − 0.1 ±10 µA ICC quiescent supply current VI = VCC or GND; IO = 0 3.6 − 0.1 20 µA ∆ICC additional quiescent supply current per control pin VI = VCC − 0.6 V; IO = 0 2.7 to 3.6 − 5 500 µA Note 1. All typical values are at VCC = 3.3 V and Tamb = 25 °C. 1999 Sep 30 6 Philips Semiconductors Product specification Octal buffer/line driver with 30 Ω series termination resistors; 5 V input/output tolerant; 3-state 74LVC2244A AC CHARACTERISTICS Ground = 0 V; tr = tf ≤ 2.5 ns. SYMBOL PARAMETER VCC = 3.3 ±0.3 V WAVEFORMS MIN. TYP.(1) MAX. VCC = 2.7 V MIN. UNIT MAX. tPHL/tPLH propagation delay 1An to 1Yn; 2An to 2Yn see Figs 4 and 6 1.5 4.0 6.5 1.5 7.5 ns tPZH/tPZL 3-state output enable time 1OE to 1Yn; 2OE to 2Yn see Figs 5 and 6 1.5 4.4 8.1 1.5 9.1 ns tPHZ/tPLZ 3-state output disable time 1OE to 1Yn; 2OE to 2Yn see Figs 5 and 6 1.5 3.8 5.4 1.5 6.4 ns Note 1. Typical values at VCC = 3.3 V and Tamb = 25 °C. AC WAVEFORMS handbook, halfpage VI 1An, 2An VM input GND tPHL tPLH VOH 1Yn, 2Yn VM output VOL MNA361 VM = 1.5 V at VCC ≥ 2.7 V; VM = 0.5 VCC at VCC < 2.7 V; VOL and VOH are typical output voltage drop that occur with the output load. Fig.4 The input nAn to output nYn propagation delays. 1999 Sep 30 7 Philips Semiconductors Product specification Octal buffer/line driver with 30 Ω series termination resistors; 5 V input/output tolerant; 3-state 74LVC2244A VI handbook, full pagewidth nOE input VM GND tPLZ tPZL VCC output LOW-to-OFF OFF-to-LOW VM VX VOL tPHZ tPZH VOH VY output HIGH-to-OFF OFF-to-HIGH GND VM outputs enabled outputs enabled outputs disabled MNA362 Fig.5 The 3-state enable and disable times. S1 handbook, full pagewidth VCC VI PULSE GENERATOR RL 500 Ω VO 2 × VCC open GND D.U.T. CL 50 pF RT RL 500 Ω MNA368 TEST Definitions for test circuit: RL = Load resistor CL = Load capacitance including jig and probe capacitance (see Chapter “AC characteristics”). RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. S1 VCC VI tPLH/tPHL open tPLZ/tPZL 2 × VCC <2.7 V VCC tPHZ/tPZH GND 2.7 to 3.6 V 2.7 V Fig.6 Load circuitry for switching times. 1999 Sep 30 8 Philips Semiconductors Product specification Octal buffer/line driver with 30 Ω series termination resistors; 5 V input/output tolerant; 3-state 74LVC2244A PACKAGE OUTLINES SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 D E A X c HE y v M A Z 11 20 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 10 e bp detail X w M 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.30 0.10 2.45 2.25 0.25 0.49 0.36 0.32 0.23 13.0 12.6 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.9 0.4 inches 0.10 0.012 0.096 0.004 0.089 0.01 0.019 0.013 0.014 0.009 0.51 0.49 0.30 0.29 0.050 0.419 0.043 0.055 0.394 0.016 0.043 0.039 0.01 0.01 0.004 0.035 0.016 Z (1) θ 8o 0o Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT163-1 075E04 MS-013AC 1999 Sep 30 EIAJ EUROPEAN PROJECTION ISSUE DATE 95-01-24 97-05-22 9 Philips Semiconductors Product specification Octal buffer/line driver with 30 Ω series termination resistors; 5 V input/output tolerant; 3-state 74LVC2244A SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm D SOT339-1 E A X c HE y v M A Z 20 11 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 10 w M bp e detail X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2.0 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 7.4 7.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 0.9 0.5 8 0o Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION SOT339-1 1999 Sep 30 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 93-09-08 95-02-04 MO-150AE 10 o Philips Semiconductors Product specification Octal buffer/line driver with 30 Ω series termination resistors; 5 V input/output tolerant; 3-state 74LVC2244A TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 E D A X c HE y v M A Z 11 20 Q A2 (A 3) A1 pin 1 index A θ Lp L 1 10 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.10 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 6.6 6.4 4.5 4.3 0.65 6.6 6.2 1.0 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.5 0.2 8 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT360-1 1999 Sep 30 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 93-06-16 95-02-04 MO-153AC 11 o Philips Semiconductors Product specification Octal buffer/line driver with 30 Ω series termination resistors; 5 V input/output tolerant; 3-state SOLDERING 74LVC2244A If wave soldering is used the following conditions must be observed for optimal results: Introduction to soldering surface mount packages • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. Reflow soldering The footprint must incorporate solder thieves at the downstream end. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Wave soldering Manual soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. To overcome these problems the double-wave soldering method was specifically developed. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. 1999 Sep 30 12 Philips Semiconductors Product specification Octal buffer/line driver with 30 Ω series termination resistors; 5 V input/output tolerant; 3-state 74LVC2244A Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE REFLOW(1) WAVE BGA, SQFP not suitable HLQFP, HSQFP, HSOP, HTSSOP, SMS not PLCC(3), SO, SOJ suitable suitable(2) suitable suitable LQFP, QFP, TQFP SSOP, TSSOP, VSO suitable not recommended(3)(4) suitable not recommended(5) suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1999 Sep 30 13 Philips Semiconductors Product specification Octal buffer/line driver with 30 Ω series termination resistors; 5 V input/output tolerant; 3-state NOTES 1999 Sep 30 14 74LVC2244A Philips Semiconductors Product specification Octal buffer/line driver with 30 Ω series termination resistors; 5 V input/output tolerant; 3-state NOTES 1999 Sep 30 15 74LVC2244A Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 245004/01/pp16 Date of release: 1999 Sep 30 Document order number: 9397 750 05623