INTEGRATED CIRCUITS 74LVT16501A 3.3V LVT 18-bit universal bus transceiver (3-State) Product specification Supersedes data of 1997 Jun 12 IC23 Data Handbook 1998 Feb 19 Philips Semiconductors Product specification 3.3V 18-bit universal bus transceiver (3-State) FEATURES 74LVT16501A DESCRIPTION • 18-bit bidirectional bus interface • 3-State buffers • Output capability: +64mA/-32mA • TTL input and output switching levels • Input and output interface capability to systems at 5V supply • Bus-hold data inputs eliminate the need for external pull-up The 74LVT16501A is a high-performance BiCMOS product designed for VCC operation at 3.3V. This device is an 18-bit universal transceiver featuring non-inverting 3-State bus compatible outputs in both send and receive directions. Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CPAB and CPBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is High. When LEAB is Low, the A data is latched if CPAB is held at a High or Low logic level. If LEAB is Low, the A-bus data is stored in the latch/flip-flop on the Low-to-High transition of CPAB. When OEAB is High, the outputs are active. When OEAB is Low, the outputs are in the high-impedance state. resistors to hold unused inputs • Live insertion/extraction permitted • Power-up reset • Power-up 3-State • No bus current loading when output is tied to 5V bus • Positive edge triggered clock inputs • Latch-up protection exceeds 500mA per JEDEC Std 17 • ESD protection exceeds 2000V per MIL STD 883 Method 3015 Data flow for B-to-A is similar to that of A-to-B but uses OEBA, LEBA and CPBA. The output enables are complimentary (OEAB is active High, and OEBA is active Low). Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. and 200V per Machine Model QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C PARAMETER tPLH tPHL Propagation delay An to Bn or Bn to An CL = 50pF; VCC = 3.3V TYPICAL UNIT 1.9 ns CIN Input capacitance (Control pins) VI = 0V or 3.0V 3 pF CI/O I/O pin capacitance Outputs disabled; VI/O = 0V or 3.0V 9 pF ICCZ Total supply current Outputs disabled; VCC = 3.6V 70 µA ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 56-Pin Plastic SSOP Type III –40°C to +85°C 74LVT16501A DL VT16501A DL SOT371-1 56-Pin Plastic TSSOP Type II –40°C to +85°C 74LVT16501A DGG VT16501A DGG SOT364-1 PIN DESCRIPTION PIN NUMBER SYMBOL NAME AND FUNCTION 1 OEAB A-to-B Output enable input 27 OEBA B-to-A Output enable input (active low) 2, 28 LEAB/LEBA A-to-B/B-to-A Latch enable input 55,30 CPAB/CPBA A-to-B/B-to-A Clock input (active rising edge) 3, 5, 6, 8, 9, 10, 12, 13, 14, 15, 16, 17, 19, 20, 21, 23, 24, 26 A0-A17 Data inputs/outputs (A side) 54, 52, 51, 49, 48, 47, 45, 44, 43, 42, 41, 40, 38, 37, 36, 34, 33, 31 B0-B17 Data inputs/outputs (B side) 4, 11, 18, 25, 32, 39, 46, 53 GND Ground (0V) 7, 22, 35, 50 VCC Positive supply voltage 1998 Feb 19 2 853-1787 18989 Philips Semiconductors Product specification 3.3V 18-bit universal bus transceiver (3-State) PIN CONFIGURATION LOGIC SYMBOL (IEEE/IEC) OEAB 1 56 GND LEAB 2 55 CPAB OEAB 1 A0 3 54 B0 CPAB 55 GND 4 53 GND LEAB 2 A1 5 52 B1 A2 6 51 B2 OEBA 27 VCC 7 50 VCC CPBA 30 A3 8 49 B3 LEBA 28 A4 9 48 B4 A5 10 47 B5 GND 11 46 GND A6 12 45 B6 A7 13 44 B7 A8 14 43 B8 A9 15 42 B9 A10 16 41 B10 A11 17 40 B11 GND 18 39 GND A12 19 38 A13 20 A14 EN1 2C3 C3 G2 EN4 5C6 C6 G5 A0 3 3D 1 1 4 1 6D 54 B0 A1 5 52 B1 A2 6 51 B2 A3 8 49 B3 9 48 B4 A5 10 47 B5 A6 12 45 B6 A7 13 44 B7 B12 A8 14 43 B8 37 B13 A9 15 42 B9 21 36 B14 A10 16 41 B10 VCC 22 35 VCC A11 17 40 B11 A15 23 34 B15 A12 19 38 B12 A16 24 33 B16 A13 20 37 B13 GND 25 32 GND A14 21 36 B14 A17 26 31 B17 A15 23 34 B15 OEBA 27 30 CPBA A16 24 33 B16 LEBA 28 29 GND A17 26 31 B17 A4 SA00128 SA00129 LOGIC SYMBOL OEAB CPAB LEAB OEBA LEBA 1 CPBA 30 28 27 55 2 A0 3 A1 5 B2 A2 6 49 B3 A3 8 48 B4 A4 9 47 B5 A5 10 45 B6 A6 12 44 B7 A7 13 43 B8 A8 14 42 B9 A9 15 41 B10 A10 16 40 B11 A11 17 38 B12 A12 19 37 B13 A13 20 36 B14 A14 21 34 B15 A15 23 33 B16 A16 24 31 B17 A17 26 54 B0 52 B1 51 SW00026 1998 Feb 19 74LVT16501A 3 Philips Semiconductors Product specification 3.3V 18-bit universal bus transceiver (3-State) 74LVT16501A FUNCTION TABLE INPUTS OUTPUTS OEAB LEAB CPAB An INTERNAL REGISTER L H X X X Z L ↓ X h H Z L ↓ X I L Z L L H or L X NC Z L L ↑ h H Z L L ↑ I L Z H H X H H H H H X L L L H ↓ X h H H H ↓ X I L L H L ↑ h H H H L ↑ I L L H L H or L X H H H L H or L X L L OPERATING MODE Bn Disabled Disabled Latch data Disabled, Disabled, Hold data Disabled Clock data Disabled, Transparent Latch data & display Clock data & display NOTE: A-to-B data flow is shown; B-to-A flow is similar but uses OEBA, LEBA, and CPBA. H = High voltage level h = High voltage level one set-up time prior to the Enable or Clock transition L = Low voltage level I = Low voltage level one set-up time prior to the Enable or Clock transition NC= No Change X = Don’t care Z = High Impedence “off ” state ↓ = High-to-Low Enable or Clock transition 1998 Feb 19 4 Hold data & display Philips Semiconductors Product specification 3.3V 18-bit universal bus transceiver (3-State) 74LVT16501A LOGIC DIAGRAM OEAB 1 CLKAB 55 LEAB 2 LEBA 28 CLKBA 30 OEBA 27 A1 3 ID 54 B1 C1 CLK ID C1 CLK To 17 other channels SW00235 1998 Feb 19 5 Philips Semiconductors Product specification 3.3V 18-bit universal bus transceiver (3-State) 74LVT16501A ABSOLUTE MAXIMUM RATINGS 1, 2 PARAMETER SYMBOL VCC IIK RATING UNIT –0.5 to +4.6 V –50 mA –0.5 to +7.0 V VO < 0 –50 mA Output in Off or High state –0.5 to +7.0 V Output in Low state 128 Output in High state –64 DC supply voltage DC input diode current VI < 0 voltage3 VI DC input IOK DC output diode current VOUT CONDITIONS DC output voltage3 IOUT O DC output current Tstg Storage temperature range mA –65 to +150 °C NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL VCC PARAMETER UNIT DC supply voltage MIN MAX 2.7 3.6 V 0 5.5 V VI Input voltage VIH High-level input voltage VIL Input voltage 0.8 V IOH High-level output current –32 mA Low-level output current 32 Low-level output current; current duty cycle ≤ 50%; f ≥ 1kHz 64 IOL O ∆t/∆v Input transition rise or fall rate; Outputs enabled Tamb Operating free-air temperature range 1998 Feb 19 2.0 mA –40 6 V 10 ns/V +85 °C Philips Semiconductors Product specification 3.3V 18-bit universal bus transceiver (3-State) 74LVT16501A DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C MIN VIK Input clamp voltage VCC = 2.7V; IIK = –18mA VCC = 2.7 to 3.6V; IOH = –100µA VOH VOL VRST High-level output voltage Low-level output voltage Power-up output low voltage5 IHOLD IEX IPU/PD Output off current Bus Hold current out uts7 A or B outputs 2.4 2.55 VCC = 3.0V; IOH = –32mA 2.0 2.3 0.07 0.2 VCC = 2.7V; IOL = 24mA 0.3 0.5 VCC = 3.0V; IOL = 16mA 0.25 0.4 VCC = 3.0V; IOL = 32mA 0.3 0.5 VCC = 3.0V; IOL = 64mA 0.36 0.55 VCC = 3.6V; IO = 1mA; VI = GND or VCC 0.1 0.55 0.1 ±1 0.1 10 1.0 20 0.1 10 VCC = 3.6V; VI = 0 0.1 -5 VCC = 0V; VI or VO = 0 to 4.5V 1.0 ±100 VCC = 3.6V; VI = 5.5V VCC = 3V; VI = 0.8V 75 130 VCC = 3V; VI = 2.0V –75 –130 VCC = 0V to 3.6V; VCC = 3.6V ±500 V V µA µA µA VO = 5.5V; VCC = 3.0V 50 125 µA Power up/down 3-State output current3 VCC ≤ 1.2V; VO = 0.5V to VCC; VI = GND or VCC; OE/OE = Don’t care 40 ±100 µA 0.07 0.12 4 5 0.07 0.12 0.1 0.2 VCC = 3.6V; Outputs High, VI = GND or VCC, IO = 0 Quiescent supply current ICCZ ∆ICC I/O Data pins4 V V VCC = 2.7V; IOL = 100µA Control pins UNIT Current into an output in the High state when VO > VCC ICCH ICCL –1.2 VCC = 2.7V; IOH = –8mA VCC = 3.6V; VI = VCC IOFF –0.85 VCC VCC = 0 or 3.6V; VI = 5.5V Input leakage current MAX VCC-0.2 VCC = 3.6V; VI = VCC or GND II TYP1 VCC = 3.6V; Outputs Low, VI = GND or VCC, IO = 0 VCC = 3.6V; Outputs Disabled; VI = GND or VCC, IO = Additional supply current per input pin2 VCC = 3V to 3.6V; One input at VCC-0.6V, Other inputs at VCC or GND 06 mA mA NOTES: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. 2. This is the increase in supply current for each input at the specified voltage level other than VCC or GND 3. This parameter is valid for any VCC between 0V and 1.2V with a transition time of up to 10msec. From VCC = 1.2V to VCC = 3.3V ± 0.3V a transition time of 100µsec is permitted. This parameter is valid for Tamb = 25°C only. 4. Unused pins at VCC or GND. 5. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power. 6. ICCZ is measured with outputs pulled to VCC or GND. 7. This is the bus hold overdrive current required to force the input to the opposite logic state. 1998 Feb 19 7 Philips Semiconductors Product specification 3.3V 18-bit universal bus transceiver (3-State) 74LVT16501A AC CHARACTERISTICS GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω; Tamb = –40°C to +85°C. LIMITS SYMBOL PARAMETER WAVEFORM VCC = 3.3V ±0.3V VCC = 2.7V TYP1 MAX MIN MAX UNIT fMAX Maximum clock frequency 1 150 MHz tPLH tPHL Propagation delay An to Bn or Bn to An 2 0.5 0.5 1.9 1.9 4.2 4.2 5.4 5.4 ns tPLH tPHL Propagation delay CPAB to Bn or CPBA to An 1 1.0 1.0 3.2 3.2 5.4 5.4 6.4 6.4 ns tPLH tPHL Propagation delay LEAB to Bn or LEBA to An 3 1.0 1.0 2.4 2.9 5.4 5.4 6.4 6.4 ns tPZH tPZL Output enable time to High and Low level 5 6 1.0 1.0 2.4 2.2 3.9 3.9 4.6 5.2 ns tPHZ tPLZ Output disable time from High and Low Level 5 6 1.0 1.0 2.8 3.2 5.2 5.2 5.6 5.6 ns NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. AC SETUP REQUIREMENTS GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω; Tamb = –40°C to +85°C. SYMBOL PARAMETER WAVEFORM VCC = 3.3V ±0.3V VCC = 2.7V MIN TYP MIN UNIT ts(H) ts(L) Setup time, High or Low An to CPAB or Bn to CPBA 4 1.8 1.8 1.0 0.7 1.5 1.5 ns th(H) th(L) Hold time, High or Low An to CPAB or Bn to CPBA 4 0 0 0 0 0 0 ns ts(H) ts(L) Setup time, High or Low An to LEAB or Bn to CPBA 4 1.8 1.8 1.1 1.8 1.5 1.5 ns th(H) th(L) Hold time, High or Low An to LEAB or Bn to LEBA 4 0 0 0 0 0 0 ns tw(H) tw(L) Pulse width, High or Low CPAB or CPBA 1 1.2 1.2 0.8 0.8 1.5 1.5 ns tw(H) LEAB or LEBA pulse width, High 3 1.2 0.8 1.5 ns 1998 Feb 19 8 Philips Semiconductors Product specification 3.3V 18-bit universal bus transceiver (3-State) 74LVT16501A AC WAVEFORMS VM = 1.5V, VIN = GND to 2.7V 1/fMAX CPBA or CPAB ÉÉÉ ÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉ ÉÉÉ 2.7V An or Bn 2.7V VM VM tW(L) tPHL tW(H) VM VM VM VM 0V tS(H) th(H) th(L) tS(L) tPLH VOH An or Bn 2.7V VM VM VM CPAB or CPBA, LEAB or LEBA VM 0V VOL SW00028 SW00031 Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency Waveform 4. Data Setup and Hold Times 2.7V OEBA 2.7V VM VM An or Bn VM VM OEAB 0V 0V tPLH tPZH tPHL tPHZ VOH VOH VM An or Bn VOH –0.3V VM An or Bn VM VOL SW00029 SW00032 Waveform 2. Propagation Delay, Transparent Mode Waveform 5. 3-State Output Enable Time to High Level and Output Disable Time from High Level 2.7V LEAB or LEBA VM VM VM VM 0V tW(H) 2.7V OEBA VM OEAB tPLH 0V tPHL VOH tPZL An or Bn VM tPLZ VM 3V An or Bn VOL VM VOL +0.3V SW00030 VOL Waveform 3. Propagation Delay, Enable to Output, and Enable Pulse Width SW00033 Waveform 6. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level 1998 Feb 19 9 Philips Semiconductors Product specification 3.3V 18-bit universal bus transceiver (3-State) 74LVT16501A TEST CIRCUIT AND WAVEFORMS 6V VCC OPEN VIN VOUT PULSE GENERATOR tW 90% RL GND CL 10% 10% 0V RL tTHL (tF) tTLH (tR) tTLH (tR) tTHL (tF) 90% POSITIVE PULSE Test Circuit for 3-State Outputs SWITCH tPHZ/tPZH GND tPLZ/tPZL 6V tPLH/tPHL open VM VM 10% tW 0V VM = 1.5V Input Pulse Definition INPUT PULSE REQUIREMENTS DEFINITIONS FAMILY RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. AMP (V) 90% 10% SWITCH POSITION TEST AMP (V) VM VM NEGATIVE PULSE D.U.T. RT 90% 74LVT16 Amplitude Rep. Rate tW tR 2.7V ≤10MHz 500ns ≤2.5ns tF ≤2.5ns RT = Termination resistance should be equal to ZOUT of pulse generators. SW00003 1998 Feb 19 10 Philips Semiconductors Product specification 3.3V LVT18-bit universal bus transceiver (3-State) SSOP56: plastic shrink small outline package; 56 leads; body width 7.5 mm 1998 Feb 19 11 74LVT16501A SOT371-1 Philips Semiconductors Product specification 3.3V LVT18-bit universal bus transceiver (3-State) TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1mm 1998 Feb 19 12 74LVT16501A SOT364-1 Philips Semiconductors Product specification 3.3V LVT18-bit universal bus transceiver (3-State) NOTES 1998 Feb 19 13 74LVT16501A Philips Semiconductors Product specification 3.3V LVT18-bit universal bus transceiver (3-State) 74LVT16501A Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 14 Date of release: 05-96 9397-750-03557