Revised August 1999 74LVT2240 • 74LVTH2240 Low Voltage Inverting Octal Buffer/Line Driver with 3-STATE Outputs General Description Features The LVT2240 and LVTH2240 are inverting octal buffers and line drivers designed to be employed as memory address drivers, clock drivers and bus oriented transmitters or receivers which provides improved PC board density. The equivalent 25Ω-Series resistors helps reduce output overshoot and undershoot. ■ Input and output interface capability to systems at 5V VCC The LVTH2240 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs. These inverting octal buffers and line drivers are designed for low-voltage (3.3V) VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVT2240 and LVTH2240 are fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining low power dissipation. ■ Equivalent 25Ω-Series resistors on outputs ■ Bushold data inputs eliminate the need for external pullup resistors to hold unused inputs (74LVTH2240), also available without bushold feature (74LVT2240). ■ Live insertion/extraction permitted ■ Power Up/Down high impedance provides glitch-free bus loading ■ Outputs source/sink −12 mA/+12 mA ■ Latch-up performance exceeds 500 mA Ordering Code: Order Number Package Number 74LVT2240WM 74LVT2240SJ Package Description M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVT2240MTC MTC20 74LVTH2240WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVTH2240SJ 74LVTH2240MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Connection Diagram IEEE/IEC © 1999 Fairchild Semiconductor Corporation DS500212 www.fairchildsemi.com 74LVT2240 • 74LVTH2240 Low Voltage Inverting Octal Buffer/Line Driver with 3-STATE Outputs July 1999 74LVT2240 • 74LVTH2240 Pin Descriptions Pin Names Truth Tables Description Inputs In Outputs (Pins 12, 14, 16, 18) OE1, OE2 3-STATE Output Enable Inputs I0–I7 Inputs L L H O0–O7 Outputs L H L H X Z OE1 Inputs OE2 2 In L L H L H L H X Z H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance www.fairchildsemi.com Outputs (Pins 3, 5, 7, 9) Symbol Parameter Value Conditions Units VCC Supply Voltage −0.5 to +4.6 VI DC Input Voltage −0.5 to +7.0 VO DC Output Voltage −0.5 to +7.0 Output in 3-STATE V −0.5 to +7.0 Output in HIGH or LOW State (Note 2) V V V IIK DC Input Diode Current −50 VI < GND mA IOK DC Output Diode Current −50 VO < GND mA IO DC Output Current 64 VO > VCC Output at HIGH State 128 VO > VCC Output at LOW State mA ICC DC Supply Current per Supply Pin ±64 mA IGND DC Ground Current per Ground Pin ±128 mA TSTG Storage Temperature −65 to +150 °C Recommended Operating Conditions Symbol Parameter Min Max 2.7 3.6 V 0 5.5 V VCC Supply Voltage VI Input Voltage IOH HIGH-Level Output Current −12 IOL LOW-Level Output Current 12 TA Free-Air Operating Temperature ∆t/∆V Input Edge Rate, VIN = 0.8V–2.0V, VCC = 3.0V Units mA −40 85 °C 0 10 ns/V Note 1: Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied. Note 2: IO Absolute Maximum Rating must be observed. DC Electrical Characteristics Symbol VCC (V) Parameter VIK Input Clamp Diode Voltage VIH Input HIGH Voltage 2.7–3.6 VIL Input LOW Voltage 2.7–3.6 VOH Output HIGH Voltage 2.7–3.6 3.0 TA =−40°C to +85°C Min Typ (Note 3) Units Conditions Max −1.2 V II = −18 mA V VO ≤ 0.1V or VO ≥ VCC − 0.1V VCC − 0.2 V IOH = −100 µA 2.0 V IOH = −12 mA V IOL = 100 µA 2.7 2.0 0.8 VOL Output LOW Voltage II(HOLD) (Note 4) Bushold Input Minimum Drive 3.0 II(OD) (Note 4) Bushold Input Over-Drive Current to Change State 3.0 II Input Current 3.6 10 µA VI = 5.5V Control Pins 3.6 ±1 µA VI = 0V or VCC Data Pins 3.6 −5 µA VI = 0V 1 µA VI = VCC ±100 µA 2.7 0.2 V IOL = 12 mA 75 µA VI = 0.8V −75 µA VI = 2.0V 500 µA (Note 5) −500 µA (Note 6) 3.0 IOFF Power Off Leakage Current IPU/PD Power up/down 3-STATE Output Current 0.8 0 0–1.5V ±100 µA 0V ≤ VI or VO ≤ 5.5V VO = 0.5V to 3.0V VI = GND or VCC IOZL 3-STATE Output Leakage Current 3.6 −5 µA IOZH 3-STATE Output Leakage Current 3.6 5 µA VO = 3.0V IOZH+ 3-STATE Output Leakage Current 3.6 10 µA VCC < VO ≤ 5.5V ICCH Power Supply Current 3.6 0.19 mA Outputs HIGH ICCL Power Supply Current 3.6 5 mA Outputs LOW ICCZ Power Supply Current 3.6 0.19 mA Outputs Disabled 3 VO = 0.5V www.fairchildsemi.com 74LVT2240 • 74LVTH2240 Absolute Maximum Ratings(Note 1) 74LVT2240 • 74LVTH2240 DC Electrical Characteristics Symbol Parameter (Continued) TA =−40°C to +85°C VCC (V) Typ Min Units Max (Note 3) Conditions ICCZ+ Power Supply Current 3.6 0.19 mA VCC ≤ VO ≤ 5.5V, ∆ICC Increase in Power Supply Current 3.6 0.2 mA One Input at VCC − 0.6V Outputs Disabled (Note 7) Other Inputs at VCC or GND Note 3: All typical values are at VCC = 3.3V, TA = 25°C. Note 4: Applies to bushold versions only (74LVTH2240). Note 5: An external driver must source at least the specified current to switch from LOW-to-HIGH. Note 6: An external driver must sink at least the specified current to switch from HIGH-to-LOW. Note 7: This is the increase in supply current for each, input that is at the specified voltage level rather than VCC or GND. Dynamic Switching Characteristics Symbol Parameter (Note 8) TA = 25°C VCC (V) Min Typ Max Units Conditions CL = 50 pF, RL = 500Ω (Note 9) VOLP Quiet Output Maximum Dynamic VOL 3.3 0.8 V VOLV Quiet Output Minimum Dynamic VOL 3.3 −0.8 V Note 8: Characterized in SOIC package. Guaranteed parameter, but not tested. Note 9: Max number of outputs defined as (n). n−1 data inputs are driven 0V to 3V. Output under test held LOW. AC Electrical Characteristics TA = −40°C to +85°C CL = 50 pF, RL = 500Ω Symbol VCC = 3.3V ± 0.3V Parameter Min Typ VCC = 2.7V Max Min Max 1.0 4.0 1.0 4.8 1.0 4.1 1.0 4.4 1.0 5.0 1.0 6.0 1.1 5.0 1.1 5.6 1.9 4.8 1.9 5.5 1.8 4.5 1.8 4.5 Units (Note 10) tPLH Propagation Delay Data to Output tPHL tPZH Output Enable Time tPZL tPHZ Output Disable Time tPLZ tOSHL Output to Output Skew tOSLH (Note 11) 1.0 ns ns ns 1.0 ns Note 10: All typical values are at VCC = 3.3V, TA = 25°C. Note 11: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Capacitance Symbol (Note 12) Typical Units CIN Input Capacitance Parameter VCC = 0V, VI = 0V or VCC Conditions 3 pF COUT Output Capacitance VCC = 3.0V, VO = 0V or VCC 6 pF Note 12: Capacitance is measured at frequency f = 1 MHz, per MIL-STD-883B, Method 3012. www.fairchildsemi.com 4 74LVT2240 • 74LVTH2240 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 5 www.fairchildsemi.com 74LVT2240 • 74LVTH2240 Low Voltage Inverting Octal Buffer/Line Driver with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 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