Revised February 2005 74VHCT14A Hex Schmitt Inverter General Description Features The VHCT14A is an advanced high speed CMOS Hex Schmitt Inverter fabricated with silicon gate CMOS technology. The VHCT14A contains six independent inverters which are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. ■ High speed: tPD Protection circuits ensure that 0V to 7V can be applied to the input pins without regard to the supply voltage and to the output pins with VCC 0V. These circuits prevent device destruction due to mismatched supply and input/ output voltages. This device can be used to interface 3V to 5V systems and two supply systems such as battery backup. ■ Low noise: VOLP 5.0 ns (typ) at TA ■ High noise immunity: VIH 2.0V, VIL 25qC 0.8V ■ Power down protection is provided on all inputs and outputs 1.0V (max) ■ Low power dissipation: ICC 2 PA (max) @ TA 25qC ■ Pin and function compatible with 74HCT14 Ordering Code: Order Number Package Package Description Number 74VHCT14AM M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74VHCT14ASJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHCT14AMTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74VHCT14AMTCX_NL (Note 1) MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74VHCT14AN N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only. Logic Symbol Connection Diagram Pin Descriptions Truth Table Pin Names Description A O An Inputs L H On Outputs H L © 2005 Fairchild Semiconductor Corporation DS500147 www.fairchildsemi.com 74VHCT14A Hex Schmitt Inverter December 1998 74VHCT14A Absolute Maximum Ratings(Note 2) Recommended Operating Conditions (Note 6) 0.5V to 7.0V 0.5V to 7.0V Supply Voltage (VCC) DC Input Voltage (VIN) 4.5V to 5.5V Supply Voltage (VCC) DC Output Voltage (VOUT) 0V to 5.5V Input Voltage (VIN) 0.5V to VCC 0.5V 0.5V to 7.0V 20 mA (Note 3) (Note 4) Input Diode Current (IIK) Output Diode Current (IOK) (Note 5) DC Output Current (IOUT) DC VCC/GND Current (ICC) Storage Temperature (TSTG) Output Voltage (VOUT) (Note 3) 0V to VCC (Note 4) 0V to 5.5V 40qC to 85qC Operating Temperature (TOPR) r20 mA r25 mA r50 mA 65qC to 150qC Note 2: Absolute Maximum Ratings are values beyond which the device may be damaged or have its useful life impaired. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation outside databook specifications. 260qC Note 3: HIGH or LOW state. IOUT absolute maximum rating must be observed. Lead Temperature (TL) (Soldering, 10 seconds) Note 4: VCC 0V. Note 5: VOUT GND, VOUT ! VCC (Outputs Active) Note 6: Unused inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol VP VN VH VOH Positive Threshold Voltage Negative Threshold Voltage HIGH Level Output Voltage LOW Level Output Voltage IIN Input Leakage Current ICC Quiescent Supply Current ICCT Maximum ICC/Input TA Min 25qC Typ 40qC to 85qC TA Max Min 4.5 1.9 1.9 5.5 2.1 2.1 4.5 0.5 0.5 5.5 0.6 0.6 Units Conditions Max V V Hysteresis Voltage VOL IOFF VCC (V) Parameter 4.5 0.4 1.4 0.4 1.4 5.5 0.4 1.5 0.4 1.5 4.5 4.40 4.50 3.94 V 3.80 V VIN 0.1 0.36 0.44 V r0.1 r1.0 PA 5.5 2.0 20.0 PA 5.5 1.35 1.50 mA 0.0 0.5 5.0 PA 0 5.5 Output Leakage Current 4.40 0.1 4.5 0.0 V V VIL IOH 8 mA IOL 50 PA IOL 8 mA VIN VIH VIN 5.5V or GND VIN VCC or GND VIN 3.4V Other Inputs VOUT VCC or GND 5.5V (Power Down State) Noise Characteristics Symbol Parameter TA 25qC VCC (V) Typ Limits Units Conditions VOLP (Note 7) Quiet Output Maximum Dynamic VOL 5.0 0.8 1.0 V CL 50 pF VOLV (Note 7) Quiet Output Minimum Dynamic VOL 5.0 0.8 1.0 V CL 50 pF VIHD (Note 7) Minimum HIGH Level Dynamic Input Voltage 5.0 2.0 V CL 50 pF VILD (Note 7) Maximum LOW Level Dynamic Input Voltage 5.0 0.8 V CL 50 pF Note 7: Parameter guaranteed by design. www.fairchildsemi.com 2 50 PA IOH Symbol tPHL Parameter Propagation Delay tPLH VCC (V) 5.0 r 0.5 25qC TA Min TA 40qC to 85qC Units Conditions Typ Max Min Max 5.0 7.6 1.0 9.0 ns CL 15 pF 6.5 9.6 1.0 11.0 ns CL 50 pF 10 10 pF VCC pF (Note 8) CIN Input Capacitance 2 CPD Power Dissipation Capacitance 11 OPEN Note 8: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr.) CPD * VCC * fIN I CC/6 (per gate). 3 www.fairchildsemi.com 74VHCT14A AC Electrical Characteristics 74VHCT14A Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A www.fairchildsemi.com 4 74VHCT14A Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D 5 www.fairchildsemi.com 74VHCT14A Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14 www.fairchildsemi.com 6 74VHCT14A Hex Schmitt Inverter Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N14A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 7 www.fairchildsemi.com