a APPLICATIONS Zero-Crossing Detectors Overvoltage Detectors Pulse-Width Modulators Precision Rectifiers Discrete A/D Converters Delta-Sigma Modulator A/Ds CONNECTION DIAGRAMS 8-Pin Plastic Mini-DIP (N) and Cerdip (Q) Packages +VS 1 8 VLOGIC AD790 +IN 2 + 7 OUTPUT –IN 3 – 6 GROUND –VS 4 5 LATCH 8-Pin SOIC (R) Package OUTPUT 1 VLOGIC 2 +VS 3 +IN 4 AD790 + FEATURES 45 ns max Propagation Delay Single 5 V or Dual ⴞ15 V Supply Operation CMOS or TTL Compatible Output 250 V max Input Offset Voltage 500 V max Input Hysteresis Voltage 15 V max Differential Input Voltage Onboard Latch 60 mW Power Dissipation Available in 8-Pin Plastic and Hermetic Cerdip Packages Available in Tape and Reel in Accordance with EIA-481A Standard Fast, Precision Comparator AD790 – 8 GROUND 7 LATCH 6 –VS 5 –IN PRODUCT DESCRIPTION PRODUCT HIGHLIGHTS The AD790 is a fast (45 ns), precise voltage comparator, with a number of features that make it exceptionally versatile and easy to use. The AD790 may operate from either a single 5 V supply or a dual ± 15 V supply. In the single-supply mode, the AD790’s inputs may be referred to ground, a feature not found in other comparators. In the dual-supply mode it has the unique ability of handling a maximum differential voltage of 15 V across its input terminals, easing their interfacing to large amplitude and dynamic signals. 1. The AD790’s combination of speed, precision, versatility and low cost makes it suitable as a general purpose comparator in analog signal processing and data acquisition systems. This device is fabricated using Analog Devices’ Complementary Bipolar (CB) process—which gives the AD790’s combination of fast response time and outstanding input voltage resolution (1 mV max). To preserve its speed and accuracy, the AD790 incorporates a “low glitch” output stage that does not exhibit the large current spikes normally found in TTL or CMOS output stages. Its controlled switching reduces power supply disturbances that can feed back to the input and cause undesired oscillations. The AD790 also has a latching function which makes it suitable for applications requiring synchronous operation. 2. Built-in hysteresis and a low-glitch output stage minimize the chance of unwanted oscillations, making the AD790 easier to use than standard open-loop comparators. 3. The hysteresis combined with a wide input voltage range enables the AD790 to respond to both slow, low level (e.g., 10 mV) signals and fast, large amplitude (e.g., 10 V) signals. 4. A wide variety of supply voltages is acceptable for operation of the AD790, ranging from single 5 V to dual +5 V/–12 V, ± 5 V, or +5 V/± 15 V supplies. 5. The AD790’s power dissipation is the lowest of any comparator in its speed range. 6. The AD790’s output swing is symmetric between VLOGIC and ground, thus providing a predictable output under a wide range of input and output conditions. The AD790 is available in five performance grades. The AD790J and the AD790K are rated over the commercial temperature range of 0°C to 70°C. The AD790A and AD790B are rated over the industrial temperature range of –40°C to +85°C. The AD790S is rated over the military temperature range of –55°C to +125°C. REV. D Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002 AD790–SPECIFICATIONS DUAL SUPPLY (Operation @ 25ⴗC and +VS = 15 V, –VS = –15 V, VLOGIC = 5 V unless otherwise noted.) Parameter Conditions RESPONSE CHARACTERISTIC Propagation Delay, tPD 100 mV Step 5 mV Overdrive TMIN to TMAX OUTPUT CHARACTERISTICS Output HIGH Voltage, VOH Output LOW Voltage, VOL 1.6 mA Source 6.4 mA Source TMIN to TMAX 1.6 mA Sink 6.4 mA Sink TMIN to TMAX Min 40 0.2 TMIN to TMAX TMIN to TMAX Either Input TMIN to TMAX 0.3 Offset Current 0.4 2.5 0.04 TMIN to TMAX Power Supply Rejection Ratio DC Input Voltage Range Differential Voltage Common Mode Common Mode Rejection Ratio VS ± 20% TMIN to TMAX 80 76 TMIN to TMAX TMIN to TMA X ⴞVS +VS–2 V Logic Supply Quiescent Current +VS –VS VLOGIC Power Dissipation TEMPERATURE RANGE Rated Performance VLOGIC = 5 V TMIN to TMAX TMIN to TMAX +VS = 15 V –VS = –15 V VLOGIC = 5 V TMIN to TMAX 0.4 1.8 0.02 40 4.3 4.3 0.25 0.5 0.5 3.5 4.5 0.15 0.2 100 93 0.2 0.3 0.4 2.5 0.04 80 76 ns ns 0.5 0.5 V V V V V 1.0 1.5 0.65 5 7 0.25 0.4 mV mV mV µA µA µA µA 90 85 ⴞVS +VS–2 V –VS –VS 45 60 4.65 4.45 0.35 0.44 0.5 0.5 Unit dB dB ⴞVS V +VS–2 V V 80 95 88 105 80 95 dB 76 90 20储2 85 100 20储2 76 88 20储2 dB MΩ储pF 25 5 35 10 0.8 2.3 5 7 1.6 25 5 35 10 0.8 2.3 3.5 5 1.6 TMIN to TMAX SUPPLY CHARACTERISTICS Diff Supply Voltage3 0.3 88 85 –VS Input Impedance LATCH CHARACTERISTICS Latch Hold Time, tH Latch Setup Time, tS LOW Input Level, VIL HIGH Input Level, VIH Latch Input Current 0.05 AD790S Min Typ Max 45 45/50 4.65 4.45 0.35 0.44 0.5 0.5/0.5 1.0 1.5 0.6 5 6.5 0.25 0.3 AD790K/B Typ Max 40 4.3 4.3 90 88 VS ≤± 15 V –10 V<VCM <+10 V TMIN to TMAX Min 45 45/50 4.65 4.3 4.45 4.3/4.3 0.35 0.44 INPUT CHARACTERISTICS Offset Voltage1 Hysteresis2 Bias Current AD790J/A Typ Max 4.5 4.0 33 7 8 4 2 10 5 3.3 242 0 to 70/–40 to +85 25 5 35 10 0.8 2.3 5 8 ns ns V V µA µA 33 7 V V 10 5 3.3 242 mA mA mA mW 1.6 4.5 4.0 33 7 8 4 2 10 5 3.3 242 0 to 70/–40 to +85 4.7 4.2 8 4 2 –55 to +125 °C NOTES 1 Defined as the average of the input voltages at the low to high and high to low transition points. Refer to Figure 6. 2 Defined as half the magnitude between the input voltages at the low to high and high to low transition points. Refer to Figure 6. 3 +VS must be no lower than (V LOGIC –0.5 V) in any supply operating conditions, except during power up. All min and max specifications are guaranteed. Specifications shown in boldface are tested on all production units at final test. Specifications subject to change without notice. –2– REV. D AD790 SINGLE SUPPLY (Operation @ 25ⴗC and +VS = VLOGIC = 5 V, –VS = 0 V unless otherwise noted.)1 Parameter Conditions RESPONSE CHARACTERISTIC Propagation Delay, tPD 100 mV Step 5 mV Overdrive TMIN to TMAX OUTPUT CHARACTERISTICS Output HIGH Voltage, VOH Output LOW Voltage, VOL 1.6 mA Source 6.4 mA Source TMIN to TMAX 1.6 mA Sink 6.4 mA Sink TMIN to TMAX Min 45 4.3 4.3 4.65 4.45 0.45 TMIN to TMAX TMIN to TMAX Either Input TMIN to TMAX 0.3 Offset Current 0.5 2.7 0.04 TMIN to TMAX Power Supply Rejection Ratio DC 4.5 V≤VS≤5.5 V TMIN to TMAX Input Voltage Range Differential Voltage Common Mode Input Impedance LATCH CHARACTERISTICS Latch Hold Time, tH Latch Setup Time, tS LOW Input Level, VIL HIGH Input Level, VIH Latch Input Current TEMPERATURE RANGE Rated Performance 0.35 0.3 0.02 86 82 ⴞVS +VS–2 V 0 TMIN to TMAX 35 10 0.8 2.3 5 7 1.6 0.3 7 12 60 0 to 70/–40 to +85 –3– 0.7 2.7 0.04 20储2 25 5 35 10 0.8 2.3 3.5 5 ns ns 0.5 0.5 V V V V V 1.5 2.0 1.0 5 8 0.25 0.4 mV mV mV µA µA µA µA 90 85 ⴞVS +VS–2 V 0 dB dB ⴞVS V +VS–2 V V MΩ储pF 25 5 35 10 0.8 2.3 5 8 ns ns V V µA µA 7 12 60 V mA mW 1.6 4.5 10 7 12 60 0 to 70/–40 to +85 NOTES 1 Pin 1 tied to Pin 8, and Pin 4 tied to Pin 6. 2 Defined as the average of the input voltages at the low to high and high to low transition points. Refer to Figure 6. 3 Defined as half the magnitude between the input voltages at the low to high and high to low transition points. Refer to Figure 6. 4 –VS must not be connected above ground. All min and max specifications are guaranteed. Specifications shown in boldface are tested on all production units at final test. Specifications subject to change without notice. REV. D 0.45 80 76 1.6 10 TMIN to TMAX 0.6 0.85 0.65 3.5 5 0.15 0.2 Unit 50 65 4.65 4.45 0.35 0.44 0.5 0.5 20储2 25 5 4.5 45 4.3 4.3 100 93 0 20储2 TMIN to TMAX TMIN to TMAX 0.5 2.0 AD790S Min Typ Max 50 50/60 4.65 4.45 0.35 0.44 0.5 0.5 1.5 2.0 0.75 5 7 0.25 0.3 AD790K/B Typ Max 45 4.3 4.3 80 90 76/76 88 TMIN to TMAX SUPPLY CHARACTERISTICS Supply Voltage4 Quiescent Current Power Dissipation Min 50 50/60 0.35 0.44 INPUT CHARACTERISTICS Offset Voltage2 Hysteresis3 Bias Current AD790J/A Typ Max 4.7 10 –55 to +125 °C AD790 ABSOLUTE MAXIMUM RATINGS 1, 2 ORDERING GUIDE Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V Internal Power Dissipation2 . . . . . . . . . . . . . . . . . . . 500 mW Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . ± 16.5 V Output Short-Circuit Duration . . . . . . . . . . . . . . . . Indefinite Storage Temperature Range (N, R) . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +125°C (Q) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C Lead Temperature Range (Soldering 60 sec) . . . . . . . . 300°C Logic Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V NOTES 1 Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Thermal characteristics: plastic N-8 package: θJA = 90°C/watt; ceramic Q-8 package: θJA = 110°C/watt, θJC = 30°C/watt. SOIC (R-8) package: θJA = 160°C watt; θJC = 42°C/watt. Model Temperature Range Package Package Description Option AD790JN AD790JR AD790JR-REEL AD790JR-REEL7 AD790KN* AD790AQ AD790BQ* AD790SQ 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C –40°C to +85°C –40°C to +85°C –55°C to +125°C Plastic DIP SOIC Reel SOIC Plastic DIP Cerdip Cerdip Cerdip N-8 SO-8 R-8 N-8 Q-8 Q-8 Q-8 *Not for new designs; obsolete April 2002. For military processed devices, please refer to the standard Microcircuit Drawing (SMD) available at www.dscc.dla.mil/programs/milspec/default.asp SMD Part Number ADI Equivalent 5962-9150501MPA* AD790 SQ/883 *Not for new designs; obsolete April 2002. + 15V LATCH (OPTIONAL) + 5V 0.1µF LATCH (OPTIONAL) + 5V 0.1µF 0.1µF 510 Ω 510Ω 1 +IN 1 8 2 +IN 5 –IN 8 2 OUTPUT 7 AD790 5 7 AD790 6 3 –IN 4 OUTPUT 6 3 4 0.1µF – 15V Figure 2. Basic Single Supply Configuration (N, Q Package Pinout) Figure 1. Basic Dual Supply Configuration (N, Q Package Pinout) +15V 0.1µF +5V 0.1µF 1 –100mV 1k 8 2 5 0.1µF AD790 25Ω 130Ω 7 6 3 TEK 7904 SCOPE 4 MPS 571 –1.3V PULSE GENERATOR 0.1µF –1.7V HP8112 –15V HP2835 50Ω 400Ω 650Ω 10kΩ –5mV – 5V VOLTAGE SOURCE –5V 10Ω Figure 3. Response Time Test Circuit (N, Q Package Pinout) –4– REV. D Typical Performace Characteristics–AD790 TPC 1. Propagation Delay vs. Overdrive TPC 3. Propagation Delay vs. Fanout (LSTTL and CMOS) TPC 2. Propagation Delay vs. Load Capacitance OUTPUT LOW VOLTAGE – Volts 0.8 0.7 0.6 TEMP = +25°C 0.5 0.4 0.3 0.2 0.1 0.0 0 2 4 6 8 10 I SINK – mA TPC 6. Output Low Voltage vs. Sink Current TPC 5. Propagation Delay vs. Temperature TPC 4. Propagation Delay vs. Source Resistance tH OUTPUT LOW VOLTAGE – Volts 5.0 0 INPUT 4.9 4.8 TEMP = +25°C 4.7 tS 4.6 VIH 4.5 LATCH VIL 4.4 4.3 tPD VOH 4.2 0 2 4 6 ISOURCE – mA 8 TPC 7. Output High Voltage vs. Source Current OUTPUT 10 VOL TPC 8. Total Supply Current vs. Temperature tS = SETUP TIME tH = HOLD TIME tPD = COMPARATOR RESPONSE TIME Figure 4. Latch Timing REV. D –5– AD790 VOUT CIRCUIT DESCRIPTION The AD790 possesses the overall characteristics of a standard monolithic comparator: differential inputs, high gain and a logic output. However, its function is implemented with an architecture which offers several advantages over previous comparator designs. Specifically, the output stage alleviates some of the limitations of classic “TTL” comparators and provides a symmetric output. A simplified representation of the AD790 circuitry is shown in Figure 5. VH VH VOH VOL 0 +IN VOS VLOGIC VH = HYSTERESIS VOLTAGE + – A1 VOS = INPUT OFFSET VOLTAGE Q1 +IN 2 7 VOUT 3 GND +IN + – IN – OUTPUT Av Figure 6. Hysteresis Definitions (N, Q Package Pinout) – A2 + GAIN STAGE hysteresis range. This built-in hysteresis allows the AD790 to avoid oscillation when an input signal slowly crosses the ground level. Q2 OUTPUT STAGE SUPPLY VOLTAGE CONNECTIONS GND Figure 5. AD790 Block Diagram The output stage takes the amplified differential input signal and converts it to a single-ended logic output. The output swing is defined by the pull-up PNP and the pull-down NPN. These produce inherent rail-to-rail output levels, compatible with CMOS logic, as well as TTL, without the need for clamping to internal bias levels. Furthermore, the pull-up and pull-down levels are symmetric about the center of the supply range and are referenced off the VLOGIC supply and ground. The output stage has nearly symmetric dynamic drive capability, yielding equal rise and fall times into subsequent logic gates. Unlike classic TTL or CMOS output stages, the AD790 circuit does not exhibit large current spikes due to unwanted current flow between the output transistors. The AD790 output stage has a controlled switching scheme in which amplifiers A1 and A2 drive the output transistors in a manner designed to reduce the current flow between Q1 and Q2. This also helps minimize the disturbances feeding back to the input which can cause troublesome oscillations. The output high and low levels are well controlled values defined by VLOGIC (5 V), ground and the transistor equivalent Schottky clamps and are compatible with TTL and CMOS logic requirements. The fanout of the output stage is shown in TPC 3 for standard LSTTL or HCMOS gates. Output drive behavior vs. capacitive load is shown in TPC 2. HYSTERESIS The AD790 uses internal feedback to develop hysteresis about the input reference voltage. Figure 6 shows how the input offset voltage and hysteresis terms are defined. Input offset voltage (VOS) is the difference between the center of the hysteresis range and the ground level. This can be either positive or negative. The hysteresis voltage (VH) is one-half the width of the The AD790 may be operated from either single or dual supply voltages. Internally, the VLOGIC circuitry and the analog frontend of the AD790 are connected to separate supply pins. If dual supplies are used, any combination of voltages in which +VS ≥ VLOGIC – 0.5 V and –VS ≤ 0 may be chosen. For single supply operation (i.e., +VS = VLOGIC), the supply voltage can be operated between 4.5 V and 7 V. Figure 7 shows some other examples of typical supply connections possible with the AD790. BYPASSING AND GROUNDING Although the AD790 is designed to be stable and free from oscillations, it is important to properly bypass and ground the power supplies. Ceramic 0.1 µF capacitors are recommended and should be connected directly at the AD790’s supply pins. These capacitors provide transient currents to the device during comparator switching. The AD790 has three supply voltage pins, +VS, –VS and VLOGIC. It is important to have a common ground lead on the board for the supply grounds and the GND pin of the AD790 to provide the proper return path for the supply current. LATCH OPERATION The AD790 has a latch function for retaining input information at the output. The comparator decision is “latched” and the output state is held when Pin 5 is brought low. As long as Pin 5 is kept low, the output remains in the high or low state, and does not respond to changing inputs. Proper capture of the input signal requires that the timing relationships shown in Figure 4 are followed. Pin 5 should be driven with CMOS or TTL logic levels. The output of the AD790 will respond to the input when Pin 5 is at a high logic level. When not in use, Pin 5 should be connected to the positive logic supply. When using dual supplies, it is recommended that a 510 Ω resistor be placed in series with Pin 5 and the driving logic gate to limit input currents during powerup. –6– REV. D Applying the AD790 0.1µF 0.1µF 0.1µF 1 510Ω 1 +IN +IN 8 2 8 2 5 AD790 5 AD790 –IN The minus supply current is proportional to absolute temperature and compensates for the change in the sense resistance with temperature. The width and length of the PC board trace determine the resistance of the trace and consequently the trip current level. ILIMIT = 10 mV/RSENSE RSENSE = rho (trace length/trace width) +5V +5V + 12V OUT 7 6 3 7 OUT 6 3 –IN 4 4 0.1µF +VS = +12V, –VS = 0V –15V +5V VLOGIC = +5V 0.1µF rho = resistance of a unit square of trace +VS = +5V, –VS = –15V VLOGIC = +5V 1 +IN 8 2 –IN +VS 5 AD790 7 OUT 6 3 4 L O A D 0.1µF – 5V + 5V 0.1µF +VS = +5V, –VS = –5V, VLOGIC = +5V 1 PC BOARD TRACE Figure 7. Typical Power Supply Connections (N, Q Package Pinout) 5 AD790 Window Comparator for Overvoltage Detection +5V RSENSE Figure 9. Ground Referred Overload Detector Circuit (N, Q Package Pinout) Precision Full-Wave Rectifier 510Ω The high speed and precision of the AD790 make it suitable for use in the wide dynamic range full-wave rectifier shown in Figure 10. This circuit is capable of rectifying low level signals as small as a few mV or as high as 10 V. Input resolution, propagation delay and op amp settling will ultimately limit the maximum input frequency for a given accuracy level. Total comparator plus switch delay is approximately 100 ns, which limits the maximum input frequency to 1 MHz for clean rectification. SIGN 1 = HIGH 0 = LOW 8 5 AD790 7 6 2 4 OVERRANGE = 1 7432 –15V VIN 0.1µF +15V 0.1µF 2.7Ω ≈ 10mV/100mA 0.1µF 1 3 +5V 10k Ω 0.1µF 1 +15V 510Ω 8 3 0.1µF 5 AD790 –7.5V 10k Ω 7 6 2 VIN 20k Ω 4 +15V 0.1µF 7 2 AD711 3 4 0.1µF +5V 6 0.1µF –15V –15V 0.1µF 1 510Ω 8 3 5 Figure 8. Overvoltage Detector (N, Q Package Pinout) 6 2 4 The AD790 is useful as an overload detector for sensitive loads that must be powered from a single supply. A simple ground referenced overload detector is shown in Figure 8. The comparator senses a voltage across a PC board trace and compares that to a reference (trip) voltage established by the comparator’s minus supply current through a 2.7 Ω resistor. This sets up a 10 mV reference level that is compared to the sense voltage. FET SWITCHES THE GAIN FROM +1 TO –1 7 AD790 Single Supply Ground Referred Overload Detector REV. D OUTPUT 4 +15V +7.5V 7 6 3 The wide differential input range of the AD790 makes it suitable for monitoring large amplitude signals. The simple overvoltage detection circuit shown in Figure 8 illustrates direct connection of the input signal to the high impedance inputs of the comparator without the need for special clamp diodes to limit the differential input voltage across the inputs. 0.1µF 510Ω 8 2 NMOS FET (RON < 20 Ω) –15V 0.1µF Figure 10. Precision Full-Wave Rectifier (N, Q Package Pinout) –7– VOUT AD790 Bipolar to CMOS/TTL + 5V – 5V 4.7V BIPOLAR SIGNAL INPUT 0.3V 400Ω * 1 1k Ω 8 2 STANDARD SCHOTTKY DIODE 5 7 TTL LEVEL OUTPUT 6 3 4 GND *A RESISTOR UP TO 10k Ω MAYBE USED TO REDUCE THE SOURCE AND SINK CURRENT OF THE DRIVER. HOWEVER, THIS WILL SLIGHTLY LOWER THE MAXIMUM USABLE CLOCK RATE. Figure 11. A Bipolar to CMOS TTL Line Receiver (N, Q Package Pinout) It is sometimes desirable to translate a bipolar signal (e.g., ± 5 V) coming from a communications cable or another section of the system to CMOS/TTL logic levels; such an application is referred to as a line receiver. Previously, the interface to the bipolar signal required either a dual (± ) power supply or a reference voltage level about which the line receiver would switch. The AD790 may be used in a simple circuit to provide a unique capability: the ability to receive a bipolar signal while powered from a single 5 V supply. Other comparators cannot perform this task. Figure 11 shows a 1 kΩ resistor in series with the input signal which is then clamped by a Schottky diode, holding the input of the comparator at 0.4 V below ground. Although the comparator is specified for a common mode range down to –VS, (in this case ground) it is permissible to bring one of the inputs a few hundred mV below ground. The comparator switches around this level and produces a CMOS/TTL compatible swing. The circuit will operate to switching frequencies of 20 MHz. –8– REV. D AD790 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Pin Plastic Mini-DIP (N-8) Package 8-Pin Cerdip (Q-8) Package SOIC (R-8) Package 5.00 (0.1968) 4.80 (0.1890) 0.1574 (4.00) 0.1497 (3.80) 8 5 1 4 6.20 (0.2440) 5.80 (0.2284) PIN 1 0.50 (0.0196) ⴛ 45ⴗ 0.25 (0.0099) 1.27 (0.0500) BSC COPLANARITY 0.25 (0.0098) 0.10 (0.0040) SEATING PLANE 1.75 (0.0688) 1.35 (0.0532) 8ⴗ 0.25 (0.0098) 0ⴗ 1.27 (0.0500) 0.41 (0.0160) 0.19 (0.0075) 0.51 (0.0201) 0.33 (0.0130) CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN COMPLIANT TO JEDEC STANDARDS MS-012 AA REV. D –9– AD790 Revision History Location Page Data Sheet changed from REV. C to REV. D. Edits to SOIC (R-8) Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 03/02—Data Sheet changed from REV. B to REV. C. Edits to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Edits to PRODUCT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Deleted METALIZATION PHOTOGRAPH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 –10– REV. D –11– –12– PRINTED IN U.S.A. C00844–0–5/02(D)