Four Degrees of Freedom Inertial Sensor ADIS16300 14-bit digital gyroscope with digital range scaling ±75°/sec, ±150°/sec, ±300°/sec settings Tri-axis, 14-bit digital accelerometer ±3 g measurement range 13-bit pitch and roll incline calculations 330 Hz bandwidth 150 ms start-up time Factory-calibrated sensitivity, bias, and axial alignment Digitally controlled bias calibration Digitally controlled sample rate, up to 819.2 SPS External clock input enables sample rates up to 1200 SPS Digitally controlled filtering Programmable condition monitoring Auxiliary digital input/output Digitally activated self-test Programmable power management Embedded temperature sensor SPI-compatible serial interface Auxiliary, 12-bit ADC input and DAC output Single-supply operation: 4.75 V to 5.25 V 2000 g shock survivability Operating temperature range: −40°C to +85°C FUNCTIONAL BLOCK DIAGRAM AUX_ ADC AUX_ DAC TEMPERATURE SENSOR CS MEMS ANGULAR RATE SENSOR TRI-AXIS MEMS ACCELERATION SENSOR SCLK SIGNAL CONDITIONING AND CONVERSION CALIBRATION AND DIGITAL PROCESSING OUTPUT REGISTERS AND SPI INTERFACE DIN DOUT ALARMS SELF-TEST DIGITAL CONTROL POWER MANAGEMENT VCC GND ADIS16300 RST DIO1 DIO2 DIO3 DIO4 07842-001 FEATURES Figure 1. APPLICATIONS Medical instrumentation Robotics Platform control Navigation GENERAL DESCRIPTION The ADIS16300 iSensor® is a complete inertial system that includes a yaw rate gyroscope and tri-axis accelerometer. Each sensor in the ADIS16300 combines industry-leading iMEMS® technology with signal conditioning that optimizes dynamic performance. The factory calibration characterizes each sensor for sensitivity, bias, alignment, and linear acceleration (gyro bias). As a result, each sensor has its own dynamic compensation for correction formulas that provide accurate sensor measurements over the specified power supply range of +4.75 V to +5.25 V. The ADIS16300 provides a simple, cost-effective method for integrating accurate, multi-axis, inertial sensing into industrial systems, especially when compared with the complexity and investment associated with discrete designs. All necessary motion testing and calibration are part of the production process at the factory, greatly reducing system integration time. Tight orthogonal alignment simplifies inertial frame alignment in navigation systems. An improved SPI interface and register structure provide faster data collection and configuration control. The ADIS16300, along with a flex interface, drops into current systems that use the ADIS1635x family, providing the opportunity to scale cost for systems that only require four degrees of freedom inertial sensing. This compact module is approximately 23 mm × 31 mm × 7.5 mm and provides a standard connector interface, which enables horizontal or vertical mounting. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2008 Analog Devices, Inc. All rights reserved. ADIS16300 TABLE OF CONTENTS Features .............................................................................................. 1 Basic Operation .................................................................................9 Applications ....................................................................................... 1 Reading Sensor Data .....................................................................9 Functional Block Diagram .............................................................. 1 Device Configuration ...................................................................9 General Description ......................................................................... 1 Burst Mode Data Collection ........................................................9 Revision History ............................................................................... 2 Output Data Registers ............................................................... 11 Specifications..................................................................................... 3 Calibration................................................................................... 11 Timing Specifications .................................................................. 5 Operational Control................................................................... 12 Timing Diagrams.......................................................................... 5 Input/Output Functions ............................................................ 13 Absolute Maximum Ratings............................................................ 6 Diagnostics .................................................................................. 14 ESD Caution .................................................................................. 6 Outline Dimensions ....................................................................... 16 Pin Configuration and Function Descriptions ............................. 7 Ordering Guide .......................................................................... 16 Typical Performance Characteristics ............................................. 8 REVISION HISTORY 10/08—Revision 0: Initial Version Rev. 0 | Page 2 of 16 ADIS16300 SPECIFICATIONS TA = −40°C to +85°C, VCC = 5.0 V, angular rate = 0°/sec, dynamic range = ±300°/sec, ±1 g, unless otherwise noted. Table 1. Parameter GYROSCOPE Dynamic Range Initial Sensitivity Sensitivity Temperature Coefficient Misalignment Nonlinearity Initial Bias Error In-Run Bias Stability Angular Random Walk Bias Temperature Coefficient Linear Acceleration Effect on Bias Voltage Sensitivity Output Noise Rate Noise Density 3 dB Bandwidth Sensor Resonant Frequency Self-Test Change in Output Response ACCELEROMETERS Dynamic Range Initial Sensitivity Sensitivity Temperature Coefficient Misalignment Nonlinearity Initial Bias Error In-Run Bias Stability Velocity Random Walk Bias Temperature Coefficient Output Noise Noise Density 3 dB Bandwidth Sensor Resonant Frequency Self-Test Change in Output Response INCLINOMETER Sensitivity TEMPERATURE SENSOR Scale Factor Test Conditions TA = 25°C, dynamic range = ±300°/sec TA = 25°C, dynamic range = ±150°/sec TA = 25°C, dynamic range = ±75°/sec Min Typ ±300 0.0495 ±375 0.05 0.025 0.0125 400 0.1 ±0.5 0.1 ±3 0.007 1.9 0.1 0.05 0.25 1.1 0.038 330 14.5 ±1400 Reference to z-axis accelerometer, TA = 25°C Axis-to-frame (package), TA = 25°C Best fit straight line TA = 25°C, ±1 σ TA = 25°C, 1 σ, SMPL_PRD = 0x01 TA = 25°C, 1 σ, SMPL_PRD = 0x01 Any axis, 1 σ (MSC_CTRL Bit [7] = 1) VCC = 4.75 V to 5.25 V TA = 25°C, ±300°/sec range, no filtering TA = 25°C, f = 25 Hz, ±300°/sec, no filtering ±300°/sec range setting Each axis 25°C X axis and Y axis Z axis Axis-to-axis, TA = 25°C, Δ = 90° ideal Axis-to-frame (package), TA = 25°C Best fit straight line TA = 25°C, ±1 σ, X axis and Y axis TA = 25°C, ±1 σ, Z axis TA = 25°C, 1 σ, X axis and Y axis TA = 25°C, 1 σ, Z axis TA = 25°C, 1 σ, X axis and Y axis TA = 25°C, 1 σ, Z axis X axis and Y axis Z axis TA = 25°C, no filtering, X axis and Y axis TA = 25°C, no filtering, Z axis TA = 25°C, no filtering, X axis and Y axis TA = 25°C, no filtering, Z axis X axis and Y axis Z axis ±696 ±3 0.594 500 90 TA = 25°C output = 0x0000 Rev. 0 | Page 3 of 16 ±3.6 0.6 250 300 ±0.25 ±0.5 ±0.3 ±60 ±110 0.048 0.054 0.118 0.164 2.5 4.5 5 7.5 0.2 0.3 330 5.5 1100 450 Max 0.0505 ±2449 0.606 1700 860 Unit °/sec °/sec/LSB °/sec/LSB °/sec/LSB ppm/°C Degrees Degrees % of FS °/sec °/sec °/√hr °/sec/°C °/sec/g °/sec/V °/sec rms °/sec/√Hz rms Hz kHz LSB g mg/LSB ppm/°C ppm/°C Degrees Degrees % of FS mg mg mg mg m/sec/√hr m/sec/√hr mg/°C mg/°C mg rms mg rms mg/√Hz rms mg/√Hz rms Hz kHz LSB LSB 0.044 °/LSB 0.14 °C/LSB ADIS16300 Parameter ADC INPUT Resolution Integral Nonlinearity Differential Nonlinearity Offset Error Gain Error Input Range Input Capacitance DAC OUTPUT Resolution Relative Accuracy Differential Nonlinearity Offset Error Gain Error Output Range Output Impedance Output Settling Time LOGIC INPUTS 1 Input High Voltage, VINH Input Low Voltage, VINL Conditions Min Typ 12 ±2 ±1 ±4 ±2 0 During acquisition 5 kΩ/100 pF to GND +3.3 20 12 ±4 ±1 ±5 ±0.5 For Code 101 to Code 4095 0 +3.3 2 10 2.0 0.8 0.55 CS signal to wake up from sleep mode CS Wake-Up Pulse Width Logic 1 Input Current, IINH Logic 0 Input Current, IINL All Pins Except RST RST Pin Input Capacitance, CIN DIGITAL OUTPUTS1 Output High Voltage, VOH Output Low Voltage, VOL FLASH MEMORY Data Retention 3 FUNCTIONAL TIMES 4 Power-On Start-up Time Reset Recovery Time Sleep Mode Recovery Time Flash Memory Test Time Automatic Self-Test Time CONVERSION RATE Clock Accuracy Sync Input Clock POWER SUPPLY Power Supply Current Max 20 VIH = 3.3 V VIL = 0 V ISOURCE = 1.6 mA ISINK = 1.6 mA Endurance 2 TJ = 85°C Time until data is available Normal mode, SMPL_PRD ≤ 0x09 Low power mode, SMPL_PRD ≥ 0x0A Normal mode, SMPL_PRD ≤ 0x09 Low power mode, SMPL_PRD ≥ 0x0A ±10 −40 −1 10 −60 2.4 0.4 10,000 20 180 245 55 120 2.5 17 90 12 Normal mode, SMPL_PRD ≤ 0x09 Low power mode, SMPL_PRD ≥ 0x0A SMPL_PRD = 0x01 to 0xFF 0.413 Operating voltage range, VCC Low power mode at 25°C Normal mode at 25°C Sleep mode at 25°C 4.75 1 ±0.2 5.0 18 42 500 819.2 ±3 1.2 5.25 Unit Bits LSB LSB LSB LSB V pF Bits LSB LSB mV % V Ω μs V V V μs μA μA mA pF V V Cycles Years ms ms ms ms ms ms ms ms SPS % kHz V mA mA μA The digital I/O signals are driven by an internal 3.3 V supply, and the inputs are 5 V tolerant. Endurance is qualified as per JEDEC Standard 22, Method A117, and measured at −40°C, +25°C, +85°C, and +125°C. 3 The retention lifetime equivalent is at a junction temperature (TJ) of 85°C as per JEDEC Standard 22, Method A117. Retention lifetime decreases with junction temperature. 4 These times do not include thermal settling and internal filter response times (330 Hz bandwidth), which may impact overall accuracy. 2 Rev. 0 | Page 4 of 16 ADIS16300 TIMING SPECIFICATIONS TA = 25°C, VCC = 5 V, unless otherwise noted. Table 2. Parameter fSCLK tSTALL tREADRATE tCS tDAV tDSU tDHD tSCLKR, tSCLKF tDF, tDR tSFS t1 t2 t3 Normal Mode (SMPL_PRD < 0x09) Min 1 Typ Max 0.01 2.0 9 40 48.8 100 24.4 48.8 5 12.5 5 12.5 5 5 600 833 Description Stall period between data Read rate Chip select to clock edge DOUT valid after SCLK edge DIN setup time before SCLK rising edge DIN hold time after SCLK rising edge SCLK rise/fall times DOUT rise/fall times CS high after SCLK edge Input sync pulse width Input sync to data ready output Input sync period Low Power Mode (SMPL_PRD > 0x0A) Min1 Typ Max 0.01 0.3 75 100 48.8 100 24.4 48.8 5 12.5 5 12.5 5 Burst Mode Min1 Typ Max 0.01 1.0 1/fSCLK 48.8 100 24.4 48.8 5 5 12.5 12.5 5 1 Guaranteed by design and characterization, but not tested in production. TIMING DIAGRAMS CS tCS tSFS 1 2 3 4 5 6 15 16 SCLK tDAV MSB DB14 DB13 tDSU DIN W/R A6 DB12 DB11 A4 A3 DB10 DB2 DB1 LSB tDHD A5 A2 D2 D1 07482-002 DOUT LSB Figure 2. SPI Timing and Sequence tREADRATE tSTALL CS 07482-003 SCLK Figure 3. Stall Time and Data Rate t3 t2 t1 07482-004 SYNC CLOCK (DIO4) DATA READY Figure 4. Input Clock Timing Diagram Rev. 0 | Page 5 of 16 Unit MHz μs us ns ns ns ns ns ns ns μs μs μs ADIS16300 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Acceleration Any Axis, Unpowered Any Axis, Powered VCC to GND Digital Input Voltage to GND Digital Output Voltage to GND Analog Input to GND Operating Temperature Range Storage Temperature Range Rating 2000 g 2000 g −0.3 V to +6.0 V −0.3 V to +5.3 V −0.3 V to VCC + 0.3 V −0.3 V to +3.6 V −40°C to +85°C −65°C to +125°C1, 2 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 4. Package Characteristics Package Type 24-Lead Module 1 Extended exposure to temperatures outside the specified temperature range of −40°C to +85°C can adversely affect the accuracy of the factory calibration. For best accuracy, store the parts within the specified operating range of −40°C to +85°C. 2 Although the device is capable of withstanding short-term exposure to 150°C, long-term exposure threatens internal mechanical integrity. ESD CAUTION Rev. 0 | Page 6 of 16 θJA 39.8°C/W θJC 14.2°C/W Device Weight 16 grams ADIS16300 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS DIO3 SCLK DIN DIO1 DIO2 VCC GND GND DNC DNC AUX_ADC DNC 1 3 5 7 9 11 13 15 17 19 21 23 2 4 6 8 10 12 14 16 18 20 22 24 DIO4/CLKIN DOUT CS RST VCC VCC GND DNC DNC AUX_DAC DNC DNC TOP VIEW (Not to Scale) NOTES 1. CONNECTOR PINS ARE NOT VISIBLE FROM THE TOP VIEW. 2. THIS REPRESENTATION DISPLAYS THE TOP VIEW PINOUT FOR THE MATING SOCKET CONNECTOR. 3. DNC = DO NOT CONNECT. 07482-005 ADIS16300 Figure 5. Pin Configuration az SCREW HOLES (2x) ax ay 27mm INTERFACE TO SYSTEM PCB USING A RIBBON OR FLEX CABLE THAT HAS THE ADIS16300 MATING CONNECTOR INCLUDED. gYAW PIN 1 SYSTEM PRINTED CIRCUIT BOARD Figure 6. Device Orientation, Mounting, and Interface Diagrams Table 5. Pin Function Descriptions Pin No. 1 2 16, 17, 18, 19, 22, 23, 24 3 4 5 6 7 8 9 10, 11, 12 13, 14, 15 20 21 1 Mnemonic DIO3 DIO4/CLKIN DNC SCLK DOUT DIN CS DIO1 RST DIO2 VCC GND AUX_DAC AUX_ADC Type 1 I/O I/O N/A I O I I I/O I I/O S S O I Description Configurable Digital Input/Output. Configurable Digital Input/Output or Sync Clock Input. Do Not Connect. SPI Serial Clock. SPI Data Output. Clocks output on SCLK falling edge. SPI Data Input. Clocks input on SCLK rising edge. SPI Chip Select. Configurable Digital Input/Output. Reset. Configurable Digital Input/Output. Power Supply. Power Ground. Auxiliary, 12-Bit DAC Output. Auxiliary, 12-Bit ADC Input. S is supply, O is output, I is input, N/A is not applicable. Rev. 0 | Page 7 of 16 07482-006 ADIS16300 ADIS16300 TYPICAL PERFORMANCE CHARACTERISTICS 0.1 0.01 0.001 0.1 1 10 100 INTEGRATION TIME (sec) 1k 0.001 Z AXIS 0.0001 X AND Y AXES 07482-008 ROOT ALLAN VARIANCE (g) 0.01 07482-007 ROOT ALLAN VARIANCE (°/sec) 1 0.00001 0.1 10k 1 10 100 INTEGRATION TIME (sec) Figure 8. Accelerometer Allan Variance Figure 7. Gyroscope Allan Variance Rev. 0 | Page 8 of 16 1k 10k ADIS16300 The ADIS16300 is an autonomous sensor system that starts up after it has a valid power supply voltage and begins producing inertial measurement data at a sample rate of 819.2 SPS. After each sample cycle, the sensor data loads into the output registers and DIO1 pulses, providing a new-data-ready control signal for driving system-level interrupt service routines. In a typical system, a master processor accesses the output data registers through the SPI interface, using the hook-up shown in Figure 9. Table 6 provides a generic, functional description for each pin on the master processor. Table 7 describes the typical master processor settings normally found in a configuration register and used for communicating with the ADIS16300. I/O LINES ARE COMPATIBLE WITH 3.3V OR 5V LOGIC LEVELS 5V VDD 10 SYSTEM PROCESSOR SPI MASTER 11 12 6 CS SCLK 3 SCLK MOSI 5 DIN MISO 4 DOUT IRQ 7 DIO1 SPI SLAVE 14 15 Table 6. Generic Master Processor Pin Names and Functions Function Slave select Interrupt request Master output, slave input Master input, slave output Serial clock Table 7. Generic Master Processor SPI Settings Processor Setting Master SCLK Rate ≤ 2 MHz1 CPOL = 1 CPHA = 1 MSB-First 16-Bit 1 12 11 10 9 8 UPPER BYTE 7 6 5 4 3 LOWER BYTE 2 1 0 Figure 10. Output Register Bit Assignments READING SENSOR DATA Although the ADIS16300 produces data independently, it operates as an SPI slave device, which communicates with system (master) processors using the 16-bit segments displayed in Figure 11. Individual register reads require two 16-bit sequences. The first 16-bit sequence provides the read command bit (R/W = 0) and the target register address (A6…A0). The second sequence transmits the register contents (D15…D0) on the DOUT line. For example, if DIN= 0x0A00, then the content of XACCL_OUT shifts out on the DOUT line during the next 16-bit sequence. The user register memory map (see Table 8) identifies configuration registers with either a W or R/W. Configuration commands also use the bit sequence displayed in Figure 12. If the MSB is equal to 1, the last eight bits (DC7...DC0) in the DIN sequence load into the memory address associated with the address bits (A5...A0). For example, if the DIN = 0xA11F, then 0x1F loads into Address Location 0x26 (ALM_MAG1, upper byte) at the conclusion of the data frame. Figure 9. Electrical Hook-Up Diagram Pin Name SS IRQ MOSI MISO SCLK 13 DEVICE CONFIGURATION 07482-009 13 14 The SPI operates in full duplex mode, which means that the master processor can read the output data from DOUT while using the same SCLK pulses to transmit the next target address on DIN. ADIS16300 SS 15 07482-110 BASIC OPERATION Description The ADIS16300 operates as a slave. Normal mode, SMPL_PRD[7:0] < 0x08. Clock polarity. Clock phase. Bit sequence. Shift register/data length. For burst mode, SCLK rate ≤ 1 MHz. For low power mode, SCLK rate ≤ 300 kHz. The user registers provide addressing for all input/output operations on the SPI interface. Each 16-bit register has two 7-bit addresses: one for its upper byte and one for its lower byte. Table 8 provides the lower-byte address for each register, and Figure 10 provides the generic bit assignments. Most of the registers have a backup location in nonvolatile flash memory. The master processor must manage the backup function. Set GLOB_CMD[3] = 1 (DIN = 0xBE01) to execute a manual flash update (backup) operation, which copies the user registers into their respective flash memory locations. This operation takes 50 ms and requires the power supply voltage to be within the specified limit to complete properly. The FLASH_CNT register provides a running count of these events for managing the long-term reliability of the flash memory. BURST MODE DATA COLLECTION Burst mode data collection offers a more process-efficient method for collecting data from the ADIS16300. In 10 sequential data cycles (each separated by one SCLK period), all nine output registers clock out on DOUT. This sequence starts when the DIN sequence is 0011 1110 0000 0000 (0x3E00). Next, the contents of each output register are output from DOUT, starting with SUPPLY_OUT and ending with AUX_ADC (see Figure 12). The addressing sequence shown in Table 8 determines the order of the outputs in burst mode. Rev. 0 | Page 9 of 16 ADIS16300 Table 8. User Register Memory Map Name FLASH_CNT SUPPLY_OUT GYRO_OUT N/A N/A XACCL_OUT YACCL_OUT ZACCL_OUT TEMP_OUT PITCH_OUT ROLL_OUT AUX_ADC N/A GYRO_OFF N/A N/A XACCL_OFF YACCL_OFF ZACCL_OFF ALM_MAG1 ALM_MAG2 ALM_SMPL1 ALM_SMPL2 ALM_CTRL AUX_DAC GPIO_CTRL MSC_CTRL SMPL_PRD SENS_AVG SLP_CNT DIAG_STAT GLOB_CMD Flash Backup Yes No No N/A N/A No No No No No No No N/A Yes N/A N/A Yes Yes Yes Yes Yes Yes Yes Yes No No Yes Yes Yes No No N/A Address 1 0x00 0x02 0x04 0x06 0x08 0x0A 0x0C 0x0E 0x10 0x12 0x14 0x16 0x18 0x1A 0x1C 0x1E 0x20 0x22 0x24 0x26 0x28 0x2A 0x2C 0x2E 0x30 0x32 0x34 0x36 0x38 0x3A 0x3C 0x3E Default N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A 0x0000 N/A N/A 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0006 0x0001 0x0402 0x0000 0x0000 0x0000 Function Flash memory write count Power supply measurement X-axis gyroscope output Reserved Reserved X-axis accelerometer output Y-axis accelerometer output Z-axis accelerometer output X-axis gyroscope temperature measurement X-axis inclinometer output measurement Y-axis inclinometer output measurement Auxiliary ADC output Reserved X-axis gyroscope bias offset factor Reserved Reserved X-axis acceleration bias offset factor Y-axis acceleration bias offset factor Z-axis acceleration bias offset factor Alarm 1 amplitude threshold Alarm 2 amplitude threshold Alarm 1 sample size Alarm 2 sample size Alarm control Auxiliary DAC data Auxiliary digital input/output control Miscellaneous control Internal sample period (rate) control Dynamic range/digital filter control Sleep mode control System status System command Bit Assignments N/A Table 9 Table 9 N/A N/A Table 9 Table 9 Table 9 Table 9 Table 9 Table 9 Table 9 N/A Table 10 N/A N/A Table 11 Table 11 Table 11 Table 22 Table 22 Table 23 Table 23 Table 24 Table 18 Table 16 Table 17 Table 13 Table 15 Table 14 Table 21 Table 12 Each register contains two bytes. The address of the lower byte is displayed. The address of the upper byte is equal to the address of the lower byte, plus 1. CS SCLK DIN R/W DOUT D15 A6 A5 A4 A3 A2 A1 A0 DC7 DC6 DC5 DC4 DC3 DC2 DC1 DC0 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 R/W D15 A6 A5 D14 D13 07482-111 NOTES 1. DOUT BITS ARE BASED ON THE PREVIOUS 16-BIT SEQUENCE (R = 0). Figure 11. Output Register Bit Assignments CS 1 2 3 4 5 9 GYRO_OUT XACCL_OUT YACCL_OUT YINCL_OUT 10 SCLK DIN DOUT 0x3E00 PREVIOUS DON’T CARE SUPPLY_OUT Figure 12. Burst Mode Read Sequence Rev. 0 | Page 10 of 16 AUX_ADC 07482-012 1 R/W R R R N/A N/A R R R R R R R N/A R/W N/A N/A R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W W R W ADIS16300 OUTPUT DATA REGISTERS Auxiliary ADC Figure 6 provides the positive measurement direction for each inertial sensor (gyroscope and accelerometers). Table 9 provides the configuration and scale factor for each output data register in the ADIS16300. All inertial sensor outputs are 14-bits in length and are in twos complement format, which means that 0x0000 is equal to 0 LSB, 0x0001 is equal to +1 LSB, and 0x3FFF is equal to −1 LSB. The following is an example of how to calculate the sensor measurement from the GYRO_OUT: The AUX_ADC register provides access to the auxiliary ADC input channel. The ADC is a 12-bit successive approximation converter, which has an equivalent input circuit to the one in Figure 14. The maximum input range is +3.3 V. The ESD protection diodes can handle 10 mA without causing irreversible damage. The switch on-resistance (R1) has a typical value of 100 Ω. The sampling capacitor, C2, has a typical value of 16 pF. GYRO_OUT = 0x3B4A VCC D − 0x04B6 = −1206 LSB C1 Rate = 0.05°/sec × (− 1206) = −60.3°/sec Therefore, a GYRO_OUT output of 0x3B4A corresponds to a clockwise rotation about the z-axis (see Figure 6) of 60.3°/sec when looking at the top of the package. Bits 12 14 14 14 14 12 ROLL_OUT PITCH_OUT AUX_ADC 13 13 12 1 Format Binary, 5 V = 0x0814 Twos complement Twos complement Twos complement Twos complement Twos complement 25°C = 0x0000 Twos complement Twos complement Binary, 1 V = 0x04D9 Scale 2.42 mV 0.05°/sec 0.6 mg 0.6 mg 0.6 mg 0.14°C Each output data register uses the bit assignments shown in Figure 13. The ND flag indicates that unread data resides in the output data registers. This flag clears and returns to 0 during an output register read sequence. It returns to 1 after the next internal sample updates the registers with new data. The EA flag indicates that one of the error flags in the DIAG_STAT register (see Table 21) is active (true). The remaining 14-bits are for data. 07842-013 MSB FOR 14-BIT OUTPUT MSB FOR 12-BIT OUTPUT Manual Bias Calibration The bias offset registers in Table 10 and Table 11 provide a manual adjustment function for the output of each sensor. For example, if GYRO_OFF equals 0x1FF6, the GYRO_OUT offset shifts by −10 LSBs, or −0.125°/sec. The DIN command for the upper byte is DIN = 0x9B1F; for the lower byte, DIN = 0x9AF6. Table 10. GYRO_OFF Bits [15:13] [12:0] 0.044° 0.044° 0.81 mV Assumes that the scaling is set to ± 300°/sec. This factor scales with the range. ND EA Figure 14. Equivalent Analog Input Circuit (Conversion Phase: Switch Open, Track Phase: Switch Closed) CALIBRATION Table 9. Output Data Register Formats Register SUPPLY_OUT GYRO_OUT1 XACCL_OUT YACCL_OUT ZACCL_OUT TEMP_OUT D R1 C2 07842-011 0x000 − 0x33B4A = −0x04B6 = −(4 × 256 + 11 × 16 + 6 ) Figure 13. Output Register Bit Assignments Description Not used. Data bits. Twos complement, 0.0125°/sec per LSB. Typical adjustment range = ±50°/sec. Table 11. XACCL_OFF, YACCL_OFF, ZACCL_OFF Bits [15:12] [11:0] Description Not used. Data bits, twos complement 0.6 mg/LSB. Typical adjustment range = ±1.2 g. Gyroscope Automatic Bias Null Calibration Set GLOB_CMD[0] = 1 (DIN = 0xBE01) to execute this function, which measures GYRO_OUT and then loads GYRO_OFF with the opposite value to provide a quick bias calibration. Then, all sensor data resets to zero, and the flash memory updates automatically (50 ms). See Table 12. Gyroscope Precision Automatic Bias Null Calibration Inclinometers The ROLL_OUT and PITCH_OUT registers provide a tilt angle calculation, based on the accelerometers. The zero reference is the point at which the z-axis faces gravity for a north-east-down (NED) configuration. ⎛ YACCL _ OUT ⎞ ROLL _ OUT = a tan ⎜⎜ ⎟⎟ = φ ⎝ ZACCL _ OUT ⎠ Set GLOB_CMD[4] = 1 (DIN = 0xBE10) to execute this function, which takes the sensor offline for 30 seconds while it collects a set of GYRO_OUT data and calculates a more accurate bias correction factor. Once calculated, the correction factor loads into GYRO_OFF, all sensor data resets to zero, and the flash memory updates automatically (50 ms). See Table 12. ⎛ ⎞ − XACCL _ OUT ⎟⎟ PITCH _ OUT = a tan ⎜⎜ ⎝ YACCL _ OUT x sin(φ ) + ZACCL _ OUT x cos(φ ) ⎠ Rev. 0 | Page 11 of 16 ADIS16300 Restoring Factory Calibration Set GLOB_CMD[1] = 1 (DIN = 0xBE02) to execute this function, which resets each user calibration register (see Table 10 and Table 11) to 0x0000, resets all sensor data to zero, and automatically updates the flash memory (50 ms). See Table 12. Linear Acceleration Bias Compensation (Gyroscope) Set MSC_CTRL[7] = 1 (DIN = 0xB486) to enable correction for low frequency acceleration influences on gyroscope bias. Note that the DIN sequence also preserves the factory default condition for the data ready function (see Table 17). OPERATIONAL CONTROL Global Commands The GLOB_CMD register provides trigger bits for several useful functions. Setting the assigned bit to 1 starts each operation, which returns to the bit to 0 after completion. For example, set GLOB_CMD[7] = 1 (DIN = 0xBE80) to execute a software reset, which stops the sensor operation and runs the device through its start-up sequence. This includes loading the control registers with their respective flash memory locations prior to producing new data. Reading the GLOB_CMD registers (DIN = 0x3E00) starts the burst mode read sequence. Table 12. GLOB_CMD Bits [15:8] [7] [6:5] [4] [3] [2] [1] [0] Description Not used Software reset command Not used Precision autonull command Flash update command Auxiliary DAC data latch Factory calibration restore command Autonull command For example, set SMPL_PRD[7:0] = 0x0A (DIN = 0xB60A) for an internal sample period of 6.7 ms (sample rate = 149 SPS). For systems that value lower sample rates, in-system characterization can help determine performance trade-offs. Power Management Setting SMPL_PRD ≥ 0x0A also sets the sensor in low power mode. In addition to sensor performance, this mode also affects SPI data rates (see Table 2). Two sleep mode options are listed in Table 14. Set SLP_CNT[8] = 1 (DIN = 0xBB01) to start the indefinite sleep mode, which requires CS assertion (high to low), reset, or power cycle to wake-up. Set SLP_CNT[7:0] = 0x64 (DIN = 0xBA64) to put the ADIS16300 to sleep for 100 seconds, as an example of the programmable sleep time option. Table 14. SLP_CNT Bit [15:9] [8] [7:0] Description Not used Indefinite sleep mode, set to 1 Programmable time bits, 0.5 sec/LSB Digital Filtering The signal conditioning circuit of each sensor has a typical analog bandwidth of 350 Hz. A programmable Bartlett window FIR filter provides an opportunity for additional noise reduction on all output data registers. SENS_AVG[2:0] controls the number of taps according to the equation in Table 15. For example, set SENS_AVG[2:0] = 110 (DIN = 0xB806) to establish a 129-tap setting. 0 –20 –60 –80 –100 N=5 N=9 N = 33 N = 129 –120 tS = tB × NS + 1 –140 0.001 Table 13. SMPL_PRD Bit [15:8] [7] [6:0] 0.01 0.1 FREQUENCY (f/fS) Description Not used Time base (tB) 0 = 0.61035 ms, 1 = 18.921 ms Increment setting (NS) Internal sample period = tS = tB × NS + 1 Figure 15. Bartlett Window FIR Frequency Response Rev. 0 | Page 12 of 16 1 07482-010 The ADIS16300 performs best when the sample rate is set to the factory default setting of 819.2 SPS. For applications that value lower sample rates, the SMPL_PRD register controls the ADIS16300 internal sample (see Table 13), and the following relationship produces the sample rate: MAGNITUDE (dB) –40 Internal Sample Rate ADIS16300 Dynamic Range Data Ready I/O Indicator There are three dynamic range settings for the gyroscope: ±75°/sec, ±150°/sec, and ±300°/sec. The lower dynamic range settings (±75°/sec and ±150°/sec) limit the minimum filter tap sizes to maintain the resolution as the measurement range decreases. The recommended order for programming the SENS_AVG register is upper byte (sensitivity), followed by lower byte (filtering). For example, set SENS_AVG[10:8] = 010 (DIN = 0xB902) for a measurement range to ±150°/sec. The factory default sets DIO1 as a positive data ready indicator signal. The MSC_CTRL[2:0] register provides configuration options for changing this. For example, set MSC_CTRL[2:0] = 100 (DIN = 0xB404) to change the polarity of the data ready signal for interrupt inputs that require negative logic inputs for activation. The pulse width will be between 100 μs and 200 μs over all conditions. Table 15. SENS_AVG Bits [15:12] [11] Bits [15:11] [10:8] Value 100 010 001 [7:3] [2:0] Description Not used Measurement range (sensitivity) selection ±300°/sec (default condition) ±150°/sec, filter taps ≥ 4 (Bits[2:0] ≥ 0x02) ±75°/sec, filter taps ≥ 16 (Bits[2:0] ≥ 0x04) Not used Filter tap setting, number of taps N = 2M+1 for M > 0, N = 1 for M = 0 Table 17. MSC_CTRL [10] [9] [8] [7] INPUT/OUTPUT FUNCTIONS General-Purpose I/O [6] DIO1, DIO2, DIO3, and DIO4 are configurable, general-purpose I/O lines that serve multiple purposes according to the following control register priority: MSC_CTRL, ALM_CTRL, and GPIO_CTRL. For example, set GPIO_CTRL = 0x080C (DIN = 0xB508, then 0xB40C) to set DIO1 and DIO2 as inputs and DIO3 and DIO4 as outputs, with DIO3 set low and DIO4 set high. [5:3] [2] [1] [0] Table 16. GPIO_CTRL Bit [15:12] [11] [10] [9] [8] [7:4] [3] [2] [1] [0] Description Not used General-Purpose I/O Line 4 (DIO4) data level General-Purpose I/O Line 3 (DIO3) data level General-Purpose I/O Line 2 (DIO2) data level General-Purpose I/O Line 1 (DIO1) data level Not used General-Purpose I/O Line 4 (DIO4), direction control 1 = output, 0 = input General-Purpose I/O Line 3 (DIO3), direction control 1 = output, 0 = input General-Purpose I/O Line 2 (DIO2), direction control 1 = output, 0 = input General-Purpose I/O Line 1 (DIO1), direction control 1 = output, 0 = input Description Not used Memory test (clears on completion) 1 = enabled, 0 = disabled Internal self-test enable (clears on completion) 1 = enabled, 0 = disabled Manual self-test, negative stimulus 1 = enabled, 0 = disabled Manual self-test, positive stimulus 1 = enabled, 0 = disabled Linear acceleration bias compensation for gyroscopes 1 = enabled, 0 = disabled Linear accelerometer origin alignment 1 = enabled, 0 = disabled Not used Data ready enable 1 = enabled, 0 = disabled Data ready polarity 1 = active high, 0 = active low Data ready line select 1 = DIO2, 0 = DIO1 Auxiliary DAC The 12-bit AUX_DAC line can drive its output to within 5 mV of the ground reference when it is not sinking current. As the output approaches 0 V, the linearity begins to degrade (~100 LSB beginning point). As the sink current increases, the nonlinear range increases. The DAC latch command moves the values of the AUX_DAC register into the DAC input register, enabling both bytes to take effect at the same time. Table 18. AUX_DAC Bit [15:12] [11:0] Description Not used Data bits, scale factor = 0.8059 mV/code Offset binary format, 0 V = 0 codes Table 19. Setting AUX_DAC = 1V Input Clock Configuration The input clock configuration function allows for external control over sampling in the ADIS16300. Set GPIO_CTRL[3] = 0 (DIN = 0x0B200) and SMPL_PRD[7:0] = 0x00 (DIN = 0xB600) to enable this function. See Table 2 and Figure 4 for timing information. DIN 0XB0D9 0xB104 0xBE04 Rev. 0 | Page 13 of 16 Descripition AUX_DAC[7:0] = 0xD9 (217 LSB). AUX_DAC[15:8] = 0x04 (1024 LSB). GLOB_CMD[2] = 1. Move values into the DAC input register, resulting in a 1 V output level. ADIS16300 DIAGNOSTICS Status Self-Test The error flags provide indicator functions for common system level issues. All of the flags clear (set to 0) after each DIAG_STAT register read cycle. If an error condition remains, the error flag returns to 1 during the next sample cycle. DIAG_STAT[1:0] does not require a read of this register to return to zero. If the power supply voltage goes back into range, these two flags clear automatically. Self-test offers the opportunity to verify the mechanical integrity of each MEMS sensor. It applies an electrostatic force to each sensor element, which results in mechanical displacement that simulates a response to actual motion. Table 1 lists the expected response for each sensor, which provides pass/fail criteria. Set MSC_CTRL[10] = 1 (DIN = 0xB504) to run the internal self-test routine, which exercises all inertial sensors, measures each response, makes pass/fail decisions, and reports them to error flags in the DIAG_STAT register. MSC_CTRL[10] resets itself to 0 after completing the routine. MSC_CTRL[9:8] (DIN = 0xB502 or 0xB501) provides manual control over the self-test function. Table 20 gives an example test flow for using this option. Table 20. Manual Self-Test Example Sequence DIN 0xB601 0xB904 0xB802 0x0400 0x0600 0x0800 0x0A00 0xB502 0x0400 0xB501 0x0400 0x0600 0x0800 0x0A00 0xB500 Description SMPL_PRD[7:0] = 0x01, sample rate = 819.2 SPS. SENS_AVG[15:8] = 0x04, gyro range = ±300°/sec. SENS_AVG[7:0] = 0x02, 4-tap averaging filter. Delay = 50 ms. Read GYRO_OUT. Read XACCL_OUT. Read YACCL_OUT. Read ZACCL_OUT. MSC_CTRL[9] = 1, gyroscope negative self-test. Delay = 50 ms. Read GYRO_OUT. Determine whether the bias in the gyroscope output changes according to the expectation set in Table 2. MSC_CTRL[9:8] = 01, gyroscope/accelerometer positive self-test. Delay = 50 ms. Read GYRO_OUT. Read XACCL_OUT. Read YACCL_OUT. Read ZACCL_OUT Determine whether the bias in the gyroscope and accelerometers changed according to the expectation set in Table 2. MSC_CTRL[15:8] = 0x00. Zero motion provides results that are more reliable. The settings in Table 20 are flexible and provide opportunity for optimization around speed and noise influence. For example, lowering the filtering taps enables lower delay times but increases the opportunity for noise influence. Memory Test Setting MSC_CTRL[11] = 1 (DIN = 0xB508) does a check-sum verification of the flash memory locations. The pass/fail criteria load into the DIAG_STAT[6] register. Table 21. DIAG_STAT Bit Descriptions Bit [15] [14] [13] [12:11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0] Description Z-axis accelerometer self-test failure 1 = error condition, 0 = normal operation Y-axis accelerometer self-test failure 1 = error condition, 0 = normal operation X-axis accelerometer self-test failure 1 = error condition, 0 = normal operation Not used Gyroscope self-test failure 1 = error condition, 0 = normal operation Alarm 2 status 1 = active, 0 = inactive Alarm 1 status 1 = active, 0 = inactive Not used Flash test, check-sum flag 1 = failure, 0 = normal operation Self-test diagnostic error flag 1 = error condition, 0 = normal operation Sensor overrange 1 = error condition, 0 = normal operation SPI communications failure 1 = error condition, 0 = normal operation Flash update failed 1 = error condition, 0 = normal operation Power supply above 5.25 V 1 = power supply ≥ 5.25 V, 0 = power supply ≤ 5.25 V Power supply below 4.75 V 1 = power supply ≤ 4.75 V, 0 = power supply ≥ 4.75 V Alarm Registers The alarm function provides monitoring for two independent conditions. The ALM_CTRL register provides control inputs for data source, data filtering (prior to comparison), static comparison, dynamic rate-of-change comparison, and output indicator configurations. The ALM_MAGx registers establish the trigger threshold and polarity configurations. Table 25 gives an example of how to configure a static alarm. The ALM_SMPLx registers provide the numbers of samples to use in the dynamic rate-of-change configuration. The period equals the number in the ALM_SMPLx register, multiplied by the sample period time, established by the SMPL_PRD register. See Table 26 for an example of how to configure the sensor for this type of function. Rev. 0 | Page 14 of 16 ADIS16300 Table 22. ALM_MAG1, ALM_MAG2 Bit [15] [14] [13:0] Description Comparison polarity 1 = greater than, 0 = less than Not used Data bits that match the format of the trigger source selection Table 23. ALM_SMPL1, ALM_SMPL2 Bit [15:8] [7:0] Description Not used Data bits: number of samples (both 0x00 and 0x01 = 1) Value 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 [11:8] [7] [6] [5] [4] [3] [2] [1] [0] 1 DIN 0xAF55 0xAE17 0xA783 0xA641 0xA93C 0xA8BF Description ALM_CTRL = 0x5517. Alarm 1 input = XACCL_OUT. Alarm 2 input = XACCL_OUT. Static level comparison, filtered data. DIO2 output indicator, positive polarity. ALM_MAG1 = 0x8341. Alarm 1 is true if XACCL_OUT > 0.5 g. ALM_MAG2= 0x3CBF. Alarm 2 is true if XACCL_OUT < −0.5 g. Table 26. Alarm Configuration Example 2 Table 24. ALM_CTRL Bit Designations Bits [15:12] Table 25. Alarm Configuration Example 1 Description Alarm 2 source selection Disable Power supply output Gyroscope output Not used Not used X-axis accelerometer output Y-axis accelerometer output Z-axis accelerometer output Gyroscopes temperature output X-axis inclinometer output Y- axis inclinometer output Auxiliary ADC input Alarm 1 source selection (same as Alarm 2) Rate of change (ROC) enable for Alarm 2 1 = rate of change, 0 = static level Rate of change (ROC) enable for Alarm 1 1 = rate of change, 0 = static level Not used Comparison data filter setting1 1 = filtered data, 0 = unfiltered data Not used Alarm output enable 1 = enabled, 0 = disabled Alarm output polarity 1 = active high, 0 = active low Alarm output line select 1 = DIO2, 0 = DIO1 DIN 0xAF76 0xAE87 0xB601 0xAB08 0xAC50 0xA783 0xA641 0xA93C 0xA8BE Incline outputs always use filtered data in this comparison. Rev. 0 | Page 15 of 16 Description ALM_CTRL = 0x7687. Alarm 1 input = ZACCL_OUT. Alarm 2 input = YACCL_OUT. Rate of change comparison, unfiltered data. DIO2 output indicator, positive polarity. SMPL_PRD = 0x0001. Sample rate = 819.2 SPS. ALM_SMPL1 = 0x0008. Alarm 1 rate of change period = 9.77 ms. ALM_SMPL2= 0x0050. Alarm 2 rate of change period = 97.7 ms. ALM_MAG1 = 0x8341. Alarm 1 is true if XACCL_OUT > 0.5 g. ALM_MAG2= 0x3CBE. Alarm 2 is true if XACCL_OUT < −0.5 g. ADIS16300 OUTLINE DIMENSIONS 31.254 31.000 30.746 13.60 13.50 13.40 13.60 13.50 13.40 2.20 THRU HOLE (2 PLACES) 23.254 23.000 22.746 9.134 8.880 8.626 14.35 TOP VIEW DETAIL A 12.70 7.18 6.424 6.170 5.916 7.20 MAX 1.27 3.05 0.64 1.754 1.500 1.246 END VIEW 1.27 BSC CONNECTOR PITCH 090308-A DETAIL A Figure 16. 24-Lead Module with Connector Interface (ML-24-4) Dimensions shown in millimeters ORDERING GUIDE Model ADIS16300AMLZ 1 ADIS16300/PCBZ1 1 Temperature Range −40°C to +85°C Package Description 24-Lead Module with Connector Interface Interface Board Z = RoHS Compliant Part. ©2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07842-0-10/08(0) Rev. 0 | Page 16 of 16 Package Option ML-24-4