AVAGO AMMC-6232

AMMC-6232
18 to 32 GHz GaAs High Linearity Low Noise Amplifier
Data Sheet
Description
Features
Avago Technologies AMMC-6232 is an easy-to-use
broadband, high gain, high linearity Low Noise Amplifier
that operates from 18 GHz to 32GHz. The wide band and
unconditionally stable performance makes this MMIC
ideal as a primary or sub-sequential low noise block or
a transmitter or LO driver. The MMIC has 4 gain stages
and requires a 4V, 135mA power supply for optimal
performance. The two gate bias voltages can be combined
for ease of use or separated for more control flexibility. DCblock capacitors are integrated at the input and output
stages. Since this MMIC covers several bands, it can reduce
part inventory and increase volume purchase options The
MMIC is fabricated using PHEMT technology to provide
exceptional low noise, gain and power performance. The
backside of the chip is both RF and DC ground which
helps simplify the assembly process and reduce assembly
related performance variations and cost.
• 800μm x 2000μm Die Size
• Single Positive Bias Supply
• Unconditionally Stable
Specifications (Vdd = 4.0V, Idd = 135mA)
•
•
•
•
•
RF Frequencies: 18 - 32 GHz
High Output IP3: 29dBm
High Small-Signal Gain: 27dB
Typical Noise Figure: 2.8dB
Input, Output Match: -10dB
Applications
•
•
•
•
Microwave Radio systems
Satellite VSAT, DBS Up/Down Link
LMDS & Pt-Pt mmW Long Haul
Broadband Wireless Access
(including 802.16 and 802.20 WiMax)
• WLL and MMDS loops
• Commercial grade military
Note:
1. This MMIC uses depletion mode pHEMT devices.
Chip Size: 800 μm x 2000μm (31.5 x 78.74 mils)
Chip Size Tolerance: ±10 μm (±0.4 mils)
Chip Thickness: 100 ± 10 μm (4 ±0.4 mils)
Pad Dimensions: 100 x 100 μm (4 x 4 mils)
Attention:
Observe precautions for
handling electrostatic
sensitive devices.
ESD Machine Model (Class A)
ESD Human Body Model (Class 1A)
Refer to Avago Application Note A004R:
Electrostatic Discharge Damage and Control
Absolute Maximum Ratings (1)
Parameters / Conditions
Symbol
Unit
Max
Drain to Ground Voltage
Vdd
V
5.5
Gate-Drain Voltage
Vgd
V
-8
Drain Current
Idd
mA
200
Gate Bias Voltage
Vg
V
+0.8
Gate Bias Current
Ig
mA
1
RF CW Input Power Max
Pin
dBm
15
Max channel temperature
Tch
C
+150
Storage temperature
stg
C
-65 +150
Maximum Assembly Temp
Tmax
C
260 for 20s
(1) Operation in excess of any of these conditions may result in permanent damage to this device. The absolute maximum ratings for Vdd, Vgd, Idd Vg,
Ig and Pin were determined at an ambient temperature of 25°C unless noted otherwise.
DC Specifications/ Physical Properties (2)
Parameter and Test Condition
Symbol
Unit
Drain Supply Current (Vd=4.0 V)
Idd
mA
Drain Supply Voltage
Vd
V
Gate Bias Current
Ig
mA
Gate Bias Voltage
Vg
V
Thermal Resistance(3)
θjc
°C/W
Min
3
Typ
Max
135
150
4
5
0.1
-1.3
-0.95
-0.55
35.1
(2) Ambient operational temperature TA=25°C unless noted
(3) Channel-to-backside Thermal Resistance (Tchannel = 34°C) as measured using infrared microscopy. Thermal Resistance at backside temp.
(Tb) = 25°C calculated from measured data.
AMMC-6232 RF Specifications (4)
TA= 25°C, Vdd = 4.0 V, Idd = 135mA, Zo=50 Ω
Spec
Parameters and Test Conditions
Symbol
Unit
Frequency
(GHz)
Small signal gain (4)
AGain
dB
20
23
32
26
23
26.7
31
23
24.6
Noise Figure into 50W
(4)
NF
dB
Min
Typ
20
3.2
4.5
26
3.3
4.5
4
4.5
31
Output Power at 1dB Gain Compression (4)
P1dB
dBm
20, 26, 31
15
20
Output Third Order Intercept Point (4)
OIP3
dBm
20
26
28
26
26
28
31
26
27
Isolation
S12
dB
20, 26, 31
-50
Input Return Loss
S11
dB
20, 26, 31
-10
Output Return Loss
S22
dB
20, 26, 31
-10
(4) All tested parameters guaranteed with measurement accuracy ±5dBm for OPI3 and ± 2dB for gain, NF and P1dB.
Max
AMMC-6232 Typical Performance[1]
40
5
30
4
NoiseFigure (dB)
S21 (dB)
(TA = 25°C, Vdd=4V, Idd=135mA, Zin = Zout = 50 Ω, on-wafer unless noted)
20
10
3
2
1
0
0
15
20
25
30
18
35
20
22
Figure 1. Small-signal Gain
30
32
30
32
30
32
20
OP1dB (dBm)
S11 (dB)
28
Figure 2. Noise Figure
0
-10
-20
-30
15
20
25
30
15
10
5
35
18
20
22
Frequency (GHz)
24
26
28
Frequency (GHz)
Figure 4. Output P-1dB
Figure 3. Input Return Loss
40
0
OIP3 (dBm)
-5
S22 (dB)
26
Frequency (GHz)
Frequency (GHz)
-10
-15
30
20
10
0
-20
15
20
25
30
Frequency (GHz)
Figure 5. Output Return Loss
Note
[1] Noise Figure is measured with a 3-dB pad at the input
24
35
18
20
22
24
26
28
Frequency (GHz)
Figure 6. Output IP3
AMMC-6232 Typical Performance (Cont)
-20
200
-30
170
Idd (mA)
S12 (dB)
(TA = 25°C, Vdd=4V, Idd=135mA, Zin = Zout = 50 Ω, on-wafer unless noted)
-40
-50
140
110
80
-60
50
-70
15
20
25
30
3
35
3.5
5
NoiseFigure (dB)
S21 (dB)
30
20
4V
10
5V
3V
15
20
25
30
4
3
2
3V
4V
5V
1
0
0
18
35
Figure 9. Small-signal Gain Over Vdd
20
22
24
26
28
30
32
Frequency (GHz)
Frequency (GHz)
Figure 10. Noise Figure Over Vdd
0
S22 (dB)
0
S11 (dB)
5
Figure 8. Idd Over Vdd (same Vg)
40
-10
4V
-20
-10
4V
-20
5V
3V
5V
15
20
25
30
Frequency (GHz)
Figure 11. Input Return Loss Over Vdd
3V
-30
-30
4.5
Vdd (V)
Frequency (GHz)
Figure 7. Isolation
4
35
15
20
25
30
Frequency (GHz)
Figure 12. Output Returrn Loss Over Vdd
35
AMMC-6232 Typical Performance (Cont)
25
40
20
30
OIP3 (dBm)
OP1dB (dBm)
(TA = 25°C, Vdd=4V, Idd=135mA, Zin = Zout = 50 Ω, on-wafer unless noted)
15
3V
10
4V
20
22
24
26
28
30
5V
0
5
20
4V
10
5V
18
3V
18
32
20
Frequency (GHz)
28
30
32
NoiseFigure (dB)
5
30
S21 (dB)
26
Figure 14. Output IP3 Over Vdd
40
20
25C
10
85C
4
3
2
-45C
1
25C
0
15
20
25
30
Frequency (GHz)
18
35
Figure 15. Small-signal Gain Over Temperature
-10
S22 (dB)
-10
25C
Figure 17. Output P-1dB Over Vdd
26
28
30
32
85C
-40C
85C
20
25
30
Frequency (GHz)
24
25C
-20
-40C
15
22
Figure 16. Noise Figure Over Temperature
0
-30
20
Frequency (GHz)
0
-20
85C
0
-40C
S11 (dB)
24
Frequency (GHz)
Figure 13. Output P1dB Over Vdd
22
-30
35
15
20
25
30
Frequency (GHz)
Figure 18. Output IP3 Over Vdd
35
AMMC-6232 Typical S-parameters
(TA = 25°C, Vdd=4V, Idd=135mA, Zin = Zout = 50 Ω unless noted)
S11
Freq
Mag
dB
Phase
1.0
0.818
-1.746
-60.021
3.0
0.804
-1.897 -116.721
5.0
0.887
-1.039 -156.457
7.0
0.899
-0.929
173.389
9.0
0.886
-1.052
146.339
11.0
0.777
-2.188
121.351
13.0
0.735
-2.669
90.767
14.0
0.678
-3.381
71.345
15.0
0.638
-3.905
50.092
16.0
0.613
-4.256
22.797
17.0
0.660
-3.612
-17.199
18.0
0.529
-5.528
-78.705
18.5
0.406
-7.827 -102.424
19.0
0.354
-9.008 -119.585
19.5
0.312
-10.119 -133.759
20.0
0.290
-10.761 -151.887
20.5
0.283
-10.954 -175.381
21.0
0.268
-11.450 161.839
21.5
0.232
-12.699 147.124
22.0
0.196
-14.174 120.747
22.5
0.142
-16.979
98.811
23.0
0.118
-18.530
74.852
23.5
0.094
-20.582
50.063
24.0
0.070
-23.065
33.219
24.5
0.082
-21.723 -23.615
25.0
0.086
-21.283 -48.577
25.5
0.086
-21.326 -61.417
26.0
0.086
-21.335 -72.999
26.5
0.100
-20.009 -85.033
27.0
0.121
-18.335 -90.393
27.5
0.140
-17.079 -92.085
28.0
0.147
-16.671 -93.567
28.5
0.168
-15.504 -104.424
29.0
0.184
-14.710 -106.694
29.5
0.206
-13.734 -112.920
30.0
0.217
-13.275 -114.467
30.5
0.222
-13.092 -115.644
31.0
0.212
-13.457 -121.023
31.5
0.225
-12.964 -128.559
32.0
0.246
-12.171 -130.429
33.0
0.289
-10.784 -129.264
34.0
0.267
-11.479 -149.919
35.0
0.276
-11.175 -154.786
36.0
0.231
-12.724 -162.131
37.0
0.215
-13.355 -179.755
38.0
0.218
-13.217 -179.314
39.0
0.162
-15.796 150.316
40.0
0.188
-14.505 101.424
41.0
0.331
-9.592
20.449
42.0
0.671
-3.471
-34.435
43.0
0.822
-1.701
-80.398
44.0
0.744
-2.570 -102.406
45.0
0.745
-2.557 -120.374
46.0
0.756
-2.425 -128.181
47.0
0.698
-3.125 -138.988
48.0
0.716
-2.899 -145.786
49.0
0.715
-2.916 -151.057
50.0
0.748
-2.517 -163.929
Note: S-parameters are measured on wafer.
Mag
0.025
0.014
0.002
0.001
0.016
0.193
0.661
1.397
3.160
7.829
21.310
40.832
41.585
40.952
41.088
41.954
42.834
42.840
41.949
40.151
37.945
35.378
32.869
30.641
29.175
27.913
26.734
25.441
24.006
22.974
21.829
21.205
20.735
20.656
20.761
20.431
20.688
20.734
20.612
20.304
19.283
16.963
14.380
11.218
8.435
6.181
4.695
3.671
2.964
1.992
0.906
0.350
0.146
0.042
0.039
0.018
0.012
0.020
S21
dB
-31.992
-36.892
-52.654
-61.276
-35.917
-14.294
-3.593
2.907
9.993
17.874
26.572
32.220
32.379
32.246
32.274
32.455
32.636
32.637
32.455
32.074
31.583
30.975
30.336
29.726
29.300
28.916
28.541
28.111
27.607
27.225
26.781
26.529
26.334
26.301
26.345
26.206
26.314
26.334
26.282
26.152
25.703
24.590
23.155
20.999
18.522
15.821
13.433
11.297
9.438
5.985
-0.862
-9.118
-16.688
-27.587
-28.136
-34.910
-38.392
-33.979
Phase
-173.734
-107.504
165.254
178.332
-29.907
-3.415
-106.340
-146.177
173.145
127.412
66.397
-25.727
-68.344
-103.547
-134.623
-163.735
166.906
136.860
108.907
80.907
55.254
30.342
7.146
-14.152
-35.291
-55.741
-76.327
-96.844
-116.383
-135.333
-153.561
-171.261
170.769
152.609
133.333
114.454
94.813
73.377
52.636
31.050
-13.920
-60.335
-106.453
-153.267
161.897
120.672
80.964
39.388
-9.143
-70.226
-124.255
-164.509
162.943
142.437
139.233
131.635
-129.632
113.911
Mag
0.003
0.002
0.002
0.002
0.001
0.001
0.002
0.004
0.003
0.003
0.004
0.002
0.001
0.002
0.004
0.003
0.003
0.004
0.003
0.004
0.003
0.003
0.002
0.006
0.003
0.003
0.002
0.002
0.000
0.002
0.002
0.003
0.006
0.003
0.002
0.002
0.003
0.003
0.003
0.001
0.007
0.006
0.003
0.003
0.003
0.006
0.006
0.004
0.007
0.005
0.004
0.012
0.019
0.014
0.008
0.013
0.029
0.051
S12
dB
-49.134
-54.203
-52.786
-52.130
-64.067
-58.094
-55.057
-49.054
-51.286
-50.242
-48.669
-54.514
-56.637
-53.933
-48.533
-50.000
-51.175
-47.869
-50.079
-49.044
-51.053
-51.240
-53.496
-44.954
-51.886
-50.720
-55.542
-53.122
-70.458
-52.072
-53.736
-51.674
-44.656
-50.322
-55.781
-55.378
-51.486
-51.134
-51.287
-59.538
-42.943
-44.688
-49.125
-50.088
-50.724
-44.152
-44.523
-47.382
-43.734
-45.667
-48.650
-38.071
-34.517
-36.790
-41.590
-37.614
-30.658
-25.798
Phase
72.088
-170.740
169.502
89.767
-146.750
-30.428
41.432
-113.664
12.903
-7.415
132.091
-150.466
-23.683
125.705
-99.868
-84.512
101.027
-35.577
141.804
-66.647
-43.775
-54.194
-170.142
125.867
59.279
-117.666
-174.291
129.172
-6.235
96.583
175.096
-150.054
-42.304
-50.809
-91.759
-142.825
97.286
116.486
-43.352
47.465
-140.352
37.600
29.465
-115.073
-89.514
-113.404
10.595
-175.209
-17.567
45.831
77.675
-38.925
-30.836
-116.379
4.635
-168.514
148.528
-6.722
Mag
0.954
0.590
0.836
0.784
0.743
0.743
0.661
0.609
0.547
0.496
0.448
0.385
0.384
0.365
0.359
0.332
0.321
0.295
0.319
0.305
0.286
0.268
0.279
0.258
0.283
0.274
0.267
0.252
0.243
0.215
0.190
0.180
0.169
0.164
0.134
0.095
0.097
0.093
0.077
0.122
0.227
0.288
0.389
0.414
0.502
0.547
0.582
0.664
0.660
0.722
0.735
0.768
0.822
0.778
0.870
0.840
0.856
0.927
S22
dB
-0.405
-4.586
-1.555
-2.113
-2.583
-2.575
-3.600
-4.312
-5.241
-6.087
-6.966
-8.281
-8.305
-8.753
-8.899
-9.567
-9.865
-10.589
-9.931
-10.307
-10.877
-11.448
-11.087
-11.772
-10.968
-11.231
-11.484
-11.956
-12.272
-13.349
-14.435
-14.901
-15.457
-15.678
-17.439
-20.401
-20.267
-20.671
-22.279
-18.257
-12.866
-10.820
-8.194
-7.655
-5.992
-5.242
-4.699
-3.554
-3.604
-2.826
-2.670
-2.293
-1.706
-2.186
-1.206
-1.514
-1.353
-0.657
Phase
-72.004
-135.849
-171.399
157.037
136.088
110.111
78.986
62.630
47.093
28.418
11.714
-4.471
-12.762
-22.510
-30.282
-38.594
-53.085
-58.661
-73.699
-75.111
-83.302
-92.687
-101.188
-103.724
-109.636
-120.741
-134.054
-141.622
-147.702
-151.808
-157.448
-169.765
-174.716
179.624
169.927
156.964
115.370
90.295
45.612
4.816
-23.228
-45.951
-60.818
-71.849
-87.410
-93.971
-105.709
-111.896
-120.779
-128.518
-132.437
-143.230
-144.474
-154.332
-160.348
-161.626
-170.390
-171.490
AMMC-6232 Application and Usage
Biasing and Operation
To VDD DC supply
0.1 uF Capacitor
VD1
RF INPUT
VD2
RF OUTPUT
AMMC-6232
After adjusting the gate bias to obtain 135mA at Vdd = 4V,
the AMMC-6232 can be safely biased at Vdd= 3V or 5V (while
fixing the gate bias) as desired. At 4V, the performance is
an optimal compromise between power consumption,
gain and power/linearity. It is both applicable to be used
as a low noise block or driver. At 3V, the amplifier is ideal
as a front end low noise block where linearity is not highly
required. At 5V, the amplifier can provide ~ 2dB more
output power for LO or transmitter driver applications
where high output power and linearity are often required.
To VGate DC supply
Figure 19. Gate Bias Combined Together
To VDD DC supply
0.1 uF Capacitor
VD1
RF INPUT
VD2
RF OUTPUT
AMMC-6232
Gold Plated Shim (Optional)
To VG1 DC supply
To VG2 DC supply
Figure 20. Separated Gate Bias
The AMMC-6232 is normally biased with a positive drain
supply connected to the VD1 and VD2 pads through
bypass capacitor as shown in Figures 15 and 16. The
recommended drain voltage and gate voltage for general
usage is 4V and -0.95V respectively. With Vdd=4V, Vg=0.95V, the corresponding drain current is approximately
135mA. It is important to have at least 0.1upF bypass
capacitor and the capacitor should be placed as close
to the component as possible. Aspects of the amplifier
performance may be improved over a narrower bandwidth
by application of additional conjugate, linearity, or low
noise (Topt) matching.
The two gate voltages can be combined as shown in Figure
15 or separated as in Figure 16. Combining the two gate
voltages simplifies the usage whereas separating them
provides flexibility to overall biasing scheme.
In both cases, bonding wires at the input and output in
the range of 0.15nH would likely improve the overall Noise
Figure and input, output match at most frequencies.
No ground wires are needed because ground connection
is made with plated through-holes to the backside of the
substrate.
Refer the Absolute Maximum Ratings table for allowed DC
and thermal condition
Figure 21. Simplified High Linearity LNA Schematic
Assembly Techniques
The backside of the MMIC chip is RF ground. For microstrip
applications the chip should be attached directly to
the ground plane (e.g. circuit carrier or heatsink) using
electrically conductive epoxy [1]
For best performance, the topside of the MMIC should be
brought up to the same height as the circuit surrounding
it. This can be accomplished by mounting a gold plated
metal shim (same length as the MMIC) under the chip
which is of correct thickness to make the chip and adjacent
circuit the same height. The amount of epoxy used for
the chip or shim attachment should be just enough to
provide a thin fillet around the bottom perimeter of the
chip. The ground plane should be free of any residue that
may jeopardize electrical or mechanical attachment.
RF connections should be kept as short as reasonable to
minimize performance degradation due to undesirable
series inductance. A single bond wire is normally sufficient
for signal connections, however double bonding with
0.7mil gold wire will reduce series inductance. Gold
thermo-sonic wedge bonding is the preferred method
for wire attachment to the bond pads. The recommended
wire bond stage temperature is 150°c ± 2°c.
Caution should be taken to not exceed the Absolute
Maximum Rating for assembly temperature and time.
The chip is 100um thick and should be handled with care.
This MMIC has exposed air bridges on the top surface and
should be handled by the edges or with a custom collet
(do not pick up the die with a vacuum on die center).
Bonding pads and chip backside metallization are gold.
This MMIC is also static sensitive and ESD precautions
should be taken
For more detailed information see Avago Technolgies’
application note #54 “GaAs MMIC assembly and handling
guidelines”
Notes:
[1] Ablebond 84-1 LMI silver epoxy is recommended
Ordering Information:
AMMC-6232-W10 = 10 devices per tray
AMMC-6232-W50 = 50 devices per tray
VD1
800
0
725
VD2
875
1370
1510
2000
800
650
425
410
RFin
RFout
275
290
0
0
0
540
130
660
1470
VG1
1600
VG2
Figure 22. Bond Pad Locations
For product information and a complete list of distributors, please go to our web site:
www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Limited in the United States and other countries.
Data subject to change. Copyright © 2006 Avago Technologies Limited. All rights reserved.
AV01-0440EN - November 29, 2006