AT22V10B Features • • • • • • • High Performance Programmable Logic Device 7.5 ns Max Propagation Delay Up to 166 MHz Operation 5 V ± 10% Operation Fully Compatible with Standard 22V10 Identical Functionality/Fuse-Map TTL Compatible Inputs and Outputs 10 µA Leakage Maximum Reprogrammable - Tested 100% for Programmability High Reliability Proven UV Erasable CMOS Technology 2000 V ESD Protection 200 mA Latch-Up Protection Full Military, Commercial and Industrial Temperature Ranges Dual-In-Line and Surface Mount Packages with Standard Pinouts High Speed UV Erasable Programmable Logic Device Logic Diagram OE PRODUCT TERMS PROGRAMMABLE INTERCONNECT AND COMBINATORIAL LOGIC ARRAY 12 INPUT PINS 1 LOGIC OPTION 8 TO 16 PRODUCT TERMS 10 I/O PINS OUTPUT OPTION (UP T0 10 FLIP-FLOPS) Description The AT22V10B is an ultra-high performance CMOS Programmable Logic Device (PLD). Speeds down to 7.5 ns and operation up to 166 MHz are offered. All pins offer a low ± 10 µA leakage. The AT22V10B logic functionality is fully compatible with the standard 22V10. The 12 dedicated inputs and ten configurable I/O pins allow implementation of logic requiring up to 22 input signals. The AT22V10B also provides individual output enable product terms for each of the ten I/Os. (continued) PLCC DIP/SOIC Pin Configurations Pin Name Function CLK/IN Clock and Logic Input IN Logic Inputs I/O Bidirectional Buffers * No Internal Connection VCC +5 V Supply CLK/IN IN IN IN IN IN IN IN IN IN IN GND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 Vcc I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O IN CLK/IN IN IN VCC I/O I/O 1 IN IN IN * IN IN IN * 8 I/O I/O I/O 22 * I/O I/O I/O 15 IN IN I/O * GND IN I/O 0226B 1-109 Description (Continued) The AT22V10B incorporates a variable product term architecture. Each output is allocated from eight to 16 product terms, which allows highly complex logic functions to be realized. The AT22V10B includes two additional product terms to provide synchronous preset and asynchronous reset. These terms are common to all ten registers. All registers are automatically cleared upon power up. Register preload simplifies testing. A security fuse prevents unauthorized copying of programmed fuse patterns. Absolute Maximum Ratings* Temperature Under Bias.................-55oC to +125oC Storage Temperature......................-65oC to +150oC Voltage on Any Pin with Respect to Ground........................ -2.0 V to +7.0 V(1) Voltage on Input Pins with Respect to Ground During Programming................... -2.0 V to +14.0 V(1) Programming Voltage with Respect to Ground...................... -2.0 V to +14.0 V(1) *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: 1. Minimum voltage is -0.6 V dc which may undershoot to -2.0 V for pulses of less than 20 ns. Maximum output pin voltage is VCC+0.75 V dc which may overshoot to +7.0 V for pulses of less than 20 ns. Integrated UV Erase Dose .............. 7258 W• sec/cm2 Logic Options SP D To Output CK Q To Output Q AR From Output Output Options OE From Logic Option 1-110 OE I/O AT22V10B From Logic Option I/O AT22V10B D.C. and A.C. Operating Conditions Operating Temperature (Case) VCC Power Supply Commercial AT22V10B -7 Commercial AT22V10B -10 Industrial AT22V10B -10 Military AT22V10B -10 0oC - 70oC 0oC - 70oC -40oC - 85oC -55oC - 125oC 5 V ± 5% 5 V ± 10% 5 V ± 10% 5 V ± 10% D.C. Characteristics Symbol Parameter Condition ILI Input Load Current VIN = -0.1 V to VCC+1 V ILO Output Leakage Current VOUT = -0.1 V to VCC+0.1 V Power Supply Current ICC IOS (1) Min f = 0 MHz to FMAX, VCC = MAX, VIN = GND, Outputs Open Max Units 10 µA 10 µA Com. 140 mA Ind., Mil. 160 mA -120 mA Output Short Circuit Current VOUT = 0.5 V -30 VIL Input Low Voltage -0.6 0.8 V VIH Input High Voltage 2.0 VCC+0.75 V 0.5 V VOL Output Low Voltage VOH Output High Voltage VIN = VIH or VIL, VCC = MIN VIN = VIH or VIL, VCC = MIN IOL = 16 mA Com.,Ind. IOL = 12 mA Mil. 0.5 V IOL = 24 mA Com. 0.8 V IOH = -4.0 mA 2.4 V Notes: 1. Not more than one output at a time should be shorted. Duration of short circuit test should not exceed 30 sec. 1-111 A.C. Waveforms (1) INPUTS,I/O REG. FEEDBACK SYNCH. PRESET tS tH tWP CP tWH tP tAR ASYNCH. RESET tAW tCO REGISTERED tAP OUTPUT VALID OUTPUTS HIGH Z OUTPUT VALID tPD OUTPUT VALID OUTPUTS OUTPUT VALID tEA tER COMBINATORIAL Note: tEA tER HIGH Z OUTPUT VALID OUTPUT VALID 1. Timing measurement reference is 1.5 V. Input AC driving levels are 0.0 V and 3.0 V, unless otherwise specified. A.C. Characteristics AT22V10B-7 Symbol Parameter Min AT22V10B-10 Typ Max Min Typ Max Units tPD Input or Feedback to Non-Registered Output 5 7.5 6 10 ns tEA Input to Output Enable 5 7.5 6 10 ns tER Input to Output Disable 5 7.5 6 10 ns tCF (1) Clock to Feedback 0 1 2 0 1 2 ns tCO Clock to Output 0 3.5 5.5 0 4 7 ns tS Input or Feedback Setup Time 3.5 2 5 3 tH Hold Time 0 0 ns Clock Period 6 7 ns Clock Width Low 3 3.5 ns Clock Width High 3 tP tWL (1) tWH ns 3.5 ns External Feedback 1/(tS+tCO) 111 83 MHz FMAX Internal Feedback 1/(tS + tCF) 166 142 MHz 142 MHz tAW Asynchronous Reset Width 6 3 7 4 ns tAR Asynchronous Reset, Synchronous Preset, Recovery Time 7 4 8 5 ns tAP Asynchronous Reset to Registered Output Reset No Feedback 1/(tP) Note: 166 6 10 8 ns 1. This parameter is only sampled and is not 100% tested. Input Test Waveforms and Measurement Levels Output Test Loads: Military Commercial 5.0V 5.0V 3.0V AC DRIVING LEVELS 1.5V AC MEASUREMENT LEVEL 0.0V R1= 250Ω R2= 167Ω OUTPUT PIN (1) CL= 50pF R1= 338Ω R2= 248Ω tR, tF < 2 ns (10% to 90%) Note: 1-112 14 AT22V10B 1. CL = 30 pF for AT22V10B-7 OUTPUT PIN CL= 50pF AT22V10B Functional Logic Diagram AT22V10B 1-113 Preload of Registered Outputs The registers in the AT22V10B are provided with circuitry to allow loading of each register asynchronously with either a high or a low. This feature will simplify testing since any state can be forced into the registers to control test sequencing. A VIH level on the I/O pin will force the register high; a VIL will force it low, independent of the polarity bit (C0) setting. The preload state is entered by placing an 10.5-V to 12-V signal on pin 8 on DIPs, and pin 10 on SMPs. When the clock pin is pulsed high, the data on the I/O pins is placed into the ten registers. tD VH tD Level forced on registered output pin during preload cycle tD Register state after cycle VIH High VIL Low tD tD tDMIN = 100 ns PRELOAD CLOCK REGISTERED OUTPUTS OUTPUT VOLTAGE REMOVED PRELOAD ENA. FORCEI/O’S PRELOAD DATA OUTPUTS DIS. TO VIH ORVIL CLOCKED IN Power Up Reset PRELOAD DISABLED 3.8 V The registers in the AT22V10B are designed to reset during power up. At a point delayed slightly from VCC crossing 3.8 V, all registers will be reset to the low state. The output state will depend on the polarity of the output buffer. This feature is critical for state machine initialization. However, due to the asynchronous nature of reset and the uncertainty of how VCC actually rises in the system, the following conditions are required: 1) The VCC rise must be monotonic, 2) After reset occurs, all input and feedback setup times must be met before driving the clock pin high, and 3) The clock must remain stable during tPR. POWER tPR REGISTERED OUTPUTS tS tW CLOCK Parameter tPR Description Power-Up Reset Time Min Typ Max Units 600 1000 ns Pin Capacitance (f = 1 MHz, T = 25°C) (1) Typ Max Units CIN 5 8 pF VIN = 0 V COUT 6 8 pF VOUT = 0 V Note: Conditions 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested. Erasure Characteristics The entire fuse array of an AT22V10B is erased after exposure to ultraviolet light at a wavelength of 2537 Å. Complete erasure is assured after a minimum of 20 minutes exposure using 12,000 2 µW/cm intensity lamps spaced one inch away from the chip. Minimum erase time for lamps at other intensity ratings can be 1-114 AT22V10B calculated from the minimum integrated erasure dose of 15 W• sec/cm2. To prevent unintentional erasure, an opaque label is recommended to cover the clear window on any UV erasable PLD which will be subjected to continuous fluorescent indoor lighting or sunlight. AT22V10B SUPPLY CURRENT vs. INPUT FREQUENCY NORMALIZED ICC vs. AMBIENT TEMP. AT22V10B (TA = 25C, VCC = 5V) f = 50 MHz 150 N o r m a l i z e d 120 I C C 90 (mA) 60 1.4 1.2 1.0 0.8 30 I C C 0 0 20 40 60 80 0.6 100 -55 -25 5 Frequency (MHz) NORMALIZED SUPPLY CURRENT vs. SUPPLY VOLTAGE N o r m a l i z e d I C C 1.4 1.0 0.8 0.6 5.0 5.5 -20 -40 (mA) -60 -80 -100 0 6.0 1 OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE (TA = 25C, VCC = 5V) O u t p u t -15 5 0 -1 -2 C (mA) u r -3 r e n t -4 -30 -45 4.5 5.0 5.5 6.0 3.5 3.7 vs. SUPPLY VOLTAGE (VOL = 0.5V) 33 32 31 C (mA) u 30 r r 29 e n t 28 C u r r e n t Supply Voltage (V) 4.3 4.5 vs. OUTPUT VOLTAGE (TA = 25C, VCC = 5V) O u t p u t 5.0 4.1 OUTPUT SINK CURRENT 34 4.5 3.9 Output Voltage (V) OUTPUT SINK CURRENT 4.0 4 vs. SUPPLY VOLTAGE (VOH = 2.4V) Supply Voltage (V) O u t p u t 3 OUTPUT SOURCE CURRENT 0 4.0 2 Output Voltage (V) (mA) C u r r e n t 125 0 Supply Voltage (V) O u t p u t 95 vs. OUTPUT VOLTAGE (TA = 25C, VCC = 5V) C u r r e n t 4.5 65 OUTPUT SOURCE CURRENT O u t p u t 1.2 4.0 35 Ambient Temperature (C) 5.5 6.0 150 120 90 (mA) 60 30 0 0 1 2 3 4 5 Output Voltage (V) 1-115 N o r m a l i z e d T P D NORMALIZED TPD NORMALIZED TPD vs. SUPPLY VOLTAGE vs. TEMPERATURE 1.3 N o r m a l i z e d 1.2 1.1 1.0 T P D 0.9 4.0 4.5 5.0 5.5 6.0 1.5 1.3 1.1 0.9 0.7 -55 -25 Supply Voltage (V) N o r m a l i z e d T C O 65 NORMALIZED TCO vs. SUPPLY VOLTAGE vs. TEMPERATURE N o r m a l i z e d 1.1 1.0 T C O 0.9 4.5 5.0 95 125 5.5 6.0 95 125 95 125 1.5 1.3 1.1 0.9 -55 -25 Supply Voltage (V) 5 35 65 Ambient Temperature (C) NORMALIZED TS NORMALIZED TS vs. SUPPLY VOLTAGE vs. TEMPERATURE 1.2 N o r m a l i z e d 35 NORMALIZED TCO 1.2 4.0 5 Ambient Temperature (C) 1.3 N o r m a l i z e d 1.1 1.0 0.9 1.1 0.9 0.8 T S T S 0.7 4.0 4.5 5.0 5.5 6.0 0.7 -55 Supply Voltage (V) D e l t a -25 5 35 65 Ambient Temperature (C) DELTA TPD vs. OUTPUT LOADING DELTA TCO vs. OUTPUT LOADING (VCC = 4.5V, OUTPUT LOAD = COMMERCIAL) ( VCC = 4.5V, OUTPUT LOAD = COMMERCIAL ) 12 12 D e l t a 8 9 6 4 T P D T C O 3 0 n s n s -4 -3 0 100 200 300 400 Output Load (jig included) Capacitance pF 1-116 0 AT22V10B 0 100 200 300 400 Output Load (jig included) Capacitance pF AT22V10B Ordering Information tPD (ns) tS (ns) tCO (ns) 7.5 3.5 10 5 10 5 Ordering Code Package Operation Range 5.5 AT22V10B-7DC AT22V10B-7JC AT22V10B-7PC 24DW3 28J 24P3 Commercial (0°C to 70°C) 7 AT22V10B-10DC AT22V10B-10GC AT22V10B-10JC AT22V10B-10PC AT22V10B-10SC 24DW3 24D3 28J 24P3 24S Commercial (0°C to 70°C) AT22V10B-10DI AT22V10B-10GI AT22V10B-10JI AT22V10B-10PI AT22V10B-10SI 24DW3 24D3 28J 24P3 24S Industrial (-40°C to 85°C) AT22V10B-10DM AT22V10B-10GM AT22V10B-10LM AT22V10B-10NM 24DW3 24D3 28LW 28L Military (-55°C to 125°C) AT22V10B-10DM/883 AT22V10B-10GM/883 AT22V10B-10LM/883 AT22V10B-10NM/883 AT22V10B-12LM/883 AT22V10B-12NM/883 24DW3 24D3 28LW 28L 28LW 28L Military/883C (-55°C to 125°C) Class B, Fully Compliant 5962-87539 06 LA 5962-87539 06 3X 24DW3 28L Military/883C (-55°C to 125°C) Class B, Fully Compliant 7 Package Type 24DW3 24 Lead, 0.300" Wide, Windowed, Ceramic Dual Inline Package (Cerdip) 24D3 24 Lead, 0.300" Wide, Non-Windowed (OTP), Ceramic Dual Inline Package (Cerdip) 28J 28 Lead, Plastic J-Leaded Chip Carrier OTP (PLCC) 28LW 28 Pad, Windowed, Ceramic Leadless Chip Carrier (LCC) 28L 28 Pad, Non-Windowed, Ceramic Leadless Chip Carrier OTP (LCC) 24P3 24 Lead, 0.300" Wide, Plastic Dual Inline Package OTP (PDIP) 24S 24 Lead, 0.300" Wide, Plastic Gull Wing Small Outline OTP (SOIC) 1-117