ONSEMI CM1293

8-Channel Low Capacitance ESD
Protection Arrays
CM1293
Features
•
•
•
•
•
•
•
•
Eight channels of ESD protection
Note: For 2 and 4 channel devices, see the
CM1293A datasheet.
Provides ESD protection to IEC61000-4-2
•
±8kV contact discharge
Low loading capacitance of 2.0pF max.
Low clamping voltage
Channel I/O to I/O capacitance 1.5pF typical
Zener diode protects supply rail and eliminates
the need for external by-pass capacitors
Each I/O pin can withstand over 1000 ESD
strikes*
Available in MSOP, lead-free packaging
Applications
•
•
•
•
DVI ports, HDMI ports in notebooks, set top
boxes, digital TVs, LCD displays
Serial ATA ports in desktop PCs and hard disk
drives
PCI Express ports
General purpose high-speed data line ESD
protection
Product Description
The CM1293 family of diode arrays has been
designed to provide ESD protection for electronic
components or sub-systems requiring minimal
capacitive loading. These devices are ideal for
protecting systems with high data and clock rates or
for circuits requiring low capacitive loading. Each
ESD channel consists of a pair of diodes in series
which steer the positive or negative ESD current
pulse to either the positive (VP) or negative (VN)
supply rail. A Zener diode is embedded between VP
and VN, offering two advantages. First, it protects the
VCC rail against ESD strikes, and second, it eliminates
the need for a bypass capacitor that would otherwise
be needed for absorbing positive ESD strikes to
ground. The CM1293 will protect against ESD pulses
up to ( 8kV contact discharge) per the IEC 61000-4-2
Level 4 standard.
This device is particularly well-suited for protecting
systems using high-speed ports such as USB2.0,
IEEE1394 (Firewire®, iLink™), Serial ATA, DVI,
HDMI and corresponding ports in removable storage,
digital camcorders, DVD-RW drives and other
applications
where
extremely
low
loading
capacitance with ESD protection are required in a
small package footprint.
Block Diagram
*Standard test condition is
IEC61000-4-2 level 4 test circuit with each pin subjected to ±8kV contact discharge for 1000 pulses. Discharges are timed at 1 second intervals and all 1000 strikes are completed in one
continuous test run. The part is then subjected to standard production test to verify that all of the tested parameters are within spec after the 1000 strikes.
©2010 SCILLC. All rights reserved.
April 2010 – Rev. 3
Publication Order Number:
CM1293/D
CM1293
To p View
CH1
1
10
CH8
CH2
2
9
CH7
CH3
3
8
CH4
4
7
CH6
5
6
CH5
10-Lead MSOP-10
PIN DESCRIPTIONS
8-CHANNEL, 10-LEAD MSOP-10 PACKAGE
PIN
NAME
TYPE
DESCRIPTION
1
CH1
I/O
ESD Channel
2
CH2
I/O
ESD Channel
3
CH3
I/O
ESD Channel
4
CH4
I/O
ESD Channel
5
VN
GND
Negative voltage supply rail
6
CH5
I/O
ESD Channel
7
CH6
I/O
ESD Channel
8
VP
PWR
Positive voltage supply rail
9
CH7
I/O
ESD Channel
10
CH8
I/O
ESD Channel
Rev. 3 | Page 2 of 10 | www.onsemi.com
CM1293
Ordering Information
PART NUMBERING INFORMATION
Lead-free Finish
# of Channels
Leads
8
10
Package
MSOP-10
Ordering Part
Number1
Part Marking
CM1293-08MR
D039
Note 1: Parts are shipped in Tape & Reel form unless otherwise specified.
Specifications
ABSOLUTE MAXIMUM RATINGS
PARAMETER
RATING
UNITS
6.0
V
Operating Temperature Range
-40 to +85
°C
Storage Temperature Range
-65 to +150
°C
(VN - 0.5) to (VP + 0.5)
V
Operating Supply Voltage (VP - VN)
DC Voltage at any channel input
STANDARD OPERATING CONDITIONS
PARAMETER
Operating Temperature Range
Package Power Rating
MSOP-10 Package (CM1293-08MR)
Rev. 3 | Page 3 of 10 | www.onsemi.com
RATING
UNITS
-40 to +85
°C
400
mW
CM1293
ELECTRICAL OPERATING CHARACTERISTICS(SEE NOTE 1)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
3.3
5.5
V
8.0
μA
0.80
0.80
0.95
0.95
V
V
VP
Operating Supply Voltage (VP-VN)
IP
Operating Supply Current
(VP-VN)=3.3V
VF
Diode Forward Voltage
Top Diode
Bottom Diode
IF = 8mA; TA=25°C
ILEAK
Channel Leakage Current
TA=25°C; VP=5V, VN=0V
±0.1
±1.0
μA
CIN
Channel Input Capacitance
At 1 MHz, VP=3.3V, VN=0V, VIN=1.65V
1.0
1.5
pF
ΔC
Channel Input Capacitance
Matching
At 1 MHz, VP=3.3V, VN=0V, VIN=1.65V
0.02
pF
CMUTUAL
Mutual Capacitance between
signal pin and adjacent signal pin
At 1 MHz, VP=3.3V, VN=0V, VIN=1.65V
0.11
pF
VESD
ESD Protection
Peak Discharge Voltage at any
channel input, in system
Contact discharge per
IEC 61000-4-2 standard
IN
VCL
RDYN
0.60
0.60
Notes 3 and 4; TA=25°C
Channel Clamp Voltage
Positive Transients
Negative Transients
TA=25°C, IPP = 1A, tP = 8/20μs;
Notes 4
Dynamic Resistance
Positive Transients
Negative Transients
IPP = 1A, tP = 8/20μs
Any I/O pin to Ground; Note 4
Note 1:
Note 2:
Note 3:
Note 4:
kV
±8
+8.8
-1.4
V
V
0.7
0.4
Ω
Ω
All parameters specified at TA = -40°C to +85°C unless otherwise noted.
Human Body Model per MIL-STD-883, Method 3015, CDischarge = 100pF, RDischarge = 1.5KΩ, VP = 3.3V, VN grounded.
Standard IEC 61000-4-2 with CDischarge = 150pF, RDischarge = 330Ω, VP = 3.3V, VN grounded.
These measurements performed with no external capacitor on VP (VP floating).
Rev. 3 | Page 4 of 10 | www.onsemi.com
CM1293
Performance Information
Input Channel Capacitance Performance Curves
Rev. 3 | Page 5 of 10 | www.onsemi.com
CM1293
Performance Information (cont’d)
Typical Filter Performance (nominal conditions unless specified otherwise, 50 Ohm Environment)
Figure 1. Insertion Loss (S21) VS. Frequency (0V DC Bias, VP=3.3V)
Figure 2. Insertion Loss (S21) VS. Frequency (2.5V DC Bias, VP=3.3V)
Rev. 3 | Page 6 of 10 | www.onsemi.com
CM1293
Application Information
Design Considerations
In order to realize the maximum protection against ESD pulses, care must be taken in the PCB layout to
minimize parasitic series inductances on the Supply/Ground rails as well as the signal trace segment between
the signal input (typically a connector) and the ESD protection device. Refer to Application of Positive ESD
Pulse between Input Channel and Ground, which illustrates an example of a positive ESD pulse striking an
input channel. The parasitic series inductance back to the power supply is represented by L1 and L2. The
voltage VCL on the line being protected is:
VCL = Fwd voltage drop of D1 + VSUPPLY + L1 x d(IESD) / dt+ L2 x d(IESD) / dt
where IESD is the ESD current pulse, and VSUPPLY is the positive supply voltage.
An ESD current pulse can rise from zero to its peak value in a very short time. As an example, a level 4 contact
discharge per the IEC61000-4-2 standard results in a current pulse that rises from zero to 30 Amps in 1ns.
Here d(IESD)/dt can be approximated by ΔIESD/Δt, or 30/(1x10-9). So just 10nH of series inductance (L1 and L2
combined) will lead to a 300V increment in VCL!
Similarly for negative ESD pulses, parasitic series inductance from the VN pin to the ground rail will lead to
drastically increased negative voltage on the line being protected.
The CM1293 has an integrated Zener diode between VP and VN. This greatly reduces the effect of supply rail
inductance L2 on VCL by clamping VP at the breakdown voltage of the Zener diode. However, for the lowest
possible VCL, especially when VP is biased at a voltage significantly below the Zener breakdown voltage, it is
recommended that a 0.22μF ceramic chip capacitor be connected between VP and the ground plane.
As a general rule, the ESD Protection Array should be located as close as possible to the point of entry of
expected electrostatic discharges. The power supply bypass capacitor mentioned above should be as close to
the VP pin of the Protection Array as possible, with minimum PCB trace lengths to the power supply, ground
planes and between the signal input and the ESD device to minimize stray series inductance.
Figure 3. Application of Positive ESD Pulse between Input Channel and Ground
Rev. 3 | Page 7 of 10 | www.onsemi.com
CM1293
Mechanical Details
MSOP-10 Mechanical Specifications, 10 pin
The 10-pin MSOP package dimensions are presented below.
PACKAGE DIMENSIONS
Package
MSOP
Pins
10
Millimeters
Inches
Dimensions
Min
Max
Min
Max
A
0.75
0.95
0.028
0.038
A1
0.05
0.15
0.002
0.006
B
0.17
0.27
0.007
0.013
C
0.13
0.23
0.005
0.009
D
2.90
3.10
0.114
0.122
E
2.90
3.10
0.114
0.122
e
0.50 BSC
0.0196 BSC
H
4.90 BSC
0.193 BSC
L
# per tape
and reel
0.40
0.70
0.0137
0.029
4000
Controlling dimension: millimeters
Package Dimensions for MSOP-10
Rev. 3 | Page 8 of 10 | www.onsemi.com
CM1293
Tape and Reel Specifications
PART NUMBER
PACKAGE SIZE
(mm)
POCKET SIZE (mm)
B0 X A0 X K0
TAPE WIDTH
W
REEL
DIAMETER
QTY PER
REEL
P0
P1
CM1293-08MR
3.00 X 3.00 X 0.85
3.30 X 5.30 X 1.30
12mm
330mm (13")
4000
4mm
4mm
Rev. 3 | Page 9 of 10 | www.onsemi.com
CM1293
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any
products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising
out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical”
parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating
parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the
rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to
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Rev. 3 | Page 10 of 10 | www.onsemi.com
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