PAS6180 Specification PAS6180 CMOS QVGA DIGITAL IMAGE SENSOR General Description The PAS6180 is a highly integrated CMOS active-pixel image sensor that has output of 240 x 320 pixels. It embedded the new FinePixel™ sensor technology to perform the excellent image quality. PAS6180 outputs YUV/YCrCb 4:2:2 or RGB565/555/444 data through the serial data bus. It is available in CSP-16L package. The PAS6180 can be programmed to set the exposure time for different luminance condition via I2CTM serial control bus. By programming the internal register set, it performs on-chip frame rate adjustment, offset correction DAC and programmable gain control. Features Resolution: 240 x 320 pixels, 1/13” Lens Bayer-RGB color filter array Output format: z YUV/YCrCb 4:2:2 z RGB565/555/444 I2CTM Interface Key Specification Resolution 240 (H) x 320 (V) Pixel Size 3.15um * 3.15um Array diagonal 1/13” Lens Lens Chief Ray Angle 23 degree Power dissipation: operating typical TBD @ 2.8V (QVGA YUV 30fps output, without loading), power-down typical TBD @ 2.8V Color filter Automatic Background Compensation Input clock 52MHz DSP function: z AEC & AGC z AWB z Gamma z Color matrix z Sharpness z De-noise z Color saturation z Defect compensation z Lens shading compensation z Decimation and Scaler WOI & Sub-sampling Output clock 52MHz Module size : 5.0mm * 5.0mm Power Max. Frame rate Scan Mode Exposure Time RGB Bayer Pattern 2.8V typical 30fps Progressive ~ Frame time to Line time Sensitivity 1500mV/Lux-Sec S/N Ratio 41dB Dynamic range 60dB Package CSP-16L All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 1 V1.0, 2011/05/12 PixArt Imaging Inc. PAS6180 CMOS Image Sensor IC 1. Pin Assignment Pin No. A1 A2 A3 A4 B1 B2 B3 B4 C1 C2 C3 C4 D1 D2 D3 D4 Name DVDD28 CSK CSD0 CSD2 SDA MCLK CSD1 CSD3 SCL NC NC NC GND NC NC NC Type PWR OUT OUT OUT I/O IN OUT OUT IN ---GND ---- Description Main power, 2.8V typical, Pixel clock output, Digital pixel data [0], Digital pixel data [2], optional, I2C data, External clock input, Digital pixel data [1], optional, Digital pixel data [3], optional, I2C clock input, NC, NC, NC, Ground NC, NC, NC, All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 2 V1.0, 2011/05/12 PixArt Imaging Inc. PAS6180 CMOS Image Sensor IC 2. Specifications Absolute Maximum Ratings Operating Temperature Stable Image Temperature Ambient Storage Temperature Supply Voltage ( with respect to ground ) VDD All Input / Output Voltage ( with respect to ground ) Lead-free temperature, Surface-mount process ESD rating, Human Body model DC Electrical Characteristics ( Ta = 0℃ ~ 70℃ ) Symbol Parameter Type : POWER VDD DC supply voltage – Main IDD Operating Current (QVGA YUV 30fps / 2.8v) IPWDN Power Down Current (QVGA YUV 30fps / 2.8v) Type : IN & I/O VIH Input Voltage HIGH VIL Input Voltage LOW -30˚C ~ 85˚C 0˚C ~ 50˚C -40˚C ~ 125˚C 4.5V -0.3V to VDD + 0.5V 245˚C 2000V Min. Typ. Max. 2.8 12 10 Unit V mA µA VDD * 0.7 V VDD * 0.3 V Type : OUT & I/O VOH Output Voltage HIGH VOL Output Voltage LOW AC Operating Condition Symbol fsysclk tsysclk_dc Parameter System clock frequency System clock duty cycle VDD * 0.9 V VDD * 0.1 Min. 45 Typ. 52 Max. 55 V Unit MHz % Sensor Characteristics Parameter Sensitivity Signal to Noise Ratio Dynamic Range Typ. 1500 41 60 Unit mV/Lux-Sec dB dB All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 3 V1.0, 2011/05/12 PixArt Imaging Inc. PAS6180 CMOS Image Sensor IC 3. I2CTM Bus PAS6180 supports I2C bus transfer protocol and acts as slave device. The 7-bits unique slave address is “0111000” and supports receiving / transmitting speed as maximum 400KHz. I2C Bus Overview z Only two wires SDA ( serial data ) and SCL ( serial clock ) carry information between the devices connected to the I2C bus. Normally both SDA and SCL lines are open collector structure and pulled high by external pull-up resistors. z Only the master can initiates a transfer ( start ), generates clock signals, and terminates a transfer ( stop ). z Start and stop condition : A high to low transition of the SDA line while SCL is high defines a start condition. A low to high transition of the SDA line while SCL is high defines a stop condition. Please refer to Figure 2.1. z Valid data : The data on the SDA line must be stable during the high period of the SCL clock. Within each byte, MSB is always transferred first. Read / Write control bit is the LSB of the first byte. Please refer to Figure 2.2. z Both the master and slave can transmit and receive data from the bus. z Acknowledge : The receiving device should pull down the SDA line during high period of the SCL clock line when a complete byte was transferred by transmitter. In the case of a master received data from a slave, the master does not generate an acknowledgment on the last byte to indicate the end of a master read cycle. Figure 2.1 Start and Stop conditions Figure 2.2 Valid Data All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 4 V1.0, 2011/05/12 PixArt Imaging Inc. PAS6180 CMOS Image Sensor IC Data Transfer Format Master transmits data to salve ( write cycle ) z S : Start. z A : Acknowledge by salve. z P : Stop. z RW : The LSB of 1ST byte to decide whether current cycle is read or write cycle. RW = 1 – Read cycle, RW = 0 – Write cycle. z SUBADDRESS : The address values of PAS6180 internal control registers. ( Please refer to PAS6180 register description ) During write cycle, the master generates start condition and then places the 1st byte data that are combined slave address ( 7 bits ) with a read / write control bit to SDA line. After slave ( PAS6180 ) issues acknowledgment, the master places 2nd byte ( Sub Address ) data on SDA line. Again follow the PAS6180 acknowledgment, the master places the 8 bits data on SDA line and transmit to PAS6180 control register ( address was assigned by 2nd byte ). After PAS6180 issues acknowledgment, the master can generate a stop condition to end of this write cycle. In the condition of multi-byte write, the PAS6180 sub-address is automatically increment after each DATA byte transferred. The data and A cycles is repeat until last byte write. Every control registers value inside PAS6180 can be programming via this way. Slave transmits data to master ( read cycle ) z The sub-address was taken from previous write cycle. z The sub-address is automatically increment after each byte read. z Am : Acknowledge by master. z Note there is no acknowledgment from master after last byte read. During read cycle, the master generates start condition and then place the 1st byte data that are combined slave address ( 7 bits ) with a read / write control bit to SDA line. After issue acknowledgment, 8 bits DATA was also placed on SDA line by PAS6180. The 8 bits data was read from PAS6180 internal control register that address was assigned by previous write cycle. Follow the master acknowledgment, the PAS6180 place the next 8 bits data ( address is increment automatically ) on SDA line and then transmit to master serially. The DATA and Am cycles is repeat until the last byte read. After last byte read, Am is no longer generated by master but instead by keep SDA line high. The slave ( PAS6180 ) must releases SDA line to master to generate STOP condition. All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 5 V1.0, 2011/05/12 PixArt Imaging Inc. PAS6180 CMOS Image Sensor IC All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 6 V1.0, 2011/05/12 PixArt Imaging Inc. PAS6180 CMOS Image Sensor IC I2CTM Bus Timing I2CTM Bus Timing Specification Parameter Symbol Standard Mode Unit Min. Max fscl 10 400 KHz tHD:STA 4.0 - µs Low period of the SCL clock. tLOW 4.7 - µs High period of the SCL clock. tHIGH 0.75 - µs Set-up time for a repeated START condition. tSU;STA 4.7 - µs Data hold time. For I2C-bus device. tHD;DAT 0 3.45 µs Data set-up time. tSU;DAT 250 - ns Rise time of both SDA and SCL signals. tr 30 N.D. ns ( notel ) Fall time of both SDA and SCL signals. tf 30 N.D. ns ( notel ) tSU;STO 4.0 - µs Bus free time between a STOP and START. tBUF 4.7 - µs Capacitive load for each bus line. Cb 1 15 pF Noise margin at LOW level for each connected device. ( Including hysteresis ) VnL 0.1 VDD - V Noise margin at HIGH level for each connected device. ( including hysteresis ) VnH 0.2 VDD - V SCL clock frequency. Hold time ( repeated ) Start condition. After this period, the first clock pulse is generated. Set-up time for STOP condition. Note : It depends on the “high” period time of SCL. All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 7 V1.0, 2011/05/12 PixArt Imaging Inc. PAS6180 CMOS Image Sensor IC 4. Registers Register Table Bank 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Address Hex Dec 0 0 1 1 2 2 4 4 F 15 11 17 13 19 14 20 14 20 15 21 17 23 19 25 1A 26 1B 27 1C 28 1F 31 29 41 2B 43 2C 44 2D 45 2E 46 2F 47 30 48 31 49 32 50 33 51 34 52 35 53 36 54 37 55 38 56 Register Name PartID[15:8] PartID[7:0] VersionID[3:0] R_AE_stage_indoor_Sel R_AWB_Window_X[7:0] R_AWB_Window_Y[7:0] R_lpf_min[7:0] R_ny_min[3:0] R_lpf_min[10:8] R_AE_Window_X[6:0] R_AE_Window_Y[6:0] R_AWB_DGnR_LB_by2[7:0] R_AWB_DGnR_UB_by2[7:0] R_AWB_DGnB_LB_by2[7:0] R_AWB_DGnB_UB_by2[7:0] R_DeNoiseEn R_ISP_Gamma_EnH R_ISP_Y01 R_ISP_Y02 R_ISP_Y03 R_ISP_Y04 R_ISP_Y05 R_ISP_Y06 R_ISP_Y07 R_ISP_Y08 R_ISP_Y09 R_ISP_Y10 R_ISP_Y11 R_ISP_Y12 R_ISP_Y13 R_ISP_Y14 Bits [7:0] [7:0] [3:0] [0] [7:0] [7:0] [7:0] [7:4] [2:0] [6:0] [6:0] [7:0] [7:0] [7:0] [7:0] [4] [0] [7:0] [7:0] [7:0] [7:0] [7:0] [7:0] [7:0] [7:0] [7:0] [7:0] [7:0] [7:0] [7:0] [7:0] Default Value 0x61 0x79 0x00 0x00 0x90 0x64 0xf6 0x21 0x80 0x5f 0x30 0x49 0x3a 0x78 0x10 0x01 0x19 0x2f 0x53 0x62 0x6f 0x7c 0x87 0x9a 0xaa 0xb8 0xc5 0xd8 0xe8 0xf5 Notes Part ID Part ID VersionID AE indoor stage select 0:11 , 1:12 AWB window width (by4) AWB window height (by4) Lpf minimum value for AE Ny minimum value for AE Lpf minimum value for AE AE window width (by4) AE window height (by4) AWB digital gain lower bound for R AWB digital gain upper bound for B AWB digital gain lower bound for B AWB digital gain upper bound for R DeNoise Enable ISP gamma correction enable ISP Gamma Y1 ISP Gamma Y2 ISP Gamma Y3 ISP Gamma Y4 ISP Gamma Y5 ISP Gamma Y6 ISP Gamma Y7 ISP Gamma Y8 ISP Gamma Y9 ISP Gamma Y10 ISP Gamma Y11 ISP Gamma Y12 ISP Gamma Y13 ISP Gamma Y14 0 47 71 R_AWB_Speed [1:0] AWB adjust speed. The more, the slower 0: 1 x 0x34 1: 1/2 x 2: 1/4 x 3: 1/8 x 0 0 0 0 49 4A 4B 4C 73 74 75 76 R_AWB_SumRatio_B R_AWB_SumRatio_R R_AWB_CThdL R_AWB_CThdH [7:0] [7:0] [7:0] [7:0] 0x80 0x80 0x37 0x0a 0 4D 77 R_AWB_CbThdL[7:0] [7:0] 0 4E 78 R_AWB_CrThdL[7:0] [7:0] 0 4F 79 R_AWB_CbCrThdL[7:0] [7:0] AWB B sum ratio = 128/X AWB R sum ratio = 128/X AWB Chroma threshold low AWB Chroma threshold high AWB region test Cb Low threshold 0x64 -128 ~ +127 (2's complement) AWB region test Cr Low threshold 0x87 -128 ~ +127 (2's complement) 0x00 AWB region test Cb+Cr Low threshold All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 8 V1.0, 2011/05/12 PixArt Imaging Inc. PAS6180 CMOS Image Sensor IC 0 50 80 R_AWB_CbThdH[7:0] [7:0] 0x75 0 51 81 R_AWB_CrThdH[7:0] [7:0] 0x96 0 52 82 R_AWB_CbCrThdH[7:0] [7:0] 0xff 0 0 0 0 53 54 57 58 83 84 87 88 [7:0] [7:0] [3:0] [5:0] 0x1e 0xff 0x02 0x04 0 5B 91 R_AWB_MinStep_th[2:0] [2:0] 0x00 0 0 0 0 5F 64 65 66 95 100 101 102 R_AE_LockRange_Out_LB[7:0] [7:0] R_AE_LockRange_Out_UB[7:0] [7:0] R_AE_LockRange__In[3:0] [7:4] R_AE_EnH [4] 0x14 0x14 0x41 0x00 0 66 102 R_freq_60 0 0 0 67 68 6B 103 R_SysClk_freq[7:0] 104 R_SysClk_freq[14:8] 107 R_AE_minStage[4:0] [7:0] [6:0] [4:0] 0 6C 108 R_AE_maxStage[4:0] [4:0] 0 6D 109 R_AG_stage_UB [7:0] 0 0 0 0 0 6F 72 72 79 7B 111 114 114 121 123 [7:0] [0] [4] [4:0] [4:0] R_Ylow R_Yhigh R_AWB_LockRange__In[3:0] R_AWB_LockRange_Out[5:0] R_Ytar8bit R_AWB_EnH R_AWB_Gain_rst R_ISP_HOffset[4:0] R_ISP_VOffset[4:0] [0] 0 81 129 R_AE_Speed [5:4] 0 8A 138 R_SenClk_Sel [0] 0 8F 143 R_ImgEffect_c0 [7:0] 0 90 144 R_ImgEffect_c1 [7:0] 0 91 145 R_ImgEffect_c2 [7:0] 0 93 147 R_ImgEffectMode [3:0] 0x01 -128 ~ +127 (2's complement) AWB region test Cb High threshold -128 ~ +127 (2's complement) AWB region test Cr High threshold -128 ~ +127 (2's complement) AWB region test Cb+Cr High threshold -128 ~ +127 (2's complement) Low bound of “light-pixel”Y in AWB High bound of “light-pixel”Y in AWB AWB Lockrange In (NL) AWB Lockrange Out (NL) AWB mininum step size 0:1, 1:2, 2:4, 3:8, 4:16, 5:32, 6:64, 7:128 AE Lockrange Out LB AE Lockrange Out UB AE Lockrange In AE enable Set de-flicker frequency 0/1: 50/60Hz 0x97 Input_frequency/256 0x31 Input_frequency/256 0x07 Minimum AE stage Maximum AE stage (AE_maxStage<=31) 0x1c (ISP_UpdateFlag=1, update ) AG_stage upper bound at max AE_stage 0x3f (ISP_UpdateFlag=1, update ) 0x82 0~255, Target luminance of AE 0x00 Auto-white balance enable 0x01 AWB gain gain reset 0x0E ISP Hsize Offset 0x04 ISP Vsize Offset AE speed, the more, the slower 0: 1 x 0x00 1: 1/2 x 2: 1/4 x 3: 1/8 x 0x00 Sensor Clk Image Effect parameter 0 0x00 (ISP_UpdateFlag=1, update ) Image Effect parameter 1 0x00 (ISP_UpdateFlag=1, update ) Image Effect parameter 2 0x00 (ISP_UpdateFlag=1, update ) Image Effect mode 0: monochrome 1: negative 2: x-ray 0x00 3: Sepia/Cold/Warm/Sunset 6: Solarize 10: Pixelate (ISP_UpdateFlag=1, update ) All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 9 V1.0, 2011/05/12 PixArt Imaging Inc. PAS6180 CMOS Image Sensor IC 0 0 0 0 94 97 98 98 148 151 152 152 0 99 0 [0] [4] [4] [5] 0x00 0x01 0x00 0x00 153 R_OffsetX_R[6:0] [6:0] 0x00 9A 154 R_OffsetY_R[6:0] [6:0] 0x00 0 9B 155 R_OffsetX_G[6:0] [6:0] 0x00 0 9C 156 R_OffsetY_G[6:0] [6:0] 0x00 0 9D 157 R_OffsetX_B[6:0] [6:0] 0x00 0 9E 158 R_OffsetY_B[6:0] [6:0] 0x00 0 0 0 0 0 0 0 0 0 9F A0 A1 A2 A3 A4 A5 A6 A7 159 160 161 162 163 164 165 166 167 [5:0] [5:0] [5:0] [5:0] [5:0] [5:0] [2:0] [1:0] [2:0] 0x00 0x00 0x00 0x38 0x38 0x38 0x05 0x00 0x02 0 E0 224 R_ISP_HSize[7:0] [7:0] 0x80 ISP output Horizontal size (before skip function) 0 E1 225 R_ISP_HSize[8] [0] 0x02 ISP output Horizontal size (before skip function) 0 E2 226 R_ISP_VSize[7:0] [7:0] 0xe0 ISP output Vertical size (before skip function) 0 E3 227 R_ISP_Vsize[8] [0] 0x01 ISP output Vertical size (before skip function) 0 0 0 0 EB EC ED ED 235 236 237 237 [0] [0] [0] [4] 0x00 0x00 0x00 0x00 Sw Tristate 1 : suspend ISP_UpdateFlag (ISP_UpdateFlag=1, update ) 0 EF 2 0 R_ISP_ImgEffect_En R_Shading_EnH R_VFLIP R_HFLIP R_LSC_R1[5:0] R_LSC_G1[5:0] R_LSC_B1[5:0] R_LSC_R2[5:0] R_LSC_G2[5:0] R_LSC_B2[5:0] R_LSFT_1[2:0] R_LSFT_2[1:0] R_LSFT_3[2:0] R_SwTristate SW_CSB_suspend ISP_Update ISP_FrameSkip 239 R_RegBankSel 0 ISP2_Update [2:0] [0] (ISP_UpdateFlag=1, update ) Lens shading enable Vertical flip Horizontal flip Horizontal distances between shading center and sensor array center of R-channel, MSB:sign bit, -63~+63 Vertical distances between shading center and sensor array center of R-channel, MSB:sign bit, -63~+63 Horizontal distances between shading center and sensor array center of G-channel, MSB:sign bit, -63~+63 Vertical distances between shading center and sensor array center of G-channel, MSB:sign bit, -63~+63 Horizontal distances between shading center and sensor array center of B-channel, MSB:sign bit, -63~+63 Vertical distances between shading center and sensor array center of B-channel, MSB:sign bit, -63~+63 Quartic parameter of R-channel Quartic parameter of G-channel Quartic parameter of B-channel Square parameter of R-channel Square parameter of G-channel Square parameter of B-channel Shading accuracy shift bit1 Shading accuracy shift bit2 Shading accuracy shift bit3 Register Bank Select 0: ISP1 Register Bank (default) 0x00 1: Sensor Register Bank 2: ISP2 Register Bank 0x00 ISP2_UpdateFlag All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 10 V1.0, 2011/05/12 PixArt Imaging Inc. PAS6180 CMOS Image Sensor IC 2 22 34 R_Defect_EnH 2 26 38 R_DefectThd_NL[4:0] [4:0] 0x0c Defect Threshold @ normal light 2 27 39 R_DefectThd_LL[4:0] [4:0] 0x0c Defect Threshold @ low light 2 28 40 [7:0] 0x1f 2 2A 42 R_FlatRatio[3:0] [3:0] 0x08 ISP edge enhancement flat ratio 2 2A 42 R_Flat_En 2 2 2 2 2 2 2 2A 2C 2D 2F 30 35 37 42 44 45 47 48 53 55 2 38 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 R_MTK_SPI_DataHeaderDelay [7:0] R_ISP_Edge_En0 R_Edge_UB[4:0] R_Edge_LB[4:0] R_AE_stage_LL[4:0] R_AE_stage_NL[4:0] R_Gamma_Strength_NL[4:0] R_Gamma_Strength_LL[4:0] [3] [6] 0x01 Defect Enable 0x01 ISP edge enhancement flat enable [7] [4:0] [4:0] [4:0] [4:0] [4:0] [4:0] 0x01 0x20 0x19 0x13 0x11 0x10 0x08 56 R_AE_Middle_Stage[4:0] [4:0] 0x0f 38 39 3C 3E 3F 40 41 42 43 44 45 46 47 48 48 49 49 57 58 5C 5F 60 56 57 60 62 63 64 65 66 67 68 69 70 71 72 72 73 73 87 88 92 95 96 [7] [5:0] [5:0] [5:0] [6:0] [6:0] [6:0] [6:0] [6:0] [6:0] [6:0] [6:0] [6:0] [7:5] [4:0] [7:5] [4:0] [3:0] [3:0] [4:0] [4:0] [4:0] 0x01 0x10 0x03 0x33 0x26 0x4b 0x0f 0x18 0x52 0x6a 0x6a 0x68 0x02 0x01 0x10 0x02 0x12 0x04 0x0a 0x08 0x0b 0x16 2 63 99 R_Shading_CP__NL[3:0] [3:0] 0x0f 2 63 99 R_Shading_CP__LL[3:0] [7:4] 0x00 2 64 100 R_Contrast_En [0] 0x01 2 65 101 R_Contrast_Str[7:0] [7:0] 0x40 2 66 102 R_Contrast_CP[7:0] [7:0] 0x82 R_AE_Middle_Gain_En R_AE_Middle_Gain[5:0] R_AG_FG_LB[5:0] R_CCMbSign[5:0] R_CCMb0_0[6:0] R_CCMb0_1[6:0] R_CCMb0_2[6:0] R_CCMb1_0[6:0] R_CCMb1_1[6:0] R_CCMb1_2[6:0] R_CCMb2_0[6:0] R_CCMb2_1[6:0] R_CCMb2_2[6:0] R_AE_Middle_Gain2[2:0] R_AE_Middle_Stage2[4:0] R_AE_Middle_Gain3[2:0] R_AE_Middle_Stage3[4:0] R_EdgeRatio_LL[3:0] R_EdgeRatio_NL[3:0] R_Edge_th_NL[4:0] R_Saturation_LL[4:0] R_Saturation_NL[4:0] Cycle latency from previous data stream to next data header ISP edge enhancement enable ISP edge enhancement value upper bound ISP edge enhancement value lower bound AE_stage > R_AE_stage_LL => Low Light AE_stage < R_AE_stage_NL => Normal Light Gamma strength @ normal light Gamma strength @ low light Apply Middle Gain when AE_stage >= R_AE_Middle_Stage AE Middle Gain Enable AE Middle Gain code AE Front Gain Lowerbound CCM matrix coefficient CCM matrix coefficient CCM matrix coefficient CCM matrix coefficient CCM matrix coefficient CCM matrix coefficient CCM matrix coefficient CCM matrix coefficient CCM matrix coefficient CCM matrix coefficient middle gain 2 middle gain stage 2 middle gain 3 middle gain stage 3 Edge ratio @ Low Light Edge ratio @ Normal Light Edge threshold @ Normal Light Color Saturation @ Low Light Color Saturation @ Normal Light Shading compensation percentage @ Normal Light Shading compensation percentage @ Low Light Contrast Enable Contrast Strength (ISP2_UpdateFlag=1, update ) Contrast CP (ISP2_UpdateFlag=1, update ) All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 11 V1.0, 2011/05/12 PixArt Imaging Inc. PAS6180 CMOS Image Sensor IC 2 2 2 2 2 2 67 69 6A 6B 6B 6B 103 105 106 107 107 107 R_MTK_SPI_OutEn R_Brightness_LL[7:0] R_Brightness_NL[7:0] R_MTK_SPI_En R_MTK_SPI_ClkInv R_MTK_SPI_MSBfirst R_MTK_SPI_DataParallelism [1:0] R_MTK_SPI_SyncCode_Bit_ 07_00[7:0] R_MTK_SPI_SyncCode_Bit_ 15_08[7:0] R_MTK_SPI_SyncCode_Bit_ 23_16[7:0] R_MTK_SPI_VSIZE[8] R_MTK_SPI_VSIZE[7:0] R_MTK_SPI_HSIZE[8] R_MTK_SPI_HSIZE[7:0] R_MTK_SPI_Header_Delay [4:0] R_ISP_WOI_HSize[8] R_ISP_WOI_HSize[7:0] R_ISP_WOI_VSize[8] R_ISP_WOI_VSize[7:0] R_ISP_WOI_HOffset[8] R_ISP_WOI_HOffset[7:0] R_ISP_WOI_VOffset[8] R_ISP_WOI_VOffset[7:0] R_ScalingFIFO_En R_ScalingFIFO_Out_NP[4:0] R_Ptr_ScalingFIFO[8] R_Ptr_ScalingFIFO[7:0] R_FIFO_Hsync[8] R_FIFO_Hsync[7:0] R_FIFO_HSize[8] R_FIFO_HSize[7:0] R_DummyPix_End[4:0] R_DummyPix_Front[4:0] [0] [7:0] [7:0] [0] [2] [3] 0x00 0x00 0x00 0x00 0x00 0x00 2 6B 107 2 6C 108 2 6D 109 2 6E 110 2 2 2 2 6F 70 71 72 111 112 113 114 2 73 115 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 9B 9C 9D 9E 9F A0 A1 A2 A3 A4 A5 A6 A8 A9 AA AB AD AE 155 156 157 158 159 160 161 162 163 164 165 166 168 169 170 171 173 174 2 B0 176 R_Scaler_X_En 2 B0 176 R_ScaleDenr_X[5:0] 2 B1 177 R_Scaler_Y_En 2 B1 2 (ISP2_UpdateFlag=1, update ) Brightness @ Low Light Brightness @ Normal Light output data coded by mtk spi 0=neg latch, 1=pos latch Byte transmission from MSB [5:4] 0x00 0=1bit, 1=2bit [7:0] 0xff sync code; fix 0xff [7:0] 0xff sync code; fix 0xff [7:0] 0xff sync code; fix 0xff [0] [7:0] [0] [7:0] 0x01 0x40 0x00 0xf0 image vsize to mtk spi image vsize to mtk spi image hsize to mtk spi image hsize to mtk spi [4:0] 0x04 Cycle Interval between any two header bytes [0] [7:0] [0] [7:0] [0] [7:0] [0] [7:0] [0] [4:0] [0] [7:0] [0] [7:0] [0] [7:0] [4:0] [4:0] 0x02 0x80 0x01 0xe0 0x00 0x00 0x00 0x00 0x01 0x02 0x00 0x02 0x00 0x20 0x02 0x80 0x00 0x00 [7] 0x00 [5:0] 0x00 [7] 0x00 177 R_ScaleDenr_Y[5:0] [5:0] 0x00 B2 178 R_EncDecimationNo_X[3:0] [3:0] 0x00 2 B2 178 R_EncDecimationNo_Y[3:0] [7:4] 0x00 2 2 B4 B5 180 R_ISP_WOIb_HSize[8] 181 R_ISP_WOIb_HSize[7:0] [0] [7:0] 0x02 0x80 WOIa Hsize WOIa Hsize WOIa Vsize WOIa Vsize WOIa Hoffset WOIa Hoffset WOIa Voffset WOIa Voffset (ISP2_UpdateFlag=1, update ) (ISP2_UpdateFlag=1, update ) (ISP2_UpdateFlag=1, update ) (ISP2_UpdateFlag=1, update ) ==(Hsize_sen+nov)*IN_NP*3/4 - Hsize_out*OUT_NP ==(Hsize_sen+nov)*IN_NP*3/4 - Hsize_out*OUT_NP FIFO output hsize (ISP2_UpdateFlag=1, update ) FIFO output hsize (ISP2_UpdateFlag=1, update ) number of dummy pixel inserted in the end of line number of dummy pixel inserted in the front of line Scaling Down X Enable (ISP2_UpdateFlag=1, update ) Scaling Down 16/x , 15<x<63 (ISP2_UpdateFlag=1, update ) Scaling Down Y Enable (ISP2_UpdateFlag=1, update ) Scaling Down 16/x , 15<x<63 (ISP2_UpdateFlag=1, update ) ISP decimation no in X-direction (ISP_Zoom_UpdateFlag=1, update ) ISP decimation no in Y-direction (ISP_Zoom_UpdateFlag=1, update) WOIb Hsize WOIb Hsize All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 12 V1.0, 2011/05/12 PixArt Imaging Inc. PAS6180 CMOS Image Sensor IC 2 2 2 2 2 2 2 2 2 2 2 2 B6 B7 B8 B9 BA BB BD BD BD BF BF C0 182 183 184 185 186 187 189 189 189 191 191 192 R_ISP_WOIb_VSize[8] R_ISP_WOIb_VSize[7:0] R_ISP_WOIb_HOffset[8] R_ISP_WOIb_HOffset[7:0] R_ISP_WOIb_VOffset[8] R_ISP_WOIb_VOffset[7:0] ISP_Out_En R_ISP_Out_1frame ISP_Out_1frame R_UV_Swap R_YC_Swap R_RGB565_mode[3:0] 2 C0 192 R_Format_Sel [0] [7:0] [0] [7:0] [0] [7:0] [0] [1] [2] [1] [2] [3:0] [5:4] 0x01 0xe0 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x01 0x00 WOIb Vsize WOIb Vsize WOIb Hoffset WOIb Hoffset WOIb Voffset WOIb Voffset 1= ISP output enable 1= output 1 frame Output 1 frame only if enable U V Swap Y C Swap RGB565_mode Output Data format select 0x00 0:YUV 1:RGB565 2:RGB555 3:RGB444 (ISP2_UpdateFlag=1, update ) All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 13 V1.0, 2011/05/12 PixArt Imaging Inc. PAS6180 CMOS Image Sensor IC note : GND, ground, DVDD28, main power, 2.8V typical, GND DVDD28 D4 NC SCL GND D1 B3 A3 B2 A2 CSD1 CSD0 SYSCLK PXCLK GND SCL SDA B1 C1 SDA PAS6180LT NC CSD3 C4 B4 CSD3 CSD2 A4 0.1uF CSD2 CSK NC DVDD28 MCLK NC A1 C2 CSD0 NC DVDD28 D2 CSD1 NC U1 C3 C1 GND D3 DVDD28 The capacitor must be close to the sensor as passible. 12-pin 1 2 3 4 5 6 7 8 9 10 11 12 SCL SDA CSD0 CSD1 CSD2 CSD3 CSK MCLK CON1 5. Reference Circuit Schematic All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 14 V1.0, 2011/05/12 PixArt Imaging Inc. PAS6180 CMOS Image Sensor IC 6. Package Information The formation of image is the result formed by package Top view(A1 : left-up) and general Lens(invert and mirror the image). All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 15 V1.0, 2011/05/12 PixArt Imaging Inc. PAS6180 CMOS Image Sensor IC Recommended PCB Layout All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 16 V1.0, 2011/05/12 PixArt Imaging Inc. PAS6180 CMOS Image Sensor IC Recommended Guideline for PCB Assembly Recommended vender and type for Pb-free solder paste 1. Almit LFM-48W TM-HP 2. Senju M705-GRN360-K IR Reflow Soldering Profile: Temperature profile is the most important control in reflow soldering. It must be fine tuned to establish a robust process. The typical recommended IR reflow profile is showed in figure below. Fig. 8 IR Reflow Profile Reflow Profile : 1. Average Ramp-up Rate (30°C to preheat zone): 1.5~ 2.5 Degree C/ Sec 2. Preheat zone: 2.1 Temp ramp from 170~ 200 degree C 2.2 Exposure time: 90 +/- 30 sec 3. Melting zone: 3.1 Melting area temp > 220 degree C for at least 30 ~ 50 sec 3.2 Peak temperature : 245 degree C. Others: Epoxy under-filled process is required post IC mounting process. ☉ Dispense Epoxy Epoxy Fig. Epoxy Under-filled All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 17 V1.0, 2011/05/12