PAS6352 Specification PAS6352 CMOS VGA IMAGE SENSOR General Description The PAS6352 is a highly integrated CMOS active-pixel image sensor that has output of 640 x 480 pixels. It embedded the new FinePixel™ sensor technology to perform the excellent image quality. PAS6352 outputs 10-bit RGB raw or YUV/YCrCb 4:2:2 or RGB565/555/444 data through a parallel data bus. It is available in CSP package. The PAS6352 can be programmed to set the exposure time for different luminance condition via I2C TM serial control bus. By programming the internal register set, it performs on-chip frame rate adjustment and programmable gain control. Features § § § § § § § § § § § § § § § § Active Pixels: 648 x 488 pixels Resolution: 640 x 480 pixels, 1/4” Lens Bayer-RGB color filter array Output format : l RAW, 10-bit l YUV/YCrCb 4:2:2 l RGB565/555/444 On-chip 10-bit pipelined A/D converter On-chip manual analog gain control Continuous variable frame time & exposure time I2CTM Interface Support 1.7V~3.3V I/O Power dissipation: operating typ. TBD@ 2.8V (VGA YUV 60fps parallel-output, without loading), low power-down dissipation typ./max. TBD @ 2.8V Automatic Background Compensation ISP function: l AEC & AGC l AWB l Gamma l Color matrix l Sharpness l De-noise l Color saturation l Defect compensation l Lens shading compensation l Auto de-flicker l Decimation-AVG and Scaler l DRC (Dynamic Range Compensation) l WOI & Sub-sampling Dummy line & pixel timing Output Hsync at Vsync PLL Module size : TBD Key Specification Active Pixel 648(H) x 488(V) Resolution 640 (H) x 480 (V) Analog 2.8V I/O 1.7V ~ 3.3V Core 1.8V Power [ Array diagonal ] Pixel Size 1/4” Lens 5.6um * 5.6um Lens Chief Ray Angle TBD Max. Frame rate VGA 60fps Max. input clock 48 MHz Max. Pixel clock 48 MHz, VGA YUV 60fps Sensitivity TBD Color filter RGB Bayer Pattern TBD Exposure Time Scan Mode Progressive S/N Ratio TBD Dynamic range TBD Package CSP All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] V0.6, 2012/11/13 1 PixArt Imaging Inc. PAS6352 CMOS Image Sensor IC 1. Pin Assignment PAS6352LT (Top-view) Pin No. A1 A2 A3 A4 A5 A6 A7 A8 A9 B1 B2 B3 B4 B5 B6 B7 B8 B9 C1 C2 Name VDD18K_I VSSD PXD11 PXD9 IOVDD PXCLK PXD6 VSSD VDD18K_I HSYNC PXD13 VSYNC PXD8 PXD7 PXD4 PXD5 DVDD28 SYSCLK PXD2 VSSD Type PWR GND OUT OUT PWR OUT OUT GND PWR OUT OUT OUT OUT OUT OUT OUT PWR IN -GND Description Digital core power, 1.8V typical Ground Digital pixel data [5] Digital pixel data [3] I/O power, 2.8V typical Pixel clock output Digital pixel data [0], LSB Ground Digital core power, 1.8V typical Horizontal synchronization signal output Digital pixel data [7], MSB Vertical synchronization signal output Digital pixel data [2] Digital pixel data [1] Digital pixel data for raw mode Digital pixel data for raw mode Main power, 2.8V typical External clock input NC Ground All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 2 V0.6, 2012/11/13 PixArt Imaging Inc. PAS6352 C3 C7 C8 C9 D1 D2 D8 D9 E1 E2 E3 E6 E7 E8 E9 F1 F2 F3 F4 F5 F6 F7 F8 F9 CMOS Image Sensor IC PXD10 PXD12 VSSD PXD3 IOVDD VDD18K_I VDDREF IOVDD SDA SCL FSOURCE VSSD VSSD VDDAY VSSA AVDD28 VSSA RSTN FRAMESYNC IOVDD VSSD CSB VSSAY AVDD28 OUT OUT GND -PWR PWR Ref PWR I/O IN -GND GND Ref GND PWR GND IN -PWR GND IN GND PWR Digital pixel data [4] Digital pixel data [6] Ground NC I/O power, 2.8V typical Digital core power, 1.8V typical Voltage reference I/O power, 2.8V typical I2C data I2C clock input NC Ground Ground Voltage reference Ground Main power, 2.8V typical Ground Chip reset mode enable, active low Test pin I/O power, 2.8V typical Ground Power down mode enable, active high Ground Main power, 2.8V typical All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 3 V0.6, 2012/11/13 PixArt Imaging Inc. PAS6352 CMOS Image Sensor IC 2. I2CTM Bus PAS6352 supports I2C bus transfer protocol and acts as slave device. The 7-bits unique slave address is “1000000” and supports receiving / transmitting speed as maximum 400KHz. I2C Bus Overview l Only two wires SDA ( serial data ) and SCL ( serial clock ) carry information between the devices connected to the I2C bus. Normally both SDA and SCL lines are open collector structure and pulled high by external pull-up resistors. l Only the master can initiates a transfer ( start ), generates clock signals, and terminates a transfer ( stop ). l Start and stop condition : A high to low transition of the SDA line while SCL is high defines a start condition. A low to high transition of the SDA line while SCL is high defines a stop condition. Please refer to Figure 2.1. l Valid data : The data on the SDA line must be stable during the high period of the SCL clock. Within each byte, MSB is always transferred first. Read / Write control bit is the LSB of the first byte. Please refer to Figure 2.2. l Both the master and slave can transmit and receive data from the bus. l Acknowledge : The receiving device should pull down the SDA line during high period of the SCL clock line when a complete byte was transferred by transmitter. In the case of a master received data from a slave, the master does not generate an acknowledgment on the last byte to indicate the end of a master read cycle. Figure 2.1 Start and Stop conditions Figure 2.2 Valid Data All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 4 V0.6, 2012/11/13 PixArt Imaging Inc. PAS6352 CMOS Image Sensor IC Data Transfer Format Master transmits data to salve ( write cycle ) l S : Start. l A : Acknowledge by salve. l P : Stop. l RW : The LSB of 1ST byte to decide whether current cycle is read or write cycle. RW = 1 – Read cycle, RW = 0 – Write cycle. l SUBADDRESS : The address values of PAS6352 internal control registers. ( Please refer to PAS6352 register description ) During write cycle, the master generates start condition and then places the 1st byte data that are combined slave address ( 7 bits ) with a read / write control bit to SDA line. After slave ( PAS6352 ) issues acknowledgment, the master places 2nd byte ( Sub Address ) data on SDA line. Again follow the PAS6352 acknowledgment, the master places the 8 bits data on SDA line and transmit to PAS6352 control register ( address was assigned by 2nd byte ). After PAS6352 issues acknowledgment, the master can generate a stop condition to end of this write cycle. In the condition of multi-byte write, the PAS6352 sub-address is automatically increment after each DATA byte transferred. The data and A cycles is repeat until last byte write. Every control registers value inside PAS6352 can be programming via this way. Slave transmits data to master ( read cycle ) l The sub-address was taken from previous write cycle. l The sub-address is automatically increment after each byte read. l Am : Acknowledge by master. l Note there is no acknowledgment from master after last byte read. During read cycle, the master generates start condition and then place the 1st byte data that are combined slave address ( 7 bits ) with a read / write control bit to SDA line. After issue acknowledgment, 8 bits DATA was also placed on SDA line by PAS6352. The 8 bits data was read from PAS6352 internal control register that address was assigned by previous write cycle. Follow the master acknowledgment, the PAS6352 place the next 8 bits data ( address is increment automatically ) on SDA line and then transmit to master serially. The DATA and Am cycles is repeat until the last byte read. After last byte read, Am is no longer generated by master but instead by keep SDA line high. The slave ( PAS6352 ) must releases SDA line to master to generate STOP condition. All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 5 V0.6, 2012/11/13 PixArt Imaging Inc. PAS6352 CMOS Image Sensor IC All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 6 V0.6, 2012/11/13 PixArt Imaging Inc. PAS6352 CMOS Image Sensor IC I2CTM Bus Timing I2CTM Bus Timing Specification Parameter Symbol Standard Mode Unit Min. Max fscl 10 400 KHz tHD:STA 4.0 - μs Low period of the SCL clock. tLOW 4.7 - μs High period of the SCL clock. tHIGH 0.75 - μs Set-up time for a repeated START condition. tSU;STA 4.7 - μs Data hold time. For I2C-bus device. tHD;DAT 0 3.45 μs Data set-up time. tSU;DAT 250 - ns Rise time of both SDA and SCL signals. tr 30 N.D. ns ( notel ) Fall time of both SDA and SCL signals. tf 30 N.D. ns ( notel ) tSU;STO 4.0 - μs Bus free time between a STOP and START. tBUF 4.7 - μs Capacitive load for each bus line. Cb 1 15 pF Noise margin at LOW level for each connected device. ( Including hysteresis ) VnL 0.1 VDD - V Noise margin at HIGH level for each connected device. ( including hysteresis ) VnH 0.2 VDD - V SCL clock frequency. Hold time ( repeated ) Start condition. After this period, the first clock pulse is generated. Set-up time for STOP condition. Note : It depends on the “high” period time of SCL. All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 7 V0.6, 2012/11/13 PixArt Imaging Inc. PAS6352 CMOS Image Sensor IC 3. Registers Register Table Bank 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Address F [7:0] 11 [7:0] 19 [7:0] 1A [7:0] 1B [7:0] 1C [7:0] 1F [4] 20 [7:0] 23 [7:0] 28 [7:0] 29 [0] 2A [7:0] 2B [7:0] 2C [7:0] 2D [7:0] 2E [7:0] 2F [7:0] 30 [7:0] 31 [7:0] 32 [7:0] 33 [7:0] 34 [7:0] 35 [7:0] 36 [7:0] 37 [7:0] 38 [7:0] 47 49 4A 4D 4E 4F 50 51 52 53 54 [1:0] [7:0] [7:0] [7:0] [7:0] [7:0] [7:0] [7:0] [7:0] [7:0] [7:0] Register Name R_AWB_Window_X[7:0] R_AWB_Window_Y[7:0] R_AWB_DGnR_LB_by2[7:0] R_AWB_DGnR_UB_by2[7:0] R_AWB_DGnB_LB_by2[7:0] R_AWB_DGnB_UB_by2[7:0] R_DeNoiseEn R_DeNoise_Str__G[7:0] R_DeNoise_Str__RB[7:0] R_ISP_YED R_ISP_Gamma_EnH R_ISP_Y00 R_ISP_Y01 R_ISP_Y02 R_ISP_Y03 R_ISP_Y04 R_ISP_Y05 R_ISP_Y06 R_ISP_Y07 R_ISP_Y08 R_ISP_Y09 R_ISP_Y10 R_ISP_Y11 R_ISP_Y12 R_ISP_Y13 R_ISP_Y14 R_AWB_Speed R_AWB_SumRatio_B R_AWB_SumRatio_R R_AWB_CbThdL[7:0] R_AWB_CrThdL[7:0] R_AWB_CbCrThdL[7:0] R_AWB_CbThdH[7:0] R_AWB_CrThdH[7:0] R_AWB_CbCrThdH[7:0] R_Ylow R_Yhigh Description AWB window width (by4) AWB window height (by4) AWB digital gain lower bound for R AWB digital gain upper bound for B AWB digital gain lower bound for B AWB digital gain upper bound for R DeNoise Enable Denoise Strength (for color G) Denoise Strength (for color R/B) ISP Gamma YED (256) ISP gamma correction enable ISP Gamma Y0 (4) ISP Gamma Y1 (8) ISP Gamma Y2 (16) ISP Gamma Y3 (32) ISP Gamma Y4 (40) ISP Gamma Y5 (48) ISP Gamma Y6 (56) ISP Gamma Y7 (64) ISP Gamma Y8 (80) ISP Gamma Y9 (96) ISP Gamma Y10 (112) ISP Gamma Y11 (128) ISP Gamma Y12 (160) ISP Gamma Y13 (192) ISP Gamma Y14 (224) AWB adjust speed. The more, the slower 0: 1 x 1: 1/2 x 2: 1/4 x 3: 1/8 x AWB B sum ratio = 128/X AWB R sum ratio = 128/X AWB region test Cb Low threshold -128 ~ +127 (2's complement) AWB region test Cr Low threshold -128 ~ +127 (2's complement) AWB region test Cb+Cr Low threshold -128 ~ +127 (2's complement) AWB region test Cb High threshold -128 ~ +127 (2's complement) AWB region test Cr High threshold -128 ~ +127 (2's complement) AWB region test Cb+Cr High threshold -128 ~ +127 (2's complement) Low bound of “light-pixel”Y in AWB High bound of “light-pixel”Y in AWB All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 8 V0.6, 2012/11/13 PixArt Imaging Inc. PAS6352 0 66 CMOS Image Sensor IC [4] R_AE_EnH 0 0 0 0 0 0 0 66 67 68 69 6A 6B 6C [0] [7:0] [6:0] [7:0] [7:0] [4:0] [4:0] R_freq_60 R_SysClk_freq[7:0] R_SysClk_freq[14:8] R_DeNoise_Str__G__HS[7:0] R_DeNoise_Str__RB_HS[7:0] R_AE_minStage[4:0] R_AE_maxStage[4:0] 0 0 0 0 0 0 6D 6F 72 72 79 7B [7:0] [7:0] [0] [4] [7:0] [7:0] R_AG_stage_UB R_Ytar8bit R_AWB_EnH R_AWB_Gain_rst R_ISP_HOffset[7:0] R_ISP_VOffset[7:0] AE enable Set de-flicker frequency 0/1: 50/60Hz Input_frequency/2048 Input_frequency/2048 Denoise Strength (for color G) in HS mode Denoise Strength (for color R/B) in HS mode Minimum AE stage Maximum AE stage (AE_maxStage<=31) AG_stage upper bound at max AE_stage (0:2x; 16:4x, 32:8x, 48:16x, 64:32x, 80:64x, 96:128x) 0~255, Target luminance of AE Auto-white balance enable AWB gain reset ISP Hsize Offset ISP Vsize Offset 0 81 [5:4] R_AE_Speed AE speed, the more, the slower 0: 1 x 1: 1/2 x 2: 1/4 x 3: 1/8 x 0 8F [7:0] R_ImgEffect_c0 Image Effect parameter 0 (ISP_UpdateFlag=1, update ) 0 90 [7:0] R_ImgEffect_c1 Image Effect parameter 1 (ISP_UpdateFlag=1, update ) 0 91 [7:0] R_ImgEffect_c2 Image Effect parameter 2 (ISP_UpdateFlag=1, update ) [3:0] R_ImgEffectMode Image Effect mode 0: monochrome 1: negative 2: x-ray 3: Sepia/Cold/Warm/Sunset 6: Solarize 10: Pixelate (ISP_UpdateFlag=1, update ) 0 93 0 94 [0] R_ISP_ImgEffect_En 1: Image effect function enable (ISP_UpdateFlag=1, update ) 0 97 [4] R_Shading_EnH Lens shading enable 0 99 [6:0] R_OffsetX_R[6:0] Horizontal distances between shading center and sensor array center of R-channel, MSB:sign bit, -63~+63 0 9A [6:0] R_OffsetY_R[6:0] Vertical distances between shading center and sensor array center of R-channel, MSB:sign bit, -63~+63 All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 9 V0.6, 2012/11/13 PixArt Imaging Inc. PAS6352 CMOS Image Sensor IC 0 9B [6:0] R_OffsetX_G[6:0] Horizontal distances between shading center and sensor array center of G-channel, MSB:sign bit, -63~+63 0 9C [6:0] R_OffsetY_G[6:0] Vertical distances between shading center and sensor array center of G-channel, MSB:sign bit, -63~+63 0 9D [6:0] R_OffsetX_B[6:0] Horizontal distances between shading center and sensor array center of B-channel, MSB:sign bit, -63~+63 0 9E [6:0] R_OffsetY_B[6:0] Vertical distances between shading center and sensor array center of B-channel, MSB:sign bit, -63~+63 0 9F [5:0] R_LSC_R1[5:0] Quartic parameter of R-channel 0 A0 [5:0] R_LSC_G1[5:0] Quartic parameter of G-channel 0 A1 [5:0] R_LSC_B1[5:0] Quartic parameter of B-channel 0 A2 [5:0] R_LSC_R2[5:0] Square parameter of R-channel 0 A3 [5:0] R_LSC_G2[5:0] Square parameter of G-channel 0 A4 [5:0] R_LSC_B2[5:0] Square parameter of B-channel 0 A5 [2:0] R_LSFT_1[2:0] Lens shading coefficient coarse shift value 0 A6 [1:0] R_LSFT_2[1:0] Lens shading coefficient coarse shift value 0 A7 [1:0] R_LSFT_3[1:0] Lens shading coefficient coarse shift value 0 2 2 2 2 2 A8 8 9 A B 2A [1:0] [7:0] [7:0] [7:0] [0] [7] 2 2F [4:0] R_AE_stage_LL[4:0] Lens shading coefficient coarse shift value Y offset value U offset value V offset value YUV value offset enable ISP edge enhancement enable (AE_stage >= R_AE_stage_LL) && (AG_stage >= R_AG_stage_LL) =>Low Light 2 30 [4:0] R_AE_stage_NL[4:0] (AE_stage <= R_AE_stage_NL) && (AG_stage <= R_AG_stage_NL) =>Normal Light 2 32 [7:0] R_AG_stage_LL[7:0] (AE_stage >= R_AE_stage_LL) && (AG_stage >= R_AG_stage_LL) =>Low Light 2 2 2 2 2 2 2 2 2 2 2 33 56 57 58 5A 5B 5C 5D 5E 5F 60 [7:0] [4:0] [4:0] [4:0] [4:0] [7:0] [7:0] [1] [4:0] [4:0] [4:0] R_LSFT_4[1:0] R_ImgEffect_Y_offset[7:0] R_ImgEffect_U_offset[7:0] R_ImgEffect_V_offset[7:0] R_ISP_ImgEffect_1_En R_ISP_Edge_En0 R_AG_stage_NL[7:0] R_EdgeRatio_Delta[4:0] R_EdgeRatio_LL[4:0] R_EdgeRatio_NL[4:0] R_Edge_th_Delta[4:0] R_Edge_th_LL[7:0] R_Edge_th_NL[7:0] R_Saturation_2X R_Saturation_Delta[4:0] R_Saturation_LL[4:0] R_Saturation_NL[4:0] (AE_stage <= R_AE_stage_NL) && (AG_stage <= R_AG_stage_NL) =>Normal Light Increment when AE/AG state change Edge ratio @Low Light Edge ratio @Normal Light Increment when AE/AG state change Edge threshold @ Low Light Edge threshold @ Normal Light Color Saturation double Increment when AE/AG state change Color Saturation @ Low Light Color Saturation @ Normal Light All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 10 V0.6, 2012/11/13 PixArt Imaging Inc. PAS6352 CMOS Image Sensor IC 2 2 2 2 2 2 62 63 63 64 69 6A [4:0] [3:0] [7:4] [0] [7:0] [7:0] R_Shading_CP_R_Delta[4:0] R_Shading_CP_R_NL[3:0] R_Shading_CP_R_LL[3:0] R_Contrast_En R_Brightness_LL[7:0] R_Brightness_NL[7:0] Increment when AE/AG state change Shading compensation percentage @Normal Light Shading compensation percentage @Low Light Contrast Enable 2 9B [1:0] R_ISP_WOI_HSize[9:8] Output image Hsize (ISP2_UpdateFlag=1, update ) Brightness @ Low Light Brightness @ Normal Light 2 9C [7:0] R_ISP_WOI_HSize[7:0] Output image Hsize (ISP2_UpdateFlag=1, update ) 2 9D [1:0] R_ISP_WOI_VSize[9:8] Output image Vsize (ISP2_UpdateFlag=1, update ) 2 9E [7:0] R_ISP_WOI_VSize[7:0] Output image Vsize (ISP2_UpdateFlag=1, update ) 2 9F [1:0] R_ISP_WOI_HOffset[9:8] Output image H offset (ISP2_UpdateFlag=1, update ) 2 A0 [7:0] R_ISP_WOI_HOffset[7:0] Output image H offset (ISP2_UpdateFlag=1, update ) 2 A1 [1:0] R_ISP_WOI_VOffset[9:8] Output image V offset (ISP2_UpdateFlag=1, update ) 2 A2 [7:0] R_ISP_WOI_VOffset[7:0] Output image V offset (ISP2_UpdateFlag=1, update ) 2 B0 [7] R_Scaler_X_En Scaling Down 16/x , 15<x<63 (ISP2_UpdateFlag=1, update ) 2 B0 2 B1 2 B1 [5:0] R_ScaleDenr_Y[5:0] Scaling Down 16/x , 15<x<63 (ISP2_UpdateFlag=1, update ) 2 B2 [3:0] R_EncDecimationNo_X[3:0] ISP decimation no in X-direction (ISP_Zoom_UpdateFlag=1, update ) [7:4] [1] [2] [3:0] R_EncDecimationNo_Y[3:0] R_UV_Swap R_YC_Swap R_RGB565_mode[3:0] ISP decimation no in Y-direction (ISP_Zoom_UpdateFlag=1, update) U V Swap Y C Swap RGB565_mode R_Format_Sel R_Vsync_INV R_Hsync_INV R_Pxclk_INV R_CCMASign[8] R_CCMASign[7:0] Output Data format select 0:YUV 1:RGB565 2:RGB555 3:RGB444 (ISP2_UpdateFlag=1, update ) Vsync inverse Hsync inverse Pxclk inverse ACCM Base matrix coefficient ACCM Base matrix coefficient 2 2 2 2 2 2 2 2 3 3 B2 BF BF C0 C0 C1 C1 C1 2 3 [5:0] R_ScaleDenr_X[5:0] Scaling Down X Enable (ISP2_UpdateFlag=1, update ) [7] [5:4] [0] [1] [2] [0] [7:0] R_Scaler_Y_En Scaling Down Y Enable (ISP2_UpdateFlag=1, update ) All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 11 V0.6, 2012/11/13 PixArt Imaging Inc. PAS6352 3 3 3 3 3 3 3 3 3 4 5 6 7 8 9 A B C CMOS Image Sensor IC [7:0] [7:0] [7:0] [7:0] [7:0] [7:0] [7:0] [7:0] [7:0] R_CCMA0_0[7:0] R_CCMA0_1[7:0] R_CCMA0_2[7:0] R_CCMA1_0[7:0] R_CCMA1_1[7:0] R_CCMA1_2[7:0] R_CCMA2_0[7:0] R_CCMA2_1[7:0] R_CCMA2_2[7:0] ACCM Base matrix coefficient ACCM Base matrix coefficient ACCM Base matrix coefficient ACCM Base matrix coefficient ACCM Base matrix coefficient ACCM Base matrix coefficient ACCM Base matrix coefficient ACCM Base matrix coefficient ACCM Base matrix coefficient All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 12 V0.6, 2012/11/13 2V8 1V8 2V8 D GND B1 B3 H SY N C VSY N C E2 SCL F1 E3 E1 SDA D2 D1 C2 C1 B2 PXD13 PAS6352LT AVDD 28 F SOU RCE SCL SDA VDD18K_I I OVD D VSSD PXD2 VSY N C H SY N C A1 VDD 18K_I A2 VSSD PXD 11 A3 PXD11 PXD 10 C3 PXD10 U1 PXD13 C2 PXD 9 AGN D F2 VSSA A4 PXD 9 0. 1uF R STN F3 PXD 8 R STN B4 PXD 8 PXD 7 PXD 7 B5 F RAMESYN C F4 PXC LK C1 0. 1uF DGN D 2V8 DGN D F5 IOVDD A5 I OVDD DGN D F6 VSSD A6 PXCLK PXD 4 B6 PXD 4 PXD 5 AGN D PXD 6 AGND 1uF C14 PXD 5 B7 VSSAY F8 C SB F7 C SB E8 VDDAY A7 PXD 6 DGND PXD 12 AVDD28 VSSA VD DREF I OVD D VSSD PXD 3 DVDD28 SY SCLK D GN D 1V8 DGN D D GND E6 VSSD C7 PXD12 2V8 VSSD A9 VDD 18K_I A8 VSSD E7 F9 E9 D8 D9 C8 C9 B8 B9 C11 C8 0. 1uF 0. 1uF 0. 1uF SY SC LK C7 AGND AGN D AGND 2V8 DGN D D GND 2V8 2V8 +5V DGN D +5V DGN D 0. 1uF C6 VIN PAD DGND 10uF 0. 1uF C 13 10k L1 2 2 0 R2 R1 1 1 AGN D 2V8 DGND 0. 1uF 10uF 2V8 C 10 C9 DGND 0. 1uF 10uF 1V8 C4 C3 PAS6352 DGN D SDA SCL 10k DGND 10uF C 12 DGND 2. 8V LDO U3 VIN PAD C5 DGND 1. 8V LDO U2 1 2 2 1 GND 1 VIN 2 1 2 2 1 GN D 1 2 VIN VOUT 3 VOUT 3 1 2 1 PixArt Imaging Inc. E-mail: [email protected] 2 1V8 PixArt Imaging Inc. CMOS Image Sensor IC 4. Reference Circuit Schematic All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. 13 V0.6, 2012/11/13 PixArt Imaging Inc. PAS6352 CMOS Image Sensor IC 5. Package Information All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 14 V0.6, 2012/11/13 PixArt Imaging Inc. PAS6352 CMOS Image Sensor IC Recommended PCB Layout All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 15 V0.6, 2012/11/13 PixArt Imaging Inc. PAS6352 CMOS Image Sensor IC Recommended Guideline for PCB Assembly Recommended vender and type for Pb-free solder paste 1. Almit LFM-48W TM-HP 2. Senju M705-GRN360-K IR Reflow Soldering Profile: Temperature profile is the most important control in reflow soldering. It must be fine tuned to establish a robust process. The typical recommended IR reflow profile is showed in figure below. IR Reflow Profile Reflow Profile : 1. Average Ramp-up Rate (30°C to preheat zone): 1.5~ 2.5 Degree C/ Sec 2. Preheat zone: 2.1 Temp ramp from 170~ 200 degree C 2.2 Exposure time: 90 +/- 30 sec 3. Melting zone: 3.1 Melting area temp > 220 degree C for at least 30 ~ 50 sec 3.2 Peak temperature : 245 degree C. Others: Epoxy under-filled process is required post IC mounting process. ☉ Dispense Epoxy Epoxy Epoxy Under-filled All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 16 V0.6, 2012/11/13