FDMB2307NZ - Fairchild Semiconductor

FDMB2307NZ
Dual Common Drain N-Channel PowerTrench® MOSFET
20 V, 9.7 A, 16.5 mΩ
Features
General Description
„ Max rS1S2(on) = 16.5 mΩ at VGS = 4.5 V, ID = 8 A
This device is designed specifically as a single package solution
„ Max rS1S2(on) = 18 mΩ at VGS = 4.2 V, ID = 7.4 A
for Li-Ion battery pack protection circuit and other ultra-portable
„ Max rS1S2(on) = 21 mΩ at VGS = 3.1 V, ID = 7 A
applications.
„ Max rS1S2(on) = 24 mΩ at VGS = 2.5 V, ID = 6.7 A
Fairchild’s advanced PowerTrench® process with state of the art
It
features
two
common
drain
N-channel
MOSFETs, which enables bidirectional current flow, on
„ Low Profile - 0.8 mm maximum - in the new package
MicroFET 2x3 mm
MicroFET Leadframe, the FDMB2307NZ minimizes both PCB
space and rS1S2(on).
„ HBM ESD protection level > 2 kV (Note 3)
Application
„ RoHS Compliant
„ Li-Ion Battery Pack
Pin 1
S1
Pin 1
S1
G1
G2
4
3
G1
S2
5
2
S1
S2
6
1
S1
D1/D2
S2
Top
S2
G2
Bottom
MLP 2x3
MOSFET Maximum Ratings TA = 25°C unless otherwise noted
Symbol
VS1S2
Source1 to Source2 Voltage
VGS
Gate to Source Voltage
IS1S2
PD
TJ, TSTG
Parameter
Source1 to Source2 Current
-Continuous
TA = 25°C
Ratings
20
Units
V
(Note 4)
±12
V
(Note 1a)
9.7
-Pulsed
40
Power Dissipation
TA = 25 °C
(Note 1a)
2.2
Power Dissipation
TA = 25 °C
(Note 1b)
0.8
Operating and Storage Junction Temperature Range
-55 to +150
A
W
°C
Thermal Characteristics
RθJA
Thermal Resistance, Junction to Ambient(Dual Operation)
(Note 1a)
57
RθJA
Thermal Resistance, Junction to Ambient(Dual Operation)
(Note 1b)
161
°C/W
Package Marking and Ordering Information
Device Marking
307
Device
FDMB2307NZ
©2013 Fairchild Semiconductor Corporation
FDMB2307NZ Rev.C7
Package
MLP 2x3
1
Reel Size
7’’
Tape Width
8 mm
Quantity
3000 units
www.fairchildsemi.com
FDMB2307NZ Dual Common Drain N-Channel PowerTrench® MOSFET
April 2014
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
IS1S2
Zero Gate Voltage Source1 to Source2
Current
VS1S2 = 16 V, VGS = 0 V
1
μA
IGSS
Gate to Source Leakage Current
VGS = 12 V, VS1S2 = 0 V
10
μA
V
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VS1S2, IS1S2 = 250 μA
0.6
1
1.5
VGS = 4.5 V, IS1S2 = 8 A
10.5
13.5
16.5
VGS = 4.2 V, IS1S2 = 7.4 A
rS1S2(on)
gFS
Static Source1 to Source2 On Resistance
Forward Transconductance
11
14
18
11.5
16
21
VGS = 2.5 V, IS1S2 = 6.7 A
12
18
24
VGS = 4.5 V, IS1S2 = 8 A,
TJ = 125 °C
11
20
29
VGS = 3.1 V, IS1S2 = 7 A
VS1S2 = 5 V, IS1S2 = 8 A
41
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
VS1S2 = 10 V, VGS = 0 V,
f = 1 MHz
(Note 5)
0.1
1760
2640
pF
229
345
pF
211
320
pF
2.6
8
Ω
12
22
ns
19
34
ns
32
51
ns
9.5
17
ns
20
28
nC
18
25
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
Qg
Total Gate Charge
Qg
Total Gate Charge
Qgs
Gate1 to Source1 Charge
Qgd
Gate1 to Source2 “Miller” Charge
VS1S2 = 10 V, IS1S2 = 8 A,
VGS = 4.5 V, RGEN = 6 Ω
VG1S1 = 0 V to 5 V
VG1S1 = 0 V to 4.5 V VS1S2 = 10V,
IS1S2 = 8 A,
VG2S2 = 0 V
nC
2.8
nC
5.3
nC
Source1- Source2 Diode Characteristics
Ifss
Maximum Continuous Source1-Source2 Diode Forward Current
Vfss
V
= 0 V, VG2S2= 4.5 V,
Source1 to Source2 Diode Forward Voltage G1S 1
Ifss= 8 A
(Note 2)
0.8
8
A
1.2
V
NOTES:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
a. 57 °C/W when mounted on
a 1 in2 pad of 2 oz copper
b. 161 °C/W when mounted on
a minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied.
5. Rg is measured on 100% of the die at wafer level.
©2013 Fairchild Semiconductor Corporation
FDMB2307NZ Rev.C7
2
www.fairchildsemi.com
FDMB2307NZ Dual Common Drain N-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25°C unless otherwise noted
IS1S2, SOURCE1 TO SOURCE2 CURRENT (A)
IS1S2, SOURCE1 TO SOURCE2 CURRENT (A)
40
VG1S1 = 4.5 V
VG1S1 = 4.2 V
30
VG1S1 = 3.1 V
VG1S1 = 2.5 V
20
10
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VG2S2 = 4.5 V
0
0.0
0.2
0.4
0.6
VS1S2, SOURCE1 TO SOURCE2 VOLTAGE (V)
0.8
40
VGS = 4.5 V
VGS = 4.2 V
30
VGS = 3.1 V
VGS = 2.5 V
20
10
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
0.0
1.5
VG1S1 = 3.1 V
1.0
VG1S1 = 4.2 V
VG1S1 = 4.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VG2S2 = 4.5 V
0.5
0
10
20
30
0.8
VGS = 2.5 V
VGS = 3.1 V
VGS = 4.2 V
1.0
VGS = 4.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0.5
40
0
10
20
30
40
IS1S2, SOURCE1 TO SOURCE2 CURRENT (A)
Figure 4. Normalized On-Resistance vs Source1
to Source2 Current and Gate Voltage
Figure 3. Normalized On-Resistance vs Source1
to Source2 Current and Gate Voltage
80
1.6
IS1S2 = 8 A
VGS = 4.5 V
rS1S2(on), SOURCE1 TO
1.4
1.2
1.0
0.8
-25
0
25
50
75
100
125
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
60
IS1S2 = 8 A
40
TJ = 150 oC
20
TJ = 25 oC
0
1.0
150
TJ, JUNCTION TEMPERATURE (oC)
1.5
2.0
2.5
3.0
3.5
4.0
4.5
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 6. On Resistance vs Gate to
Source Voltage
Figure 5. Normalized On Resistance
vs Junction Temperature
©2013 Fairchild Semiconductor Corporation
FDMB2307NZ Rev.C7
SOURCE2 ON-RESISTANCE (mΩ)
NORMALIZED
SOURCE1 TO SOURCE2 ON-RESISTANCE
0.6
1.5
IS1S2, SOURCE1 TO SOURCE2 CURRENT (A)
0.6
-50
0.4
Figure 2. On-Region Characteristics
NORMALIZED
SOURCE1 TO SOURCE2 ON-RESISTANCE
NORMALIZED
SOURCE1 TO SOURCE2 ON-RESISTANCE
Figure 1. On-Region Characteristics
VG1S1 = 2.5 V
0.2
VS1S2, SOURCE1 TO SOURCE2 VOLTAGE (V)
3
www.fairchildsemi.com
FDMB2307NZ Dual Common Drain N-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25°C unless otherwise noted
Ifss, SOURCE1
TO SOURCE2 FORWARD CURRENT (A)
IS1S2, SOURCE1 TO SOURCE2 CURRENT (A)
40
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
30
VS1S2 = 5 V
TJ = 150 oC
20
TJ = 25 oC
10
TJ = -55 oC
0
0.5
1.0
1.5
2.0
100
VG1S1 = 0 V, VG2S2 = 4.5 V
10
TJ = 150 oC
1
0.1
0.01
0.001
0.0
VGS, GATE TO SOURCE VOLTAGE (V)
0.2
0.4
0.6
0.8
1.0
1.2
Figure 8. Source1 to Source2 Diode
Forward Voltage vs Source Current
10000
5
VG2S2 = 0 V
IS1S2 = 8 A
f = 1 MHz
VGS = 0 V
4
CAPACITANCE (pF)
VG1S1, GATE1 TO SOURCE1 VOLTAGE (V)
TJ = -55 oC
Vfss, BODY DIODE FORWARD VOLTAGE (V)
Figure 7. Transfer Characteristics
VS1S2 = 8 V
3
VS1S2 = 10 V
2
VS1S2 = 12 V
Ciss
1000
Coss
1
Crss
0
0
5
10
15
20
100
0.1
25
Qg, GATE CHARGE (nC)
IS1S2, SOURCE1 TO SOURCE2 CURRENT (A)
-1
VS1S2 = 0 V
10
-3
10
-4
10
TJ = 125oC
-5
10
-6
10
-7
10
-8
10
TJ = 25 oC
-9
10
-10
10
0
4
8
12
16
20
100
10
1 ms
10 ms
1
0.1
THIS AREA IS
LIMITED BY rDS(on)
100 ms
SINGLE PULSE
TJ = MAX RATED
1s
10 s
DC
RθJA = 161 oC/W
TA = 25 oC
0.01
0.01
0.1
1
10
100
VS1S2, SOURCE1 TO SOURCE2 VOLTAGE (V)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 11. Gate Leakage Current vs
Gate to Source Voltage
©2013 Fairchild Semiconductor Corporation
FDMB2307NZ Rev.C7
10
Figure 10. Capacitance vs Source1
to Source2 Voltage
10
-2
1
VS1S2, SOURCE1 TO SOURCE2 VOLTAGE (V)
Figure 9. Gate Charge Characteristics
Ig, GATE LEAKAGE CURRENT (A)
TJ = 25 oC
Figure 12. Forward Bias Safe
Operating Area
4
www.fairchildsemi.com
FDMB2307NZ Dual Common Drain N-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25°C unless otherwise noted
1000
P(PK), PEAK TRANSIENT POWER (W)
SINGLE PULSE
o
RθJA = 161 C/W
o
TA = 25 C
100
10
1
0.5 -3
10
-2
-1
10
10
1
10
100
1000
t, PULSE WIDTH (sec)
Figure 13. Single Pulse Maximum Power Dissipation
2
DUTY CYCLE-DESCENDING ORDER
NORMALIZED THERMAL
IMPEDANCE, ZθJA
1
0.1
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
0.01
t2
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
o
RθJA = 161 C/W
0.001 -3
10
-2
10
-1
10
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 14. Junction-to-Ambient Transient Thermal Response Curve
©2013 Fairchild Semiconductor Corporation
FDMB2307NZ Rev.C7
5
www.fairchildsemi.com
FDMB2307NZ Dual Common Drain N-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25°C unless otherwise noted
FDMB2307NZ Dual Common Drain N-Channel PowerTrench® MOSFET
Dimensional Outline and Pad Layout
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/package/packageDetails.html?id=PN_MLDEA-C06.
©2013 Fairchild Semiconductor Corporation
FDMB2307NZ Rev.C7
6
www.fairchildsemi.com
tm
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
DISCLAIMER
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PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
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THEREIN, WHICH COVERS THESE PRODUCTS.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE
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As used here in:
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intended for surgical implant into the body or (b) support or sustain life,
and (c) whose failure to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably
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2.
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Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
No Identification Needed
Full Production
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Obsolete
Not In Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I68
©2013 Fairchild Semiconductor Corporation
FDMB2307NZ Rev.C7
7
www.fairchildsemi.com
FDMB2307NZ Dual Common Drain N-Channel PowerTrench® MOSFET
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