® RT7320 High Voltage Programmable Constant-Current LED Driver General Description Features The RT7320 is a simple and robust constant-current regulator designed to provide a cost-effective solution for driving high-voltage LEDs in LED lamp applications. The wide input voltage range (up to 400V) allows flexible LED string design to operate with 110VRMS or 220VRMS AC input z Programmable Regulated Current : 2.8mA to 78.3mA z voltage. z AC Input Voltage : 90 to 130VRMS or 200 to 240VRMS Thermal Regulation Protection Minimized Start-up Time (<10ms) Easy EMI Solution Minimized BOM Cost and Space Required Small SOP-8 (Exposed Pad) Package RoHS Compliant and Halogen Free z z z The RT7320 allows users to set the regulated current level by connecting the pins from I1 to I5 for various LED lamps. Parallel LED strings operation is possible with right regulated current setting on the RT7320. In addition, the RT7320 also provides a thermal regulation protection, instead of traditional thermal shutdown, to suppress the rise of IC junction temperature and prevent LED lamps from flicker. z z Applications z High-Voltage LED Lamps z High-Voltage Sinking Current Regulator Marking Information RT7320GSP : Product Number Ordering Information RT7320 GSPYMDNN RT7320 YMDNN : Date Code Package Type SP : SOP-8 (Exposed Pad-Option 2) Pin Configurations Lead Plating System G : Green (Halogen Free and Pb Free) (TOP VIEW) Note : Richtek products are : ` OUT RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. ` NC 2 GND 3 I1 4 Suitable for use in SnPb or Pb-free soldering processes. GND 8 I5 7 I4 6 I3 5 I2 9 SOP-8 (Exposed Pad) Simplified Application Circuit … + AC C1 RT7320 OUT I5 I4 Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS7320-00 September 2013 GND I3 I1 I2 is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT7320 Functional Pin Description Pin No. Pin Name Pin Function 1 OUT Output of the Constant-Current Regulator. A programmable regulated current, flowing into this pin, drives high-voltage LEDs connected between this pin and the rectified voltage. 2 NC No Internal Connection. GND Ground. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. 4 I1 Current Setting Input. If this pin is directly connected to GND, the regulated current increases 2.8mA (typical). 5 I2 Current Setting Input. If this pin is directly connected to GND, the regulated current increases 5.5mA (typical). 6 I3 Current Setting Input. If this pin is directly connected to GND, the regulated current increases 10mA (typical). 7 I4 Current Setting Input. If this pin is directly connected to GND, the regulated current increases 20mA (typical). 8 I5 Current Setting Input. If this pin is directly connected to GND, the regulated current increases 40mA (typical). 3, 9 (Exposed Pad) Function Block Diagram Voltage Regulator OUT + Thermal Regulation Protection VREF GND R1 = 16R R2 = 8R I1 2.8mA I1 Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 I2 5.5mA I2 M1 Error Amplifier R3 = 4R I3 10mA I3 R4 = 2R I4 20mA I4 R5 = R I5 40mA I5 is a registered trademark of Richtek Technology Corporation. DS7320-00 September 2013 RT7320 Operation Constant-Current Regulator Thermal Regulation Protection The constant-current regulator in the RT7320 consists of an output high-voltage MOSFET (M1), programmable current-sense resistors (R1 to R5), an error amplifier and a reference voltage (VREF). The error amplifier, designed with high DC gain, compares the current signal (VCS) on the current-sense resistors and the VREF to generate an amplified error signal. The error signal regulates the output MOSFET to control the sinking current on the OUT pin at the programmed current level. In addition, the operating OUT voltage (VOUT) must be higher than the minimum OUT voltage (VOUT_MIN). Otherwise, the output current might not be regulated at the programmed level (IOUT_SET). The VOUT_MIN is approximately calculated by the following equation : When a LED lamp operates in high ambient temperature conditions, it needs a thermal protection to limit the temperatures for protecting LED lamps and ensuring system reliability. The RT7320 provides a thermal regulation protection, instead of traditional thermal shutdown, to suppress the rise of temperatures. When the IC junction temperature rises above 125°C (typ.), this function starts to gradually reduce the regulated LED current, depending on the rise of the junction temperature. Meanwhile, the system power dissipation is also reduced. Finally, the temperatures in the system will be well controlled and enter their steady-state. The function can achieve both of the two targets : to protect LED lamps and to prevent them from flicker. VOUT_MIN = 3000 x IOUT_SET2 + 4 (V) Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS7320-00 September 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT7320 Absolute Maximum Ratings z z z z z z z z (Note 1) OUT to GND --------------------------------------------------------------------------------------------------------------I1, I2, I3, I4, I5 to GND --------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C SOP-8 (Exposed Pad) -------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2) SOP-8 (Exposed Pad), θJA --------------------------------------------------------------------------------------------SOP-8 (Exposed Pad), θJC -------------------------------------------------------------------------------------------Junction Temperature ---------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) -----------------------------------------------------------------------------Storage Temperature Range ------------------------------------------------------------------------------------------ESD Susceptibility (Note 3) HBM (Human Body Model) --------------------------------------------------------------------------------------------MM (Machine Model) ---------------------------------------------------------------------------------------------------- Recommended Operating Conditions z z z z −0.3V to 250V −0.3V to 5V 3.44W 29°C/W 2°C/W 150°C 260°C −65°C to 150°C 2kV 200V (Note 4) Input DC Voltage, VOUT -------------------------------------------------------------------------------------------------Input Current, IOUT -------------------------------------------------------------------------------------------------------Ambient Temperature Range ------------------------------------------------------------------------------------------Junction Temperature Range ------------------------------------------------------------------------------------------- 0V to 100V 2.8mA to 78.3mA −40°C to 85°C −40°C to 125°C Electrical Characteristics (TA = 25°C, unless otherwise specification) Parameter Symbol Test Conditions Min Typ Max Unit OUT Section OUT Regulated Current Level-1 I1 VOUT = 30V, I1 = GND 2.66 2.8 2.94 mA OUT Regulated Current Level-2 I2 VOUT = 30V, I2 = GND 5.225 5.5 5.775 mA OUT Regulated Current Level-3 I3 VOUT = 30V, I3 = GND 9.5 10 10.5 mA OUT Regulated Current Level-4 I4 VOUT = 30V, I4 = GND 19 20 21 mA 28.5 30 31.5 mA 38 40 42 mA OUT Regulated Current Level-34 I34 VOUT = 30V, I3 = I4 = GND OUT Regulated Current Level-5 VOUT = 30V, I5 = GND I5 Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is measured at the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 is a registered trademark of Richtek Technology Corporation. DS7320-00 September 2013 RT7320 Typical Application Circuit … + AC C1 RT7320 1 OUT 3, 9 (Exposed Pad) GND 4 I1 Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS7320-00 September 2013 I5 8 I4 7 I3 6 I2 5 is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT7320 Typical Operating Characteristics Thermal Regulation Protection Output Current vs. OUT Voltage 45 50 I = 10mA 40 40 35 35 30 I = 20mA 30 25 I S1 (mA) Output Current (mA) 45 I = 30mA 20 25 20 15 15 I = 40mA 10 10 5 5 0 0 0 25 50 75 100 125 150 175 OUT Voltage (V) Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 200 -40 -20 0 20 40 60 80 100 120 140 160 180 Temperature (°C) is a registered trademark of Richtek Technology Corporation. DS7320-00 September 2013 RT7320 Application Information Input Capacitor Thermal Considerations Input capacitor (C1) determines the resulted minimum DC voltage and hold-up time. Vdcvalley : minimum DC voltage for the system For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : DC voltage at minimum line voltage Vdcmin_pk is given as PD(MAX) = (TJ(MAX) − TA) / θJA Definition of the parameters : Vimin : Minimum line input (Vrms) fline : line frequency (Hz) Vdcmin_pk = 2 × Vimin (V) Calculation of charging duty Dch each half-line cycle Dch = ⎡ Vdc valley ⎤ 1 1 − × asin ⎢ ⎥ 2 π ⎣⎢ Vdcmin_pk ⎦⎥ After the selected minimum DC voltage, the minimum input capacitance is obtained by the following equation : C1_min = Pin × (1 − Dch) 2 2 (Vdcmin_pk − Vdc valley ) × fline (F) Output Current Setting The typical regulated currents are calculated by the following equation : IOUT = I1 (if I1 = GND) + I2 (if I2 = GND) + I3 (if I3 = GND) + I4 (if I4 = GND) + I5 (if I5 = GND) where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction to ambient thermal resistance. For recommended operating condition specifications, the maximum junction temperature is 125°C. The junction to ambient thermal resistance, θJA, is layout dependent. For SOP-8 (Exposed Pad) package, the thermal resistance, θJA, is 29°C/W on a standard JEDEC 51-7 four-layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by the following formula : P D(MAX) = (125°C − 25°C) / (29°C/W) = 3.44W for SOP-8 (Exposed Pad) package The maximum power dissipation depends on the operating ambient temperature for fixed T J(MAX) and thermal resistance, θJA. The derating curve in Figure 1 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. Maximum Power Dissipation (W)1 3.6 Four-Layer PCB 3.0 2.4 1.8 1.2 0.6 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 6. Derating Curve of Maximum Power Dissipation Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS7320-00 September 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT7320 Layout Considerations ` The thermal resistance θJA of SOP-8 (Exposed Pad) is determined by the package design and the PCB design. However, the package design had been designed. If possible, it's useful to increase thermal performance by the PCB design. The thermal resistance θJA can be decreased by adding a copper under the exposed pad of SOP-8 (Exposed Pad) package. The Exposed Pad can be connected the ground or an isolated plane on the PCB. ` The used current setting pins (I1 to I5) must be directly connect to the GND pin with shortest copper paths. Not-used current setting pins (I1 to I5) must be kept open. Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 is a registered trademark of Richtek Technology Corporation. DS7320-00 September 2013 RT7320 Outline Dimension H A M EXPOSED THERMAL PAD (Bottom of Package) Y J X B F C I D Dimensions In Millimeters Symbol Dimensions In Inches Min Max Min Max A 4.801 5.004 0.189 0.197 B 3.810 4.000 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.510 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.170 0.254 0.007 0.010 I 0.000 0.152 0.000 0.006 J 5.791 6.200 0.228 0.244 M 0.406 1.270 0.016 0.050 X 2.000 2.300 0.079 0.091 Y 2.000 2.300 0.079 0.091 X 2.100 2.500 0.083 0.098 Y 3.000 3.500 0.118 0.138 Option 1 Option 2 8-Lead SOP (Exposed Pad) Plastic Package Richtek Technology Corporation 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. DS7320-00 September 2013 www.richtek.com 9