SPC4533W N & P Pair Enhancement Mode

SPC4533W
N & P Pair Enhancement Mode MOSFET
DESCRIPTION
The SPC4533W is the N- and P-Channel enhancement
mode power field effect transistors are produced using
high cell density, DMOS trench technology. This high
density process is especially tailored to minimize on-state
resistance and provide superior switching performance.
These devices are particularly suited for low voltage
applications such as notebook computer power
management and other battery powered circuits where
high-side switching, low in-line power loss, and
resistance to transients are needed.
APPLICATIONS
z Power Management in Note book
z Portable Equipment
z Battery Powered System
z DC/DC Converter
z Load Switch
z LCD Display inverter
FEATURES
‹
N-Channel
30V/10A,RDS(ON)= 25mΩ@VGS= 10V
30V/8.0A,RDS(ON)= 36mΩ@VGS= 4.5V
‹
P-Channel
-30V/-6.0A,RDS(ON)= 42mΩ@VGS=- 10V
-30V/-3.0A,RDS(ON)= 78mΩ@VGS=-4.5V
‹
Super high density cell design for extremely low
RDS (ON)
‹
Exceptional on-resistance and maximum DC
current capability
‹
SOP – 8P package design
PIN CONFIGURATION(SOP – 8P)
PART MARKING
PIN DESCRIPTION
2011/06/03
Ver.1
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SPC4533W
N & P Pair Enhancement Mode MOSFET
Pin
Symbol
Description
1
S1
Source 1
2
G1
Gate 1
3
S2
Source 2
4
G2
5
D2
Gate 2
Drain 2
6
D2
Drain 2
7
D1
Drain 1
8
D1
Drain 1
ORDERING INFORMATION
Part Number
Package
SPC4533WS8RGB
SOP- 8P
Part
Marking
SPC4533W
※ SPC4533WS8RGB : 13” Tape Reel ; Pb – Free ; Halogen - Free
ABSOULTE MAXIMUM RATINGS
(TA=25℃ Unless otherwise noted)
Typical
Parameter
Symbol
Unit
N-Channel
P-Channel
Drain-Source Voltage
VDSS
30
-30
V
Gate –Source Voltage
VGSS
±20
±20
V
10
-6.0
6
-4.0
20
-12
Continuous Drain Current(TJ=150℃)
TA=25℃
TA=70℃
Pulsed Drain Current
Power Dissipation
Operating Junction Temperature
Storage Temperature Range
Thermal Resistance-Junction to Ambient
2011/06/03
Ver.1
ID
IDM
TA=25℃
A
A
PD
2.0
W
TJ
TSTG
RθJA
-55/150
-55/150
℃
℃
℃/W
80
80
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SPC4533W
N & P Pair Enhancement Mode MOSFET
N CHANNEL ELECTRICAL CHARACTERISTICS
(TA=25℃ Unless otherwise noted)
Parameter
Symbol
Conditions
Min.
Typ
Max.
Unit
Static
Drain-Source Breakdown Voltage
Gate Threshold Voltage
V(BR)DSS VGS=0V,ID=250uA
VGS(th) VDS=VGS,ID=250uA
Gate Leakage Current
IGSS
Zero Gate Voltage Drain Current
IDSS
On-State Drain Current
ID(on)
VDS≥5V,VGS =10V
Forward Transconductance
gfs
Diode Forward Voltage
VSD
IS=1A,VGS =0V
RDS(on)
1.0
V
2.5
VDS=0V,VGS=±20V
VDS=24V,VGS=0V
VDS=24V,VGS=0V
TJ=55℃
VGS= 10V,ID=10A
VGS=4.5V,ID=5.6A
VDS=15V,ID=10A
Drain-Source On-Resistance
30
±100
1
nA
uA
5
25
A
18
25
10
25
36
mΩ
S
1.2
V
Dynamic
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Turn-On Time
Turn-Off Time
2011/06/03
Ver.1
VDS=20V,VGS=4.5V
ID= 10A
td(off)
tf
nC
1.4
2.2
VDS=15VGS=0V
f=1MHz
td(on)
tr
7.2
570
pF
81
65
4.1
VDD=12V, ID=5.0A,
VGEN=10V, RG=3.3Ω
9.8
nS
15.5
6.1
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SPC4533W
N & P Pair Enhancement Mode MOSFET
P CHANNEL ELECTRICAL CHARACTERISTICS
(TA=25℃ Unless otherwise noted)
Parameter
Symbol
Conditions
Min.
Typ
Max.
Unit
Static
Drain-Source Breakdown Voltage
Gate Threshold Voltage
V(BR)DSS VGS=0V,ID=-250uA
VGS(th) VDS=VGS,ID=-250uA
Gate Leakage Current
IGSS
Zero Gate Voltage Drain Current
IDSS
On-State Drain Current
ID(on)
VDS≦-5V,VGS=-10V
Forward Transconductance
gfs
Diode Forward Voltage
VSD
IS=-6A,VGS=0V
RDS(on)
-1.0
-2.5
VDS=0V,VGS=±20V
VDS=-24V,VGS=0V
VDS=-24V,VGS=0V
TJ=55℃
VGS=- 10V,ID=-6A
VGS=- 4.5V,ID=-3A
VDS=-10.0V,ID=-6A
Drain-Source On-Resistance
-30
±100
-1
-5
-6
V
nA
uA
A
0.035
0.065
6
0.042
0.078
Ω
S
-1.2
V
Dynamic
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Turn-On Time
Turn-Off Time
2011/06/03
Ver.1
VDS=-20V, VGS=-4.5V
ID=-6A
td(off)
tf
nC
2.7
3.1
VDS=-24V,VGS=0V
f=1MHz
td(on)
tr
6.4
650
pF
270
104
9
VDD=-12V, ID=-5.0A,
VGEN=-10V
RG=3.3Ω
16
ns
21
22
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SPC4533W
N & P Pair Enhancement Mode MOSFET
N CHANNEL TYPICAL CHARACTERISTICS
Fig. 1 Typical Output Characteristics
Fig. 2 On-Resistance vs. Gate Voltage
Fig. 3 Forward Characteristics of Diode
Fig. 4 Gate Charge Characteristics
Fig. 5 Vgs vs. Junction Temperature
Fig. 6 On-Resistance vs. Junction Temperature
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SPC4533W
N & P Pair Enhancement Mode MOSFET
N CHANNEL TYPICAL CHARACTERISTICS
Fig. 7 Typical Capacitance Characteristics
Fig. 8 Maximum Safe Operation Area
Fig. 9 Effective Transient Thermal Impedence
Fig. 10 Switching Time Waveform
2011/06/03
Ver.1
Fig. 11 Unclamped Inductive Waveform
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SPC4533W
N & P Pair Enhancement Mode MOSFET
P CHAEENL TYPICAL CHARACTERISTICS
Fig. 1 Typical Output Characteristics
Fig. 2 On-Resistance vs. Gate Voltage
Fig. 3 Forward characteristics of Diodes
Fig. 4 Gate Charge Characteristics
Fig. 5 Vgs vs. Junction Temperature
Fig. 6 On-Resistance vs Junction Temp
2011/06/03
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SPC4533W
N & P Pair Enhancement Mode MOSFET
P CHANNEL TYPICAL CHARACTERISTICS
Fig. 7 Typical Capacitance Characteristics
Fig. 8 Maximum Safe Operation Area
Fig. 9 Effective Transient Thermal Impedance
Fig. 10 Switching Time Waveform
2011/06/03
Ver.1
Fig. 11 Unclamped Inductive Waveform
Page 8
SPC4533W
N & P Pair Enhancement Mode MOSFET
SOP- 8 PACKAGE OUTLINE
2011/06/03
Ver.1
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SPC4533W
N & P Pair Enhancement Mode MOSFET
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2011/06/03
Ver.1
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