CDB8952 Advanced Product Databook FEATURES Crystal LAN™ 10Base-T and 100Base-X Transceiver Evaluation Board ! IEEE 802.3 compliant 10Base-T and 100Base-X Physical Interface. ! Media Supported: — 10Base-T — 100Base-TX — 100Base-FX (with optional fiber transceiver installed) DESCRIPTION ! IEEE 802.3u MII Interface with extended register support. The CDB8952 Evaluation Board provides a platform for evaluating the CS8952 10Base-T and 100Base-X Transceiver. It is designed to plug into a transceiver test box via a standard 40-pin MII connector. System designers can use the CDB8952 to fully exercise the CS8952 without the time and expense of custom prototyping. ! LED indicators for Power, Link Status, Collision, Full/Half Duplex, Transmit Activity, Receive Activity, 100 Mb/s Speed, and 10 Mb/s Speed. ! Hardware configurable through jumper settings, or software configurable through the MII interface. ! Operates from single 5 V supply, or may be optionally configured for interface to 3.3 V MII. The CDB8952 may be optionally configured with a fiber interface module for 100Base-FX testing. 100-pin TQFP Evaluation Board MII_PWR TEST RESET POWER +5V J5 J6 L2 C27 TP4 C1 C3 C28 HDR35 TST1 HDR34 U4 HFBR-5103 Fiber Transceiver L1 CDB8952 REV. B EVALUATION BOARD MIIDRV C26 MII U6 Y1 TP2 U2 HDR1 J1 HDR42 J2 S1 HDR15 S2 LED8 ORDERING INFORMATION CS8952-CQ 0° to +70° C CDB8952 Though the CBD8952 is configured from the factory for 5 V operation with the power supplied from the test box, it may also be configured for 3.3 V MII systems. T1 CS8952 Isolation Transformer TP1 Shielded RJ45 TXCLK PHYAD0 HDR6 HDR4 HDR7 HDR5 C4 SPD10 PHYAD3 PHYAD2 PHYAD1 AN1 TXS1 TCM AN0 TXS0 HDR43 SPD100 S3 PHYAD4 LED6 C46 TX RX LNK FDX COL LED1 LED7 LED3 LED2 LED5 LED4 CIRRUS LOGIC ADVANCED PRODUCT DATABOOK DS206DB2 Copyright Cirrus Logic, Inc. 1998 (All Rights Reserved) OCT ‘01 CDB8952 Crystal LAN™ 10Base-T and 100Base-X Transceiver INTRODUCTION This manual provides information specifically on the CDB8952 Evaluation board and generally on any design incorporating the CS8952 CrystalLANTM 10Base-T and 100Base-X Transceiver. The reader should have a general knowledge of hardware design and Ethernet operation. Background Information • IEEE Std 802.3u-1995 (ISO/IEC 8802.3:1996) CSMA/CD Access Method and Physical Layer Specifications • IEEE Std 802.3u-1995 Supplement Clause 28 (Auto-Negotiation) • CS8952 CrystalLANTM 10Base-T 100Base-X Transceiver Datasheet and Evaluation Kit Contents The CDB8952 Evaluation Board Kit includes the following: Quantity 1 1 1 1 Item CDB8952 Evaluation Board CS8952 Datasheet CDB8952 Reference Manual CDB8952 Kit Packing List Table 1. Evaluation Kit Contents J5 - MII Power. When the board is connected to a system that does not supply power through the MII connector, +5 V or +3.3 V must be supplied here. J6 - CS8952 Core Power. +5 V must be supplied here from either J5 (if +5 V is supplied through the MII connector) or an external power supply. J13 - MII Connector (Table 3). Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Function MII Power MDIO MDC RXD3 RXD2 RXD1 RXD0 RX_DV RX_CLK RX_ER/RXD4 TX_ER/TXD4 TX_CLK TX_EN TXD0 TXD1 TXD2 TXD3 COL CRS MII Power Pin 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 Function MII Power Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground MII Power Table 3. MII Connector BOARD CONFIGURATION Configuration Jumpers and Switches I/O Connectors S1 - Board Reset. Depressing this push-button switch will force the CS8952 into a reset state. J1 - External TX_CLK. This connector may be used to supply TX_CLK when HDR42 and HDR43 are set appropriately. J2 - RJ45, Twisted-pair Media (Table 2). Pin 1 2 3 4 5 6 7 8 Function TD+ TDRD+ RD- Table 2. Twisted-pair Media S2 - Test 1 (not populated). This switch is used to select a factory test mode, and should not be pressed during normal operation. S3 - Physical Address Select. This 5-position switch is used to select the physical address to which the CS8952 will respond. “Open” or “Off” will set the corresponding physical address bit to ZERO, while “Closed” or “On” will set it to ONE. The CS8952 checks the positions of this switch only during power-up or reset. If any switch position is changed, a reset or power cycle is required before the new settings will take effect. CIRRUS LOGIC ADVANCED PRODUCT DATABOOK 2 DS206DB2 CDB8952 Crystal LAN™ 10Base-T and 100Base-X Transceiver NOTE: Physical address 00000 is a special broadcast address. All devices will respond to this address in addition to the one selected using S3. Setting S3 to 00000 will cause the CS8952 to set the ISOLATE bit in the Basic Mode Control Register, isolating itself from all MII signals except MDC and MDIO. It will remain isolated until this bit is cleared. Care should be taken when reading from physical address 00000 when multiple devices reside on the same MII. HDR1 - MII Drive Select. When this header is left open, the CS8952 MII drivers will conform to the IEEE 802.3u specification. When a shorting cap is installed, the CS8952 MII drivers will be reduced to 4mA. The CS8952 checks the status of HDR1 only during power-on or reset. A reset or power cycle is required before any changes in this jumper setting will take effect. HDR4, HDR5 - Auto-Negotiation Select 0 and 1. These headers are used to select the forced or advertised auto-negotiation modes as indicated in Table 4. HDR5 (AN1) pins 2-3 shorted pins 1-2 shorted open open open pins 2-3 shorted pins 2-3 shorted pins 1-2 shorted pins 1-2 shorted HDR4 (AN0) open Speed 10 Forced/ Full/Hal Auto f Duplex Forced Half open 10 Forced Full pins 2-3 shorted pins 1-2 shorted open pins 2-3 shorted pins 1-2 shorted pins 2-3 shorted pins 1-2 shorted 100 Forced Half 100 Forced Full 100/10 10 Auto Auto Full/Half Half 10 Auto Full 100 Auto Half 100 Auto Full cle is required before any changes in these jumper settings will take effect. HDR6, HDR7 - Transmit Slew Rate Select 0 and 1. These headers are used to select the rise and fall times of the 100BASE-TX transmitter output waveform as indicated in Table 5. HDR7 (TXSLEW1) pins 2-3 shorted open pins 1-2 shorted pins 2-3 shorted open pins 1-2 shorted pins 2-3 shorted open pins 1-2 shorted HDR6 (TXSLEW0) pins 2-3 shorted pins 2-3 shorted pins 2-3 shorted open open open pins 1-2 shorted pins 1-2 shorted pins 1-2 shorted Rise/Fall Time 0.5 ns 1.0 ns 1.5 ns 2.0 ns 2.5 ns 3.0 ns 3.5 ns 4.0 ns 4.5 ns Table 5. Transmit Slew Rate HDR15 - Table 6 describes the effect of shorting the listed pin pairs. HDR34 - Test 0. This header is for factory test purposes only, and should be left open for normal operation. HDR35 - Test 1. This header is for factory test purposes only, and should be left open for normal operation. HDR42 - TX_CLK Source Select. This header, in conjunction with HDR43, is used to select the TX_CLK source. When pins 1 and 2 are selected, TX_CLK is supplied from the CS8952 CLK25 output. When pins 2 and 3 are shorted, TX_CLK is supplied externally from J1. When no shorting cap is installed, HDR43 must be configured so that TX_CLK is an output from the CS8952. NOTE: No shorting cap should be installed on this header when TX_CLK is configured as an output (see HDR43). HDR43 - TX_CLK Mode Select. (Table 7) Table 4. Auto-Negotiation Select The CS8952 checks the status of HDR4 and HDR5 only during power-on or reset. A reset or power cy- The CS8952 checks the status of HDR43 only during power-on or reset. A reset or power cycle is required before any changes in this jumper setting will take effect. CIRRUS LOGIC ADVANCED PRODUCT DATABOOK DS206DB2 3 CDB8952 Crystal LAN™ 10Base-T and 100Base-X Transceiver Pins Function 1-2 Low Power Start 3-4 5-6 7-8 9-10 11-12 13-14 15-16 17-18 19-20 Description The CS8952 will enter a low power mode following reset. Only the circuitry necessary to maintain media impedance and the MII Serial Management Interface will be operational. The CS8952 checks the status of these pins only during power-on or reset. A reset or power cycle is required before any changes in this jumper setting will take effect. MII Receive Enable MII signals RXD[3:0], RX_CLK, RX_DV, and RX_ER are tristated. Power Down The CS8952 is forced into a low power mode. Only the circuitry necessary to maintain media impedance will be operational. CRS Mode Control The CRS pin will be asserted for receive activity only. The CS8952 checks the status of these pins only during power-on or reset. A reset or power cycle is required before any changes in this jumper setting will take effect. Bypass Scrambler The scrambler and descrambler are bypassed, and NRZI FX mode is enabled. The CS8952 checks the status of these pins only during power-on or reset. A reset or power cycle is required before any changes in this jumper setting will take effect. Bypass 4B/5B Coders The 4B5B encoder and decoder are bypassed and 5-bit code groups are used. RX_ER is used as the fifth receive bit, and TX_ER as the fifth transmit bit. The CS8952 checks the status of these pins only during power-on or reset. A reset or power cycle is required before any changes in this jumper setting will take effect. Bypass Symbol 4B5B coders, scramblers, and NRZI coders are all bypassed, and the CS8952 Alignment will make no attempt to identify code-group boundaries. Data on RXD[4:0] and TXD[4:0] may contain bits from two code groups. The CS8952 checks the status of these pins only during power-on or reset. A reset or power cycle is required before any changes in this jumper setting will take effect. Loopback The CS8952 will be placed in loopback mode. When operating in 100 Mb/s mode, the loopback will be inside the PMD block, and scrambled NRZI data will be routed directly to the NRZI input port on the descrambler. When in 10 Mb/s mode, the CS8952 will perform a local ENDEC loopback. MII Isolate The CS8952 will exit from reset with all MII signals tristated except MDIO and MDC. The CS8952 checks the status of these pins only during power-on or reset. A reset or power cycle is required before any changes in this jumper setting will take effect. 10BASE-T Serial Mode If the CS8952 is in 10 Mb/s mode, data is transferred serially on RXD0 and TXD0, and the full MII interface is disabled. When the CS8952 is in 100Mb/s mode, shorting these pins has no effect. The CS8952 checks the status of these pins only during power-on or reset. A reset or power cycle is required before any changes in this jumper setting will take effect. Table 6. Effect of shorting the listed pin pairs HDR43 pins 1-2 shorted open pins 2-3 shorted TX_CLK pin input input output CLK25 pin 25 MHz clock not used not used Table 7. TX_CLK Mode Select NOTE: When TX_CLK is an input, a shorting cap must installed on HDR42 to supply TX_CLK to the CS8952 (see HDR42). LED Indicators LED1 - Transmitter Active Indicator. LED2 - Receiver Active Indicator. LED3 - Link OK Indicator. LED4 - Full Duplex Indicator. LED5 - Collision Indicator. CIRRUS LOGIC ADVANCED PRODUCT DATABOOK 4 DS206DB2 CDB8952 Crystal LAN™ 10Base-T and 100Base-X Transceiver 3.3V Power Supply Option BOARD ASSEMBLY NOTES Outlined below are several different way to supply power to the CDB8952 evaluation board. Magnetics Vendors 5 V Supplied Through the MII Connector - When the CDB8952 is connected to a system which supplies +5 V through the MII connector, J5 and J6 may be connected together via a short cable. Alternatively, J6 may be connected to an external +5 V supply and J5 left unconnected. NOTE: Under no circumstances should J5 be connected to an external power supply if power is also supplied through the MII connector. 3.3V Supplied Through the MII Connector -When the CDB8952 is connected to a system which supplies +3.3 V through the MII connector, J6 must be connected to an external +5 V supply and J5 left unconnected. Vendor Bel Fuse Inc. 198 Van Vorst St. Jersey City, NJ 07302 (201) 432-0463 www.belfuse.com Halo Electronics, Inc. P.O.Box 5826 Redwood City, CA 94063 (650) 568-5800 www.haloelectronics.com Pulse Engineering, Inc. 12220 World Trade Dr. San Diego, CA 92128 (619) 674-8100 www.pulseeng.com TG22-3506ND PE-68515 Crystal Vendors No Power Supplied Through the MII Connector When the CDB8952 is connected to a system which does not supply power through the MII connector, J5 and J6 may both be connected to a single external +5 V supply. Alternatively, J5 may be connected to an external +3.3V supply and J6 to an external +5 V supply. Fiber Module Vendors 100Base-FX Interface Option Vendor Hewlett Packard Components The CDB8952 board has been designed to accommodate a Hewlett Packard HFBR-5103 Fiber Transceiver Module. Part Number S558-5999-46 Vendor Raltron Electronics Corp. 10651 NW 19th St. Miami, FL 33172 (305) 593-6033 www.raltron.com Part Number AS-25.000-15-FEXT-SMD-TR-CIR Part Number HFBR-5103 Sales Response Center (408) 654-8675 www.hp.com/HP-COMP NETCOM X-1000 TEST NOTE The Netcom X-1000 Fast Ethernet Tester has been known to assert TX_EN during power up or when an MII transceiver is hot plugged into the device. This does not comply with the IEEE 802.3u-1995 specification, paragraph 22.2.2.3 TX_EN (transmit enable). The CS8952 will fail to generate TX_CLK following its power-on reset sequence under either of these conditions. This was intended to keep the CS8952 from sending runt packets onto the network at power-on. CIRRUS LOGIC ADVANCED PRODUCT DATABOOK DS206DB2 5 CDB8952 Crystal LAN™ 10Base-T and 100Base-X Transceiver The X-1000 state machine is dependent on TX_CLK resulting in a mutually exclusive condition. It will not de-assert TX_EN without TX_CLK present. This behavior has only been seen on Netcom X-1000 test hardware. Work-around: Power on the X-1000 with the Netcom supplied transceivers. Remove one or both transceivers and replace with the CBD8952. This incompatibility will be addressed in Rev C. of the CS8952. CIRRUS LOGIC ADVANCED PRODUCT DATABOOK 6 DS206DB2 CDB8952 Crystal LAN™ 10Base-T and 100Base-X Transceiver Figure 1. SCHEMATICS CIRRUS LOGIC ADVANCED PRODUCT DATABOOK DS206DB2 7 CDB8952 Figure 2. Crystal LAN™ 10Base-T and 100Base-X Transceiver CIRRUS LOGIC ADVANCED PRODUCT DATABOOK 8 DS206DB2 CDB8952 Figure 3. Crystal LAN™ 10Base-T and 100Base-X Transceiver CIRRUS LOGIC ADVANCED PRODUCT DATABOOK DS206DB2 9 CDB8952 Figure 4. Crystal LAN™ 10Base-T and 100Base-X Transceiver CIRRUS LOGIC ADVANCED PRODUCT DATABOOK 10 DS206DB2 CDB8952 Crystal LAN™ 10Base-T and 100Base-X Transceiver CDB8952 BILL OF MATERIALS Ref. Des. C1, C3, C4, C26 C2, C5-C17, C19-C25, C37, C38, C44 C27, C28 C46 D9, D10 HDR1, HDR34, HDR35 HDR4-HDR7, HDR42, HDR43 HDR15 J1, J5, J6 J2 J13 LED1-LED8 L1, L2 R1 R2-R4 R5 R6, R32-R35, R46-R49, R71 R7 R8 R9, R13, R14, R16, R18, R22, R63, R64, R67-R69, R77-R80 R10, R15, R17, R19, R21, R23, R50-R59, R70, R72 R11 R12, R73-R76 R20 R24-R29 R30 R31, R60, R61 R36-R43 R44, R45 R62, R97, R99-R113 R65, R66 R81 R98 S1, S2 S3 TP1, TP2, TP4 T1 U2 U4 U6 Y1 Description Cap, Tant, 10uF, 20V, 20%, 6032 Cap, X7R, 0.1uF, 50V, 10%, 0805 Manufacturer Part Number Kemet T491C106M020AS Kemet C0805C104K5RAC Cap, Tant, 1uF, 20V, 20%, 3216 Cap, X7R, 0.01uF, 2KV, 20%, 2225 Diode, BAS16LT1, SOT23 Header, 2x1, 0.1” centers Header, 3x1, 0.1” centers Header, 10x2, 0.1” centers Conn, SMB Conn, RJ45, shielded Conn, MII LED, Green, SMT Ferrite Bead, 1206 Res, 63.4Ω, 1%, 1/10W, 0805 Res, 130Ω, 5%, 1/10W, 0805 Res, 1.5KΩ, 5%, 1/10W, 0805 Res, 33Ω, 5%, 1/10W, 0805 Res, 68Ω, 1%, 1/10W, 0805 Res, 4.99KΩ, 1%, 1/10W, 0805 Res, 33KΩ, 5%, 1/10W, 0805 Kemet AVX Motorola T491A105M020AS 2225GC103MA11A BAS16LT1 Amp Amp Fujitsu Panasonic TDK Bourns Bourns Bourns Bourns Bourns Bourns Bourns 413990-1 558575-1 FCN238P040-G/S LN1351C-TR CB70-1812 CR0805-FX-63R4-E CR0805-JX-131-E CR0805-JX-152-E CR0805-JX-330-E CR0805-FX-68R0-E CR0805-FX-4991-E CR0805-JX-333-E Res, 4.7KΩ, 5%, 1/10W, 0805 Bourns CR0805-JX-472-E Res, 1KΩ, 5%, 1/10W, 0805 Res, 49.9Ω, 1%, 1/10W, 0805 Res, 18KΩ, 5%, 1/10W, 0805 Res, 51Ω, 5%, 1/10W, 0805 Res, 191Ω, 1%, 1/10W, 0805 Res, 82Ω, 5%, 1/10W, 0805 Res, 680Ω, 5%, 1/10W, 0805 Res, 75Ω, 5%, 1/10W, 0805 Res, 0Ω, 1A, 0805 Res, 100Ω, 5%, 1/10W, 0805 Res, 390Ω, 5%, 1/10W, 0805 Res, 10KΩ, 5%, 1/10W, 0805 Switch, NO Push-button Switch, 5-position DIP Testpoint Transformer, Isolation IC, CS8952, TQFP100 IC, 74HC14, SO14 IC, HFBR-5103 Xtal, 25.00MHz, HC49U Bourns Bourns Bourns Bourns Bourns Bourns Bourns Bourns Bourns Bourns Bourns Bourns C&K CTS CR0805-JX-102-E CR0805-FX-49R9-E CR0805-JX-183-E CR0805-JX-510-E CR0805-FX-1910-E CR0805-JX-820-E CR0805-JX-681-E CR0805-JX-750-E CR0805-JX-000-E CR0805-JX-102-E CR0805-JX-391-E CR0805-JX-103-E PTS645TL50 CTS208-5 See page 5 Cirrus TI HP See page 5 CS8952-CQ SN74HC14D HFBR-5103 CIRRUS LOGIC ADVANCED PRODUCT DATABOOK DS206DB2 11