INTERSIL RFL1P08

RFL1P08,
RFL1P10
Semiconductor
1A, -80V and -100V, 3.65 Ohm,
P-Channel Power MOSFETs
July 1998
Features
Description
• 1A, -80V and -100V
• Linear Transfer Characteristics
These are P-Channel enhancement mode silicon gate
power field effect transistors designed for applications such
as switching regulators, switching converters, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated circuits.
• High Input Impedance
Formerly developmental type TA9400.
• rDS(ON) = 3.65Ω
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Majority Carrier Device
Symbol
Ordering Information
PART NUMBER
PACKAGE
D
BRAND
RFL1P08
TO-205AF
RFL1P08
RFL1P10
TO-205AF
RFL1P10
G
NOTE: When ordering, include the entire part number.
S
Packaging
JEDEC TO-205AF
DRAIN
(CASE)
SOURCE
GATE
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures.
Copyright
© Harris Corporation 1998
6-1
File Number
1535.2
RFL1P08, RFL1P10
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS
Drain to Gate Voltage (RGS = 20KΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . VDGR
Continuous Drain Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . .TL
RFL1P08
-80
-80
1
5
±20
8.33
0.0667
-55 to 150
RFL1P10
-100
-100
1
5
±20
8.33
0.0667
-55 to 150
UNITS
V
V
A
A
V
W
W/oC
oC
300
300
oC
AUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 125oC.
Electrical Specifications
TC = 25oC, Unless Otherwise Specified
PARAMETER
MIN
TYP
MAX
UNITS
RFL1P08
-80
-
-
V
RFL1P10
-100
Drain to Source Breakdown Voltage
Gate to Threshold Voltage
Zero Gate Voltage Drain Current
SYMBOL
BVDSS
VGS(TH)
IDSS
TEST CONDITIONS
ID = 250µA, VGS = 0
VGS = VDS, ID = 250µA
-2
-
-4
V
VDS = Rated BVDSS, VGS = 0V
-
-
-1
µA
25
µA
VDS = 0.8 x Rated BVDSS, VGS = 0,
TC = 125oC
IGSS
VGS = ±20V, VDS = 0
-
-
±100
nA
Drain to Source On-Voltage (Note 2)
VDS(ON)
ID = 1A, VGS = -10V
-
-
-3.65
V
Drain to Source On Resistance (Note 2)
rDS(ON)
ID = 1A, VGS = -10V (Figures 6, 7)
-
-
3.65
Ω
ID ≈ 1A, VDD = -50V
RG = 50Ω
VGS = -10V
RL = 47Ω
(Figures 10, 11, 12)
-
7
25
ns
-
15
45
ns
-
14
45
ns
-
11
25
ns
-
-
150
pF
-
-
80
pF
-
-
30
pF
15
oC/W
Gate to Source Leakage Current
Turn-On Delay Time
Rise Time
td(ON)
tr
Turn-Off Delay Time
Fall Time
td(OFF)
tf
Input Capacitance
CISS
Output Capacitance
COSS
Reverse-Transfer Capacitance
CRSS
Thermal Resistance Junction to Case
VGS = 0V, VDS = -25V
f = 1MHz
(Figure 9)
RθJC
-
-
Source to Drain Diode Specifications
PARAMETER
Source to Drain Diode Voltage (Note 2)
Diode Reverse Recovery Time
SYMBOL
VSD
trr
TEST CONDITIONS
MIN
TYP
MAX
UNITS
ISD = -1A
-
-
-1.4
V
ISD = -1A, dISD/dt = 50A/µs
-
135
-
ns
NOTES:
2. Pulse test: pulse width ≤ 300µs maximum, duty cycle ≤ 2%.
3. Repetitive rating: pulse width limited by mazimum junction temperature.
6-2
RFL1P08, RFL1P10
Unless Otherwise Specified
1.2
-1.2
1.0
-1.0
ID, DRAIN CURRENT (A)
POWER DISSIPATION MULTIPLIER
Typical Performance Curves
0.8
0.6
0.4
0.2
-0.8
-0.6
-0.4
-0.2
0
25
0
0
25
50
75
100
TC, CASE TEMPERATURE (oC)
125
150
4
TC = 25oC
ID, DRAIN CURRENT (A)
RFL1P10
0.10
RFL1P08
ID, DRAIN CURRENT (A)
1.0
150
PULSE DURATION = 80µs
TC = 25oC
VGS = -20V
2
VGS = -10V
VGS = -8V
VGS = -4V
VGS = -7V
1
VGS = -6V
VGS = -5V
10
100
VDS, DRAIN TO SOURCE (V)
1000
0
FIGURE 3. FORWARD BIAS OPERATING AREA
-2
-3
-4
-1
VDS, DRAIN TO SOURCE VOLTAGE (V)
-5
FIGURE 4. SATURATION CHARACTERISTICS
4
2.5
VDS = -10V
PULSE DURATION = 80µs
-40oC
2
1.5
125oC
1
0.5
0
0
-2
-4
-6
-8
VGS, GATE TO SOURCE VOLTAGE (V)
VGS = -10V
PULSE DURATION = 80µs
125oC
25oC
rDS(ON), DRAIN TO SOURCE ON
RESISTANCE (Ω)
IDS(ON), DRAIN TO SOURCE CURRENT (A)
125
3
0
1
100
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
OPERATION IN THIS AREA
LIMITED BY RDS(ON)
0.01
75
TC, CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
10.0
50
3
25oC
2
-40oC
1
0
-10
FIGURE 5. TRANSFER CHARACTERISTICS
0
1
2
3
ID, DRAIN CURRENT (A)
4
FIGURE 6. DRAIN TO SOURCE ON RESISTANCE vs DRAIN
CURRENT
6-3
5
RFL1P08, RFL1P10
Typical Performance Curves
Unless Otherwise Specified (Continued)
1.4
2
1.3
VGS = -10V
NORMALIZED GATE
1.5
THRESHOLD VOLTAGE (V)
1
0.5
ID = 250µA
VDS = -5V
1.2
1.1
1.0
0.9
0.8
0.7
0
-50
0
50
100
0.6
-50
150
0
50
100
TJ, JUNCTION TEMPERATURE (oC)
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 7. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
120
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS ≈ CDS + CGD
140
C, CAPACITANCE (pF)
FIGURE 8. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
100
160
CISS
100
80
60
COSS
40
CRSS
20
0
150
10
VDD = BVDSS
VDD = BVDSS
GATE
SOURCE
VOLTAGE
RL = 50
IG(REF) = 0.095mA
VGS = -10V
75
50
8
6
0.75BVDSS
0.50BVDSS
0.25BVDSS
25
4
2
DRAIN SOURCE
VOLTAGE
0
0
-10
-20
-30
-40
VDS, DRAIN TO SOURCE VOLTAGE (V)
-50
20
IG(REF)
IG(ACT)
t, TIME (µs)
80
0
IG(REF)
IG(ACT)
NOTE: Refer to Harris Application Notes AN7254 and AN7260.
FIGURE 9. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
FIGURE 10. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT
Test Circuits and Waveforms
tON
tOFF
td(OFF)
td(ON)
tr
0
RL
DUT
VGS
RG
+
10%
10%
VDS
VDD
tf
VGS
0
90%
90%
10%
50%
50%
PULSE WIDTH
90%
FIGURE 11. SWITCHING TIME TEST CIRCUIT
FIGURE 12. RESISTIVE SWITCHING WAVEFORMS
6-4
VGS, GATE TO SOURCE VOLTAGE (V)
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE (mΩ)
ID = 1A