751BU

MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC8−NB EP
CASE 751BU
ISSUE E
8
1
SCALE 1:1
DATE 01 APR 2015
D
A
8
NOTE 5
F
2X
0.10 C D
5
NOTE 6
A1
E
E1
NOTE 4
L2
L
2X 4 TIPS
0.20 C
4
1
NOTE 5
8X
B
TOP VIEW
b
0.25
M
C A-B D
2X
D
DETAIL A
8X
0.10 C
A
SEATING
PLANE
0.10 C A-B
NOTE 4
0.10 C
C
DETAIL A
h
B
B
e
C
SIDE VIEW
END VIEW
SEATING
PLANE
NOTE 7
F
ÇÇÇ
ÇÇÇ
ÉÉÉ
ÇÇÇ
ÉÉÉ
b
b1
G
c c1
SECTION B−B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION SHALL
BE 0.10mm IN EXCESS OF MAXIMUM MATERIAL
CONDITION.
4. DIMENSION D DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH,
PROTRUSIONS, OR GATE BURRS SHALL NOT
EXCEED 0.15mm PER SIDE. DIMENSION E DOES
NOT INCLUDE INTERLEAD FLASH OR
PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25mm PER
SIDE. DIMENSIONS D AND E ARE DETERMINED AT
DATUM F.
5. DIMENSIONS A AND B ARE TO BE DETERMINED
AT DATUM F.
6. A1 IS DEFINED AS THE VERTICAL DISTANCE
FROM THE SEATING PLANE TO THE LOWEST
POINT ON THE PACKAGE BODY.
7. TAB CONTOUR MAY VARY MINIMALLY TO INCLUDE
TOOLING FEATURES.
DIM
A
A1
b
b1
c
c1
D
E
E1
e
F
G
h
L
L2
MILLIMETERS
MIN
MAX
1.35
1.75
0.00
0.10
0.31
0.51
0.28
0.48
0.17
0.25
0.17
0.23
4.90 BSC
6.00 BSC
3.90 BSC
1.27 BSC
1.55
2.39
1.55
2.39
0.25
0.50
0.40
1.27
0.25 BSC
GENERIC
MARKING DIAGRAM*
BOTTOM VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
8
XXXXXXXXX
ALYWX
G
2.60
2.60
1
8X 1.52
7.00
XXXXX
A
L
Y
W
G
1
8X
1.27
PITCH
0.76
DIMENSION: MILLIMETERS
*This information is generic. Please refer
to device data sheet for actual part
marking. Pb−Free indicator, “G”, may
or not be present.
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
STATUS:
98AON66222E
ON SEMICONDUCTOR STANDARD
NEW STANDARD:
© Semiconductor Components Industries, LLC, 2002
October, DESCRIPTION:
2002 − Rev. 0
SOIC8−NB EP
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
http://onsemi.com
1
Electronic versions are uncontrolled except when
accessed directly from the Document Repository. Printed
versions are uncontrolled except when stamped
“CONTROLLED COPY” in red.
Case Outline Number:
PAGE 1 OFXXX
2
DOCUMENT NUMBER:
98AON66222E
PAGE 2 OF 2
ISSUE
REVISION
DATE
O
RELEASED FOR PRODUCTION. REQ. BY I. CAMBALIZA.
03 JAN 2012
A
CORRECTED EXPOSED DIMENSIONS. REQ. BY I. CAMBALIZA.
12 APR 2012
B
CORRECTED SIDE VIEW LABEL A TO REFLECT FROM TOP OF PACKAGE TO
SEATING PLANE. REQ. BY I. CAMBALIZA.
30 AUG 2012
C
CHANGED MAX VALUE FOR DIMENSIONS F AND G FROM 3.07 TO 2.39. REQ.
BY B. LOFTS.
17 JUL 2013
D
CHANGED EXPOSED PAD IN SOLDER FOOTPRINT TO 2.6X2.6. REQ. BY B.
LOFTS.
23 JUL 2013
E
CHANGED DIMENSION A1 MIN FROM −−− TO 0.00. REQ. BY B. LOFTS.
01 APR 2015
ON Semiconductor and
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© Semiconductor Components Industries, LLC, 2015
April, 2015 − Rev. E
Case Outline Number:
751BU
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