bd9e151nux e

Datasheet
6.0V~28V, 1.2A 1ch
1ch Step-Down Switching Regulator
BD9E151NUX
Key Specifications
■ Input Voltage
■ Ref. Precision (Ta=25℃)
■ Max Output Current
■ Operating Temperature
General Description
The BD9E151NUX is a 28V, 1.2A diode-rectification
buck converter that integrated internal high-side 30V
Power MOSFET. To increase efficiency at light loads, a
6~28 [V]
±1.0[%]
1.2 [A] (Max.)
-40℃~85℃
pulse skipping is automatically activated. Furthermore,
the 0uA shutdown supply current allows the device to be
used in battery powered application. Current mode
Packages
VSON008X2030
control with internal slope compensation simplifies the
2.00mm x3.00mm x 0.60mm
external component count while allowing the use of
ceramic output capacitors.
Features
■
High and Wide Input Range (VIN=6V~28V)
■
30V/80mΩ Internal Power MOSFET
■
600kHz Fixed Operating Frequency
■
Feedback Pin Voltage 1.0V±1.0%
■
Internal Over Current Protection(OCP), Under
VSON008X2030
Applications
Voltage Locked Out(UVLO), Over Voltage
■
Surveillance Camera Applications
■
OA Applications
■
12V, 24V Distributed Power Systems
Protection(OVP), Thermal Shut down(TSD)
■
0μA Low Shutdown Supply Current
■
VSON008X2030 package
Typical Application Circuits
CBST: 0.1uF
1
CVCC: 10uF/35V
VIN
LX
LO: 15uH
8
VOUT
CO: 47uF/16V
D1
2
3
ON/OFF
control
BST
VIN
GND
EN
VC
SS
FB
7
6
C1: 10000pF
4
R4:
Ω
5
R :
CSS: 0.047uF
Ω
R5:
Ω
Figure 1. Typical Application Circuit
○Structure:Silicon Monolithic Integrated Circuit
○Product structure:Silicon monolithic integrated circuit
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○This product is not designed for normal operation within a radioactive
○This product has not designed protection against radioactive rays
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BD9E151NUX
Pin Configuration
BST
1
VIN
2
EN
3
SS
4
Back side
PAD
8
Lx
7
GND
6
VC
5
FB
Figure 2. Pin Configuration (TOP VIEW)
Pin Description
Pin No.
Pin Name
Description
1
BST
The pin is power supply for floating Power NMOS driver. Connect bypass capacitor
between the pin and LX pin for bootstrap operation.
2
VIN
Input supply. Place bypass capacitor as close as possible to this pin.
3
EN
Enable input pin. Apply more than 2.4V to start-up the DCDC. This pin is pulled down by
700kΩ, apply less than 0.8V or open to shutdown the DCDC.
4
SS
Soft start pin. An external capacitor connected to this pin sets output rise time.
5
FB
Inverting node of the gm amplifier.
6
VC
Error amplifier output, and input to the PWM comparator. Connect phase compensation
components to this pin.
7
GND
6
LX
-
Back side
PAD
Ground.
Place schottky barrier diode as close as possible and inductor to this pin.
PAD for radiation of heat. Connect to GND is recommended.
Block Diagram
ON/OFF
EN
VIN
TSD
UVLO
Reference
VREF
REG
Current Sense
AMP
shutdown
FB
+
+
1.0V
BST
Current
Comparator
Error
AMP
80mΩ
Σ
SS
+
R Q
S LX
VOUT
Soft
Start
GND
Oscillator
VC
Figure 3. Block Diagram
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Description of Blocks
1.
Reference
This block generates reference voltage and current. It start operation by applying EN=H.
It provides reference voltage and current to error amplifier, oscillator, and etc.
2.
REG
This is a gate drive voltage generator and 5.5V regulator for internal circuit power supply.
3.
OSC
This is a precise wave oscillation circuit with operation frequency fixed to 600 kHz.
4.
Soft Start
This block does Soft Start to the output voltage of DC/DC converter, and prevents in-rush current during Start-up.
Soft Start Time set by the capacitor connected to SS pin and SS charge current.
5.
ERROR AMP
This is an error amplifier that detects output signal, and outputs PWM control signal. Internal reference voltage is set
to 1.0V. Connect phase compensation components between this pin and ground (ref. p.12).
6.
OVP
The OVP circuit includes an overvoltage comparator to compare the FB pin voltage and internal thresholds. When the
FB pin voltage goes above 110%×FB, the high-side MOSFET will be forced off. When the FB pin voltage falls
below 105%, the high-side MOSFET will be enabled again.
7.
ICOMP
The BD9E151NUX implements current mode control that uses the VC pin voltage to turn off the high-side MOSFET on a
cycle by cycle basis. Every cycle the switch current and the COMP pin voltage are compared; when the peak inductor
current intersects the VC pin voltage, the high-side switch is turned off. During overcurrent conditions that pull the output
voltage low, the error amplifier responds by driving the COMP pin high, causing the switch current to increase.
8.
OCP
This is a circuit to protect the high-side FET from overcurrent. Every cycle the switch current and the reference voltage
of overcurrent protection are compared; when the peak inductor current intersects the reference voltage, the high-side
switch is turned off. Once overcurrent is detected, the device will stop and VC pin voltage will be reset and SS pin
voltage will be discharged by 2uA (hiccup operation). Then SS pin voltage reaches to less than 0.1V, IC will restart.
9.
High-side MOSFET
This is a 30V/80mΩ high-side MOSFET that converts inductor current of DC/DC converter.
Because the current limiting of this FET is 1.6A included ripple current, please use at within1.6A.
10. UVLO
This is a low voltage error prevention circuit.
This prevents internal circuit error during increase of power supply voltage and during decline of power supply voltage.
It monitors VIN pin voltage and internal REG voltage, and when VIN voltage becomes 5.2V and below, it turns OFF all
output FET and turns OFF DC/DC comparator output and Soft Start circuit resets.
Now this Threshold has hysteresis of 200mV.
11. TSD
This is a heat protect circuit.
When it detects an abnormal temperature exceeding maximum junction temperature (Tj=150℃), it turns OFF all Output
FET, and turns OFF DC/DC converter output. When temperature falls, it automatically returns.
12. EN
When a Voltage of 2.4V or more is applied, it turns ON, at Open or 0V application, it turns OFF.
About 700kΩ Pull-down Resistance is contained within the Pin.
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BD9E151NUX
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
VIN to GND
VIN
30
V
BST to GND
VBST
37
V
BST to LX
⊿VBST
7
V
EN to GND
VEN
30
V
LX to GND
VLX
30
V
FB to GND
VFB
7
V
VC to GND
VSS
7
V
SS to GND
VSS
7
V
High-side FET Drain Current
IDH
1.6
A
Power Dissipation
Pd
2(*1)
W
Operating Temperature
Topr
-40~+85
℃
Storage Temperature
Tstg
-55~+125
℃
Junction Temperature
Tjmax
150
℃
(*1)During mounting of 70×70×1.6t mm 4layer board.Reduce by 20mW for every 1℃ increase. (Above 25℃)
Operating Ratings
Item
Ratings
Symbol
Min
Typ
Max
VIN
6
-
Output Voltage
VOUT
1.0(*2)
-
Output Current
IOUT
-
-
28
VINx0.7
or
VIN-5(*3)
1.2
Input Voltage
Unit
V
V
A
(*2)Restricted by minimum on pulse typ. 100nsec
(*3)Restricted by BSTUVLO or Max Duty Cycle (ref. p.14). Please set value of the low one for the maximum.
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BD9E151NUX
Electrical Characteristics (Unless otherwise specified Ta=25℃, VIN=12V, VOUT=5V)
Parameter
Symbol
Limits
Min.
Typ.
Max
Unit
Conditions
Circuit current
Stand-by current of VIN
Ist
-
0
10
uA VEN=0
Circuit current of VIN
Icc
-
0.8
1.6
mA FB=1.5V
Vuv
5.0
5.4
5.8
V
Vuvhy
-
200
400
mV
fsw
540
600
660
kHz
Dmax
85
91
-
%
FB threshold voltage
VFB
0.990
1.000
1.010
V
Input bias current
IFB
-1.0
0
1.0
Error amplifier DC gain
AVEA
-
600
6000
V/V
Error amplifier transconductance
GEA
-
250
500
uA/V IVC=±10uA,VC=1.0V
GCS
-
10
20
A/V
RonH
-
80
160
mΩ
Iocp
1.6
2.2
-
A
ON
VEN
2.4
-
VIN
V
OFF
VENOFF
-0.3
-
0.8
V
REN
6.0
7.0
15.0
uA VEN=5V
Iss
1
2
4
Under voltage Lock out (UVLO)
Reset threshold voltage
Hysteresis width
VIN rising
Oscillator
Oscillating frequency
Max duty cycle
Error amplifier
uA VFB=0V
Current sense amplifier
VC to switch current transconductance
Output
High-side MOSFET ON resistance
Over current detect current
CTL
EN pin control voltage
EN pin input current
Ta=-40~85℃
VIN=6~28V
SOFT START
Charge current
uA
◎Not designed to withstand radiation.
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Typical Performance Characteristics (Unless otherwise specified, Ta=25℃, VCC=12V, Vo=5V,)
2.0
2.0
T=105°C
T=150°C
1.6
1.6
1.2
1.2
Icc [mA]
Icc [mA]
T=-60°C
T=25°C
0.8
0.8
Temp=-40℃
0.4
VIN=7V
VIN=12V
0.4
Temp=25℃
VIN=24V
Temp=85℃
0.0
0.0
7
10
13
16
19
22
25
28
-40
-15
10
VIN [V]
60
85
Figure 5. Operating Current - Temperature
6.0
630
5.6
610
5.2
590
fosc [kHz]
VCC UVLO Threshold [V]
Figure 4. Operating Current - Input Voltage
detect voltage
reset voltage
4.8
35
Ta [°C]
550
+Vth
-Vth
4.4
570
530
4.0
-40
-15
10
35
60
-40
85
-15
10
35
60
85
Ta [°C]
Ta [°C]
Figure 6. UVLO Threshold - Temperature
Figure 7. Switching Frequency - Temperature
1.010
100.0
1.008
1.006
96.0
FB threshold [V]
1.004
Duty [%]
92.0
88.0
84.0
1.002
1.000
0.998
0.996
0.994
0.992
T=-60°C
T=25°C
T=105°C
T=150°C
16
22
0.990
80.0
-40
-15
10
35
60
7
85
13
19
25
28
Figure 9. FB Pin Reference Voltage – Input Voltage
Figure 8. Max Duty - Temperature
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VIN [V]
Ta [°C]
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BD9E151NUX
1.010
60.0
1.008
40.0
1.006
20.0
1.002
Temp=-40℃
1.000
IVC [uA]
FB threshold [V]
1.004
0.998
0.996
0.994
0.0
Temp=25℃
Temp=85℃
-20.0
T=-60°C
T=25°C
T=105°C
T=150°C
-40.0
0.992
0.990
-60.0
-40
-15
10
35
60
0
85
0.4
0.8
1.2
125.0
3.2
110.0
2.4
95.0
RON [mΩ]
ISS [uA]
4.0
1.6
80.0
0.8
65.0
0.0
50.0
-15
10
35
60
-40
85
-15
10
35
60
85
Ta [°C]
Ta [°C]
Figure 12. SS Pin Charge Current - Temperature
Figure 13. High-side FET Ron - Temperature
4.0
1.5
3.2
1.4
EN Threshold [V]
OCP threshold[A]
2
Figure 11. VC Pin Current – FB Pin Voltage
Figure 10. FB Pin Reference Voltage - Temperature
-40
1.6
VFB [V]
Ta [°C]
2.4
1.6
0.8
0.0
1.3
1.2
VCC=6V
VCC=12V
VCC=18V
VCC-24V
VCC=30V
VCC=12V
VCC=18V
VCC=24V
1.1
1.0
-40
-15
10
35
60
85
-40
Ta [°C]
10
35
60
85
Ta [°C]
Figure 14. OCP Detect Current - Temperature
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Figure 15. EN Threshold Voltage - Temperature
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BD9E151NUX
Reference Characteristics of typical Application Circuits (VIN=12V, VOUT=5V IOUT=1A)
CBST:0.1uF
47uF/16V
GRM32EB31C476KE15L (MURATA)
NRS6045T 15uH
(TAIYO YUDEN)
10uF/35V
GRM31CB3YA106KA12L(MURATA)
VIN
VOUT
LX
BST
Co1
Cvcc2
GND
EN
(
VIN
D1
RSX101VA-30(Rohm)
Ro:1kΩ
)
VC
C1:10000pF
SS
SS
EN
FB
R4:12KΩ
R3:2.7kΩ
Css:0.047uF
Figure 16. Typical ApplicationCircuit (VOU=5V)
(Back side PAD is recommended
connecting to GND)
100
100
90
90
80
80
70
70
VIN=8V
60
Efficiency [%]
Efficiency [%]
R5:3KΩ
VIN=12V
50
VIN=25V
40
30
Iout=100mA
50
40
30
20
20
10
10
0
0
1
10
100
1000
10000
Iout=1A
60
Iout=10mA
0
5
10
15
20
25
Output Current Io[mA]
Input Voltage[V]
Figure 17. Efficiency - Output Current
Figure 18. Efficiency - Input Voltage
30
Iout [1A/div]
EN [10V/div]
Overshoot=134mV
Lx [10V/div]
Vout [0.1V/div]
Vout [2V/div]
Iout [0.2A/div]
Undershoot=152mV
10ms/div
10ms/div
Figure 20. Load Response
Figure 19. Start-up Characteristics
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BD9E151NUX
Vripple=15.0mV
Vripple=25.0mV
Vout [20mV/div]
Vout [20mV/div]
Figure 22. LX Switching/ Vout Ripple
Io=1A
Figure 21. LX Switching/ Vout Ripple
Io = 100mA
Phase
Gain
Figure 23. Frequency Response Io=1A
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BD9E151NUX
Application parts list 1
(VIN=12V, VOUT=5V IOUT=1A)
Symbol
[Capacitor]
CVCC
CSS
C1
CBST
CO
[Resistor]
R3
Value
Part
name
Company
10uF/35V
0.047uF/25V
10000pF/50V
0.1uF/10V
47uF/16V
CRM31CB3YA106KA12L
GRM155B31E473KA87
GRM155B31H103KA88
GRM155B31C104KA87
GRM32EB31C476KE15L
MURATA
MURATA
MURATA
MURATA
MURATA
2.7kΩ
MCR03 series
ROHM
R4
12kΩ
MCR03 series
ROHM
R5
[Diode]
D0
[Inductor]
L0
3kΩ
MCR03 series
ROHM
-
RSX101VA-30
ROHM
15uH
NRS6045T150
TAIYO YUDEN
comments
Application parts list 2 (When load current are light and make a point of total area)
(VIN=12V, VOUT=5V, IOUT=300mA)
Symbol
[Capacitor]
CVCC
CSS
C1
CBST
CO
[Resistor]
R3
Value
10uF/25V
0.047uF/25V
22000pF/50V
0.1uF/10V
22uF/10V
GRM188R61E106MA73
GRM155B31E473KA87
GRM155B31H223KA12
GRM155B31C104KA87
GRM21BB31A226ME51
MURATA
MURATA
MURATA
MURATA
MURATA
2.2kΩ
MCR006 series
ROHM
R4
12kΩ
MCR006 series
ROHM
R5
[Diode]
D0
[Inductor]
L0
3kΩ
MCR006 series
ROHM
-
RSX101VA-30
ROHM
15uH
DEM3518C series
TOKO
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comments
TSZ02210-0Q3Q0AZ00160-1-2
2015.02.04 Rev.002
BD9E151NUX
Application Components Selection Method
(1) Inductors
Something of the shield type that fulfills the current rating (Current value
Ipecac below), with low DCR is recommended. Value of Inductance influences
Inductor Ripple Current and becomes the cause of Output Ripple.
In the same way as the formula below, this Ripple Current can be made small
for as big as the L value of Coil or as high as the Switching Frequency.
Ipeak = IOUT 
⊿IL
・・・ (1)
2
1
VIN-VOUT VOUT


⊿IL =
f
VIN
L
Δ IL
Figure 24. Inductor Current
・・・ (2)
(⊿IL: Output Ripple Current, VIN: Input Voltage, VOUT: Output Voltage, f: Switching Frequency)
For design value of Inductor Ripple Current, please carry out design tentatively with about 20%~50% of Maximum Input
Current
(2) Output Capacitor
In order for capacitor to be used in output to reduce output ripple, Low ceramic capacitor of ESR is recommended.
Also, for capacitor rating, on top of putting into consideration DC Bias characteristics, please use something whose
maximum rating has sufficient margin with respect to the Output Voltage. Output ripple voltage is looked for using the
following formula. The actual value of the output capacitor is not critical, but some practical limits do exist. Consider the
relationship between the crossover frequency of the design and LC corner frequency of the output filter. In general, it is
desirable to keep the crossover frequency at less than 1/5 of the switching frequency. With high switching frequencies
such as the 600kHz frequency of this design, internal circuit limitations of the BD9E151NUX limit the practical maximum
crossover frequency to about 30kHz. In general, the crossover frequency should be higher than the corner frequency
determined by the load impedance and the output capacitor. This limits the minimum capacitor value for the output filter
to:
COUT_min =
1
2π ×R ×fc_max
・・・ (3)
Where: Rl is the output load resistance and fc_max is the maximum crossover frequency. The output ripple voltage can
be estimated by:
Vpp = ⊿IL 
1
2π ×f×CO
 ⊿IL  RESR
・・・ (4)
Please design in a way that it is held within Capacity Ripple Voltage.
In the BD9E151NUX, it is recommended a ceramic capacitor more than 10μF.
(3) Output Voltage Setting
ERROR AMP internal Standard Voltage is 1.0V. Output Voltage is determined as seen in (5) formula
VOUT
ERROR AMP
R1
FB
VOUT =
R2
R1+R2
R2
・・・ (5)
VREF
1.0 V
Figure 25. Output Voltage Setting
(4) Bootstrap Capacitor
Please connect from 0.047µF to 0.47µF (Laminate Ceramic Capacitor) between BST Pin and LX Pin.
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(5) Soft Start Function
2uA
ERROR AMP
SS
Css
It is highly recommended to program the soft start time
externally to prevent high inrush current because no soft start
time is implemented internally. A capacitor (Css) connected
between the SS pin and ground implements a soft start time.
The BD9E151NUX has an internal pull-up current source of 2uA
that charges the external soft start capacitor. The equation for
the soft start time (10% to 90 %) is shown in below Equation.
The Iss current is 2uA.
Figure 26. Soft Start Time Setting
TSS =
CSS×0.8
ISS
・・・ (6)
(6)
Catch Diode
The BD9E151NUX is designed to operate using an external catch diode between LX and GND. The selected diode
must meet the absolute maximum ratings for the application: Reverse voltage must be higher than the maximum voltage
at the LX pin, which is VINMAX + 0.5 V. Peak current must be greater than IOUTMAX+⊿IL plus on half the peak to
peak inductor current. Forward voltage drop should be small for higher efficiencies. It is important to note that the catch
diode conduction time is typically longer than the high-side FET on time, so attention paid to diode parameters can
make a marked improvement in overall efficiency. Additionally, check that the device chosen is capable of dissipating
the power losses.
(7)
Input Capacitor
The BD9E151NUX requires an input capacitor and depending on the application. Use low ESR capacitors for the best
performance. Ceramic capacitors are preferred, but low-ESR electrolytic capacitors may also suffice. The typical
recommended value for the decoupling capacitor is 10uF. Please place this capacitor as possible as close to the VIN pin.
When using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent
excessive voltage ripple at input. The input voltage ripple caused by capacitance can be estimated by:
VCC 
IOUT
VOUT  VOUT 

 1f  CVCC VCC  VCC 
・・・ (7)
Since the input capacitor (CVIN) absorbs the input switching current it requires an adequate ripple current rating. The
RMS current in the input capacitor can be estimated by:
ICVCC  IOUT 
VOUT
VOUT
)
 (1
VCC
VCC
・・・ (8)
The worst case condition occurs at VIN= 2VOUT, where
ICVCC_max 
(8)
IOUT
2
・・・ (9)
About Adjustment of DC/DC Comparator Frequency Characteristics
Role of Phase compensation element C1, C2, R3 (See P.8 Example of Reference Application Circuit)
Stability and Responsiveness of Loop are controlled through VC Pin which is the output of Error Amp.
The combination of zero and pole that determines Stability and Responsiveness is adjusted by the combination of
resistor and capacitor that are connected in series to the VC Pin.
DC Gain of Voltage Return Loop can be calculated for using the following formula.
Adc = Rl  Gcs  A EA 
V FB
Vout
・・・ (10)
Here, VFB is Feedback Voltage (1.0V).AEA is Voltage Gain of Error amplifier (typ : 60 dB),
Gcs is the Trans-conductance of Current Detect (typ : 10A/V), and Rl is the Output Load Resistance value.
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BD9E151NUX
There are 2 important poles in the Control Loop of this DC/DC.
The first occurs with through the output resistance of Phase compensation Capacitor (C1) and Error amplifier.
The other one occurs with through the Output Capacitor and Load Resistor.
These poles appear in the frequency written below.
fp1 =
GEA
2π C1  AEA
fp2 =
1
2π COUT  Rl
・・・ (11)
・・・ (12)
Here, GEA is the trans-conductance of Error amplifier (typ : 250uA/V).
Here, in this Control Loop, one zero becomes important.
With the zero which occurs because of Phase compensation Capacitor C1 and Phase compensation Resistor R3, the
Frequency below appears.
fz1 =
1
2π C1  R3
・・・ (13)
Also, if Output Capacitor is big, and that ESR (RESR) is big, in this Control Loop, there are cases when it has an
important, separate zero (ESR zero).
This ESR zero occurs due to ESR of Output Capacitor and Capacitance, and exists in the Frequency below.
fzESR =
1
2π COUT  RESR
・・・ (14)
(ESR zero)
In this case, the 3rd pole determined with the 2nd Phase compensation Capacitor (C2) and Phase Correction Resistor
(R3) is used in order to correct the ESR zero results in Loop Gain.
This pole exists in the frequency shown below.
fp3 =
1
2π C2  R3
(pole that corrects ESR zero)
・・・ (15)
The target of Phase compensation design is to create a communication function in order to acquire necessary band
and Phase margin.
Cross-over Frequency (band) at which Loop gain of Return Loop becomes 0 is important.
When Cross-over Frequency becomes low, Power supply Fluctuation Response, Load Response, etc worsens.
On the other hand, when Cross-over Frequency is too high, instability of the Loop can occur.
Tentatively, Cross-over Frequency is targeted to be made 1/20 or below of Switching Frequency. Selection method of
Phase Compensation constant is shown below.
1.
Phase Compensation Resistor (R3) is selected in order to set to the desired Cross-over Frequency.
Calculation of RC is done using the formula below.
R3 =
2π COUT  fc Vout

GEA  GCS
VFB
・・・ (16)
Here, fc is the desired Cross-over Frequency. It is made about 1/20 and below of the Normal Switching Frequency (fs).
2.
Phase compensation Capacitor (C1) is selected in order to achieve the desired phase margin.
In an application that has a representative Inductance value (about several 10uH~22uH), by matching zero of
compensation to 1/4 and below of the Cross-over Frequency, sufficient Phase margin can be acquired.C1 can be
calculated using the following formula.
C1>
4
2π R3  fc
・・・ (17)
RC is Phase compensation Resistor.
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BD9E151NUX
3.
Examination whether the second Phase compensation Capacitor C2 is necessary or not is done.
If the ESR zero of Output Capacitor exists in a place that is smaller than half of the Switching Frequency, a second
Phase compensation Capacitor is necessary. In other words, it is the case wherein the formula below happens.
1
fs
<
2π COUT  RESR 2
・・・ (18)
In this case, add the second Phase compensation Capacitor C2, and match the frequency of the third pole to the
Frequency fp3 of ESR zero.
C2 is looked for using the following formula.
C2 
COUT  RESR
R3
・・・ (19)
Output Voltage Restriction
BD9E151NUX have a function of BSTUVLO to prevent malfunction at low voltage between BST and LX. Therefore
OUTPUT voltage is restricted by BSTUVLO and Max Duty Cycle (min 85 %).
Restriction by BST-UVLO
When the voltage between BST and Lx is lower than 2.5V, High-Side FET will be made turned off and the charge will
provide from VIN to BST directly to reset BSTUVLO (path ). The below formula is needed to be satisfied to reset
BSTUVLO.
VIN  VOUT  VF  BSTUVLO reset
・・・ (20)
Here, BSTUVLO reset: BSTUVLO reset voltage, VF: the diode forward bias voltage between VIN and BST
Considering the fluctuation of BSTUVLO reset voltage and VF, maximum voltage is more than 5V.
Therefore maximum output voltage is defined as VIN - 5V.
5.5V
BST
Restriction by Max Duty Cycle
Maximum output voltage is restricted by Max Duty Cycle (min85%).
In this time it is needed to consider the effect of NchFET Ron
, OUTPUT current and forward voltage of SBD. OUTPUT voltage
can be calculated using the following formula.
VOUT_max = (VIN - Ron×IO
)×
5
F×
Considering the effect of catch diode type and the loss by inductor,
Vomax = (VIN-Ron×Iomax)×0.85 (casually formula)
Considering the negative voltage in the case of pulling diode current,
maximum voltage is more than VIN×0.7.
Therefore maximum output voltage is defined as VIN×0.7.
BSTUVLO
VIN
5・・・
(21)
LX
Figure 27. BST charge pass
Considering above restriction, adopt the lower output voltage as maximum voltage.
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BD9E151NUX
Cautions on PCB board layout
TOP side
Ground Area
OUTPUT
Capacitor
VOUT
Catch
Diode
LX
VCC
SoftStart
Capacitor
Thermal VIA
Signal VIA
Figure 28. Reference PCB layout
Layout is a critical portion of good power supply design. There are several signals paths that conduct fast changing currents
or voltages that can interact with stray inductance or parasitic capacitance to generate noise or degrade the power supplies
performance. To help eliminate these problems, the VIN pin should be bypassed to ground with a low ESR ceramic bypass
capacitor with B dielectric. Care should be taken to minimize the loop area formed by the bypass capacitor connections, the
VIN pin, and the anode of the catch diode. See Fig.28 for a PCB layout example.
In the BD9E151NUX, since the LX connection is the switching node, the catch diode and output inductor should be located
close to the LX pins, and the area of the PCB conductor minimized to prevent excessive capacitive coupling. And GND area
should not be connected directly power GND, connected avoiding the high current switch paths. The additional external
components can be placed approximately as shown.
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BD9E151NUX
Power Dissipation
It is shown below reducing characteristics of power dissipation to mount 70mm×70mm×1.6mm t PCB
Junction temperature must be designed not to exceed 150℃.
POWER DISSIPATION [W]
2.5
VSON008X2030 Package
t
On 70mm×70mm×1.6mm glass epoxy PCB
1-layer board (Backside copper foil area 15mm×15mm)
4-layer board (Backside copper foil area 70mm×70mm)
2
1.5
1
0.5
0.412
0
0
25
50
75
100
125
Ambient Temperature [℃]
t
Figure 29. Power Dissipation ( 70mm×70mm×1.6mm 1layer PCB)
Power Dissipation Estimate
The following formulas show how to estimate the device power dissipation under continuous mode operations. They should not
be used if the device is working in the discontinuous conduction mode.
The device power dissipation includes:
1) Conduction loss: Pcon = IOUT2 × RonH × VOUT/VIN
2) Switching loss: Psw = 0.25 × 10–9 × VIN × IOUT × fsw
3) Gate charge loss: Pgc = 22.8 × 10–9 × fsw
4) Quiescent current loss: Pq = 0.7 × 10–3 × VIN
Where:
IOUT is the output current (A), RonH is the on-resistance of the high-side MOSFET (Ω), VOUT is the output voltage (V).
VIN is the input voltage (V), fsw is the switching frequency (Hz).
Therefore
Power dissipation of IC is the sum of above dissipation.
Pd = Pcon + Psw + Pgc + Pq
For given Tj, Tj =Ta + θja × Pd
Where:
Pd is the total device power dissipation (W), Ta is the ambient temperature (℃)
Tj is the junction temperature (℃), θja
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is the thermal resistance of the package (℃)
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BD9E151NUX
I/O equivalent circuit
Pin.
Pin
No
Name
Pin Equivalent Circuit
Pin.
Pin
No
Name
BST
1
BST
2
VIN
7
GND
8
LX
FB
VC
5
LX
FB
GND
GND
VC
EN
3
Pin Equivalent Circuit
6
EN
VC
GND
GND
SS
4
SS
GND
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BD9E151NUX
Notes for use
(1) About Absolute Maximum Rating
When the absolute maximum ratings of application voltage, operating temperature range, etc. was exceeded, there is
possibility of deterioration and destruction. Also, the short Mode or open mode, etc. destruction condition cannot be
assumed. When the special mode where absolute maximum rating is exceeded is assumed, please give consideration
to the physical safety countermeasure for the fuse, etc.
(2) About GND Electric Potential
In every state, please make the electric potential of GND Pin into the minimum electrical potential. Also, include the
actual excessive effect, and please do it such that the pins, excluding the GND Pin do not become the voltage below
GND.
(3) About Heat Design
Consider the Power Dissipation (Pd) in actual state of use, and please make Heat Design with sufficient margin.
(4) About short circuit between pins and erroneous mounting
When installing to set board, please be mindful of the direction of the IC, phase difference, etc. If it is not installed
correctly, there is a chance that the IC will be destroyed. Also, if a foreign object enters the middle of output, the middle
of output and power supply GND, etc., even for the case where it is shorted, there is a change of destruction.
(5) About the operation inside a strong electro-magnetic field
When using inside a strong electro-magnetic field, there is a possibility of error, so please be careful.
(6) Temperature Protect Circuit (TSD Circuit)
Temperature Protect Circuit (TSD Circuit) is built-in in this IC. As for the Temperature Protect Circuit (TSD Circuit),
because it a circuit that aims to block the IC from insistent careless runs, it is not aimed for protection and guarantee of
IC. Therefore, please do not assume the continuing use after operation of this circuit and the Temperature Protect
Circuit operation.
(7) About checking with Set boards
When doing examination with the set board, during connection of capacitor to the pin that has low impedance, there is a
possibility of stress in the IC, so for every 1 process, please make sure to do electric discharge. As a countermeasure
for static electricity, in the process of assembly, do grounding, and when transporting or storing please be careful. Also,
when doing connection to the jig in the examination process, please make sure to turn off the power supply, then
connect. After that, turn off the power supply then take it off.
(8) About common impedance
For the power supply and the wire of GND, lower the common impedance, then, as much as possible, make the ripple
smaller (as much as possible make the wire thick and short, and lower the ripple from L・C), etc. then and please
consider it sufficiently.
(9) In the application, when the mode where the VIN and each pin electrical potential becomes reversed exists, there is a
possibility that the internal circuit will become damaged. For example, during cases wherein the condition when charge
was given in the external capacitor, and the VIN was shorted to GND, it is recommended to insert the bypass diode to
the diode of the back current prevention in the VIN series or the middle of each Pin-VIN (fig.30).
(10) About IC Pin Input
This IC is a Monolithic IC, and between each element, it has P+ isolation for element separation and P board. With the N
layer of each element and this, the P-N junction is formed, and the parasitic element of each type is composed.
For example, like the fig.31, when resistor and transistor is connected to Pin,
○When GND>(PinA) in Resistor, when GND>(PinA), when GND>(PinB) in Transistor (NPN),
the P-N junction will operate as a parasitic diode.
○Also, during GND>(Pin B) in the Transistor (NPN), through the N layer of the other elements connected
to the above-mentioned parasitic diode , the parasitic NPN Transistor will operation.
On the composition of IC, depending on the electrical potential, the parasitic element will become necessary. Through
the operation of the parasitic element interference of circuit operation will arouse, and error, therefore destruction can be
caused. Therefore please be careful about the applying of voltage lower than the GND (P board) in I/O Pin, and the way
of using when parasitic element operating.
bypass diode
NPN transistor
(Pin A)
(Pin A)
~
~
resistor
avoid reverse
current diode
~
~
(Pin B)
Parasitic
element
GN
N
VCC
+
Vcc
N
OUTPUT
+
P
+
P
P
N
P-substrate
N
N
+
N
P-substrate
GN
GN
(Pin B)
P
P
P
N
GN
Parasitic
element
Parasitic
element
Figure 30. Example of insert diode
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GN
Parasitic
element
Figure 31. Example of simple structure of Monolithic IC
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BD9E151NUX
Physical Dimension Tape and Reel Information
B D 9 E
1 5
Part Number
1
N
U
X
-
Package
NUX: VSON008X2030
TR
Packaging and forming specification
TR: Embossed tape and reel
●Marking Diagram
VSON008X2030 (TOP VIEW)
Part Number Marking
D9E
LOT Number
1 5 1
1PIN MARK
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Datasheet
Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1), transport
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serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSϪ
CLASSϩb
CLASSϪ
CLASSϪ
CLASSϫ
CLASSϪ
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[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
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[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-GE
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Rev.004
Datasheet
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
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responsible for it and you must exercise your own independent verification and judgment in the use of such information
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incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
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isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
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1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
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3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
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4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
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Datasheet
General Precaution
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ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
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3.
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liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
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