EQCO30T5 DATA SHEET (02/08/2016) DOWNLOAD

EQCO30T5.2
EQCO30T5.2 3G/HD-SDI Video Cable Driver
Features
Introduction
• Compatible with all SMPTE3G SDI Data Rates:
- SMPTE259M SDI, 143 to 360 Mbps
- SMPTE344M, 540 Mbps
- SMPTE292M HD-SDI, 1.485 Gbps
- SMPTE372M Dual-Link HD-SDI, 2.97 Gbps
- SMPTE424M Dual-Speed 3G-SDI, 2.97 Gbps
• Pin Compatible with Gennum and National
Semiconductor Parts
• Loss of Signal Detect at Input, Optional 3 dB Input
Trace/Receive Equalization
• Also Operates with 8B/10B Coding
• Single 3.3V Supply.
• Low Power Consumption (150 mW, 3.3V supply)
• Output Driver Enable
• LF-Uplink Receiver Included, Receiving 5 Mbps in
Full-Duplex Communication for Cable Lengths in
0-450m Range
• Up to 900 mA can be Received for Powering
Camera Devices
• Selectable Slew Rate for SD and HD/3G
• 16-Pin, 0.65 mm Pin Pitch, 4 mm QFN Package
• -40°C to +85°C Industrial Temperature Range
• Pb-Free and RoHS Compliant
The EQCO30T5 is a video cable driver for 3G/HD/SDI
video, with speeds up to 4.0 Gbps. It is designed to be
a direct replacement for competing cable drivers. In
addition to downlink functionality from camera to frame
grabber, it can also receive a 5 Mbps uplink signal from
the frame grabber to the camera. Additionally, power
can be provided over the same cable using the same
chip and a few external components. The device
operates with 8B/10B coded signals and with SMPTE
signals up to 2.97 Gbps.
Applications
• High Definition, High Frame Rate Pro-Video
HD-SDI Frame Store
• Surveillance, Industrial/Inspection, Medical Video
Inputs
• HDcctv Applications
Note:
The EQCO30T5 cable driver can be used
in combination with the EQCO30R5 video
equalizer. This device is capable of
transmitting the uplink signal whilst other
key parameters remain compliant to
SMPTE specifications. Please refer to the
Microchip web site (www.microchip.com)
for the EQCO30R5 data sheet.
 2012-2016 Microchip Technology Inc.
DS60001303C-page 1
EQCO30T5.2
Typical Link Performance
Table 1, Table 2 and Table 3 give an overview of link
performance (EQCO30T5 and EQCO30R5 combined)
at room temperature without using the uplink and without
providing power over the same coax. When providing
power or using the uplink communication to the camera,
a small length penalty may arise (in cable length,
typically 10%) due to added parasitics and noise. The
uplink operates to at least 400m at the 5 Mbps bit rate.
TABLE 1:
BELDEN TYPICAL LINK PERFORMANCE
Name
Belden 7731A Belden 1694A Belden 1505A Belden 1505F Belden 1855A
Type
Long
Distance
Industry
Standard
Compromise
Coax
Flexible
Thinnest
Cable
Diameter
(mm)
10.3
6.99
5.94
6.15
4.03
270 Mbps
(m)
718
469
384
302
270
1.485 Gbps
(m)
332
223
187
136
132
2.97 Gbps
(m)
219
149
128
89
91
TABLE 2:
GEPCO TYPICAL LINK PERFORMANCE
Name
Gepco
VHD1100
Gepco
VSD2001
Gepco
VPM2000
Gepco
VHD2000M
Gepco
VDM230
Type
Long
Distance
Industry
Standard
Compromise
Coax
Flexible
Thinnest
Cable
Diameter
(mm)
10.3
6.91
6.15
6.15
4.16
270 Mbps
(m)
772
502
387
305
273
1.485 Gbps
(m)
372
241
187
138
133
2.97 Gbps
(m)
252
163
128
91
92
TABLE 3:
CANARE TYPICAL LINK PERFORMANCE
Name
Canare
L-7CFB
Canare
L-5CFB
Canare
L-4CFB
Canare
L-3CFB
Canare
L-2.5CFB
Type
Long
Distance
Industry
Standard
Compromise
Coax
Thin Cable
Thinnest
Cable
Diameter
(mm)
10.3
6.99
5.94
6.15
4.03
270 Mbps
(m)
615
434
344
287
223
1.485 Gbps
(m)
281
201
161
135
109
2.97 Gbps
(m)
182
132
107
90
73
DS60001303C-page 2
 2012-2016 Microchip Technology Inc.
EQCO30T5.2
Table of Contents
1.0
2.0
3.0
4.0
Device Overview .......................................................................................................................................................................... 4
Application Information................................................................................................................................................................. 8
Electrical Characteristics ............................................................................................................................................................ 11
Packaging................................................................................................................................................................................... 13
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An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current
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 2012-2016 Microchip Technology Inc.
DS60001303C-page 3
EQCO30T5.2
1.0
DEVICE OVERVIEW
The EQCO30T5 is a dual slew rate cable driver designed
to drive digital signals over coaxial cable. The EQCO30T5
chip is optimized for driving SMPTE HD-SDI signals, but
works equally well with 8B/10B coded signals.
The EQCO30R5 is a video equalizer that matches to
the EQCO30T5, since it can transmit the uplink signal.
Implementing the uplink requires very few additional
components on both sides of the link, and complies
with SMPTE specifications. The EQCO30R5 data
sheet is available separately from Microchip.
Figure 1-1 shows a typical communication link using
the EQCO30T5 and EQCO30R5 chips:
FIGURE 1-1:
TYPICAL EQCO30T5 SETUP
Up to
2.97 Gbps
downlink
High
Definition
Camera
Up to
900 mA DC
EQCO
30T5
Up to 400 meters
75Ω Coax
Up to
5 Mbps
uplink
Up to
900 mA DC
Up to
2.97 Gbps
downlink
Frame
Store +
Camera
Control
EQCO
30R5
Up to
5 Mbps
uplink
The EQCO30T5 includes an uplink receiver for
receiving digital data coming from the frame store in
full-duplex, giving 5 Mbps of bandwidth for:
•
•
•
•
Triggering purposes, Auxiliary outputs
Firmware upgrades,
Audio channels
Etc.
DS60001303C-page 4
 2012-2016 Microchip Technology Inc.
EQCO30T5.2
1.1
Pinout and Pin Description
FIGURE 1-2:
TABLE 1-1:
Pin Number
(TAB)
EQCO30T5.2 PIN DIAGRAM (VIEWED FROM TOP)
EQdis
LFout
NC
NC
16
15
14
13
SDIp
1
12
SDOp
SDIn
2
11
SDOn
GND
3
10
SD/HDB
Rref
4
EQCO30T5
GND TAB
9
5
6
7
8
NC
enable
NC
NC
VCC
EQCO30T5.2 PIN DESCRIPTIONS
Pin Name
GND
Signal Type
Power
Description
Use as single-point ground.
1, 2
SDIp, SDIn
Differential Input
Serial input positive/negative differential serial input.
3
GND
Power
Ground. Connect to GND TAB.
4
Rref
Analog Input
Input determining output amplitude of cable driver.
9
VCC
Power
+3.3V of power supply.
6
Enable
Input
Enables the output driver pins.
5, 7, 8, 13, 14
NC
Input
Do not connect; leave floating. Used for internal testing.
10
SD/HDB
Input
Select edge rate.
11
SDOn
Driver Output
Serial negative cable driver output with 50Ω on-chip serial
output resistance. Complement with 25Ω externally.
12
SDOp
Driver Output
Serial positive cable driver output with 50Ω on-chip serial
output resistance. Complement with 25Ω externally.
15
LFout
Output
Digital output signal of the full-duplex uplink.
16
EQdis
Input
Disables input trace equalization.
1.1.1
SDIP/SDIN
SDIp/SDIn together form a differential input pair.
Between SDIp and SDIn inputs, there is a
termination resistor of 100Ω. The intention is to
always use AC coupling. When AC-coupled, the
common-mode gets biased to 600 mV.
1.1.2
RREF
A resistor is to be connected between VCC and the
Rref pin. A resistor of 750Ω gives an 800 mV launch
amplitude in the 75Ω coaxial cables. A larger resistor
gives a smaller amplitude.
1.1.3
ENABLE
When enable is floating or pulled high, the output
driver is enabled. When enable is low, the output is
disabled and power consumption drops significantly.
 2012-2016 Microchip Technology Inc.
DS60001303C-page 5
EQCO30T5.2
1.1.4
SD/HDB
With SD/HDB set to high, the output rise and fall times
are set for SD operation. When left floating or pulled
low, the rise and fall times are set for 3G/HD operation.
1.1.5
SDOn, SDOp
The output driver is not based on a CML output
stage. Both outputs operate independently, so there
is very little interference between the outputs and
their termination condition. There is also no LRoutput network needed for achieving good returnloss. A 25Ω resistor should be connected in series
with the output to drive a 75Ω coax cable. The output
amplitude is achieved behind this 25Ω resistor; refer
to the application circuits at the end of the data
sheet. The PCB doesn’t require layout changes
when migrating from competing cable drivers,
however, fewer components are needed. One does
not need to optimize the return-loss network, since it
is omitted.
1.1.6
LFOUT
LFout provides the 5 Mbps received uplink signal
(LVTTL voltage levels). It can easily drive a PCB
trace of 20 pF at this speed. For longer distance
communication from this pin to the next chip, using a
buffer is recommended. The output impedance is
about 300Ω.
1.1.7
EQdis
When EQdis is left floating or pulled low, the input
trace equalization is turned on and invokes a typical
3 dB gain at 1.5 GHz.
This value is optimized for compensating the highfrequency losses of approximately 20 cm of 5-mil
stripline in FR4. When pulled high, this equalization
is turned off.
DS60001303C-page 6
 2012-2016 Microchip Technology Inc.
EQCO30T5.2
1.2
Circuit Operation
Figure 1-3 is a block diagram of the EQCO30T5,
showing electrical connections. The input pre-driver
brings the input signal to a digital signal, with or without
the use of input trace equalization. The active splitter/
combiner/driver launches the digital signal in the cable,
with an amplitude determined by the external resistor
connected to Rref and with an edge rate for SD or 3G/
HD-SDI depending on the SD/HDB signal. It also splits
the incoming signal towards the LF receiver to provide
the 5 Mbps LFout signal.
FIGURE 1-3:
EQCO30T5 BLOCK DIAGRAM SHOWING ELECTRICAL CONNECTIONS
EQdis
SDIp
Input
Pre-Driver
SDIn
enable
SD/HD
Rref
Active Signal
Splitter/Combiner/Driver
SDOp
SDOn
LF receiver
EQCO30T5
 2012-2016 Microchip Technology Inc.
DS60001303C-page 7
EQCO30T5.2
2.0
APPLICATION INFORMATION
2.1
Typical Application Circuit as SMPTE Cable Driver
Figure 2-1 illustrates a typical schematic implementation
of the EQCO30T5 used as a cable driver for SMPTE
video signals.
FIGURE 2-1:
EQCO30T5.2 TYPICAL APPLICATION CIRCUIT AS SMPTE CABLE DRIVER
Resistors R8 and R9 are to be placed close to pins 12
and 11, respectively. From there onwards, the traces up
to the coax connectors should be laid-out as 75Ω traces
(including the C3 and C4 capacitors as AC-couplers).
2.1.1
RETURN-LOSS NETWORK
Competing cable drivers need external RL return-loss
networks. The EQCO30T5 does not need these type of
external networks. Figure 2-2 compares the output
network of the EQCO30T5 with the network of
competing cable drivers.
The EQCO30T5 is pin-compatible with other cable
drivers, but with a different component population. No
termination resistor to VCC is required (do not fit =
DNF). The inductor of the return loss network must not
be populated and the 75Ω resistor of this network
should be replaced with a 25Ω resistor to achieve
correct operation.
DS60001303C-page 8
 2012-2016 Microchip Technology Inc.
EQCO30T5.2
FIGURE 2-2:
Note:
COMPARISON BETWEEN EQCO30T5 AND COMPETING SOLUTIONS
Resistors marked DNF indicate “Do Not Fit”
 2012-2016 Microchip Technology Inc.
DS60001303C-page 9
EQCO30T5.2
2.2
EQCO30T5 in Bidirectional Link (Including Power Supply)
FIGURE 2-3:
EQCO30T5 IN BIDIRECTIONAL LINK (INCLUDING POWER SUPPLY
TRANSMISSION)
Resistors R8 and R9 are to be placed close to pins 12
and 11, respectively. From there onwards, the traces up
to the coax connector SDIP1 should be laid out as 75Ω
traces (including the C3 and C4 capacitors as AC couplers). Resistor R1 has to be placed very close to this
coax connector with a very short, low-impedance connection between one of the shielding pins of the connector and the resistor. To achieve the return-loss
illustrated in the appendix, the power and ground
planes below components FB1, FB2, R3, R4, L1, R5,
L2 should be removed (applying cut-outs).
2.2.1
COMPONENT RECOMMENDATION
When using the components below, a maximum current of 900 mA can be communicated to power-up the
camera side. Different types of inductors may be suitable in order to allow a higher current level, however,
the RF quality of the inductor should be checked.
Ferrite Beads Fb1, Fb2 = FBMH1608HM102 from
Taiyo Yuden
Inductor L1= 1812PS_103 from Coilcraft
DS60001303C-page 10
 2012-2016 Microchip Technology Inc.
EQCO30T5.2
3.0
ELECTRICAL CHARACTERISTICS
3.1
Absolute Maximum Ratings
Stresses beyond those listed under this section may
cause permanent damage to the device. These are
stress ratings only and are not tested. Functional
operation of the device at these or any other
conditions beyond those indicated in the operational
sections are not implied. Exposure to absolute
maximum rating conditions for extended periods may
affect device reliability.
TABLE 3-1:
ABSOLUTE MAXIMUM RATINGS
Parameter
Storage Temperature
Ambient Temperature
Operating Temperature
Conditions
Min.
Typ.
Max.
Units
—
-65
—
+150
°C
Power applied
-55
—
+125
°C
Normal operation
(VCC = 1.2V ±5%)
-40
—
+85
°C
—
-0.8
—
+3.6
V
Supply Voltage to Ground
DC Input Voltage
—
-0.8
—
+3.6
V
DC Voltage to Outputs
—
-0.8
—
+3.6
V
Outputs low
—
—
90
mA
Current into Outputs
TABLE 3-2:
ELECTRICAL CHARACTERISTICS (OVER THE OPERATING VCC AND -40 TO +85°C
RANGE)
Parameter
Description
Min.
Typ.
Max.
Unit
3.15
3.3
3.45
V
—
45
—
mA
Power Supply
VCC
Supply voltage
IS
Supply current, both transmitting and receiving
Operational Bit Rate
BRoutput
Bit rate cable driver output
0.05
—
4
Gbps
BRuplink
Bit rate uplink receiver
0.5
—
5
Mbps
⌂Vi
Input amplitude VSDIp,n
2x100
—
2x900
mV
VCMIN
Input common-mode voltage
—
600
—
mV
Rinput
Differential input termination
—
2x50
—
Ω
SDIp/SDIn Input
 2012-2016 Microchip Technology Inc.
DS60001303C-page 11
EQCO30T5.2
TABLE 3-2:
ELECTRICAL CHARACTERISTICS (OVER THE OPERATING VCC AND -40 TO +85°C
RANGE) (CONTINUED)
SDOp connection to Coax
Zcoax
Coax cable characteristic impedance
—
75
—
Ω
RSDOp, RSDOn
Input impedance between SDOp and VCC/GND.
To get to 75, add external 25Ω series resistor.
45
50
55
Ω
Return-Loss as seen on SDOp pin having 25Ω
series resistor.
Frequency range = 5 MHz-1.5 GHz
—
—
-15
dB
Rloss
Return-Loss as seen on SDOp pin having 25Ω
series resistor.
Frequency range = 1.5 GHz-3.0 GHz
—
—
-10
dB
Rloss
⌂VTX
Transmit amplitude with Rref = 750Ω
720
800
880
mV
trise_tx_SD
Rise/Fall time 20% to 80% of ⌂VTX (SD/HDB = High)
400
—
800
ps
trise_tx
Rise/Fall time 20% to 80% of ⌂VTX (SD/HDB = Low)
—
—
65
ps
—
15
—
ns
Min.
Typ.
Max.
Units
—
10
—
ps
LFO Output (LVTTL-like)
Rise/Fall time 20% to 80% of VCC for 20 pF load
trise_lLFO
TABLE 3-3:
JITTER NUMBERS(1)
Parameter
Conditions
Additive peak to peak jitter on SDOp and Downlink signal = 3.0 Gbps
SDOn
0-450m(2), @ low-speed signal =
5 Mbps, 8B/10B, and @ downlink
—
50
—
ns
signal = 270 Mbps, 8B/10B
Jitter numbers (over operating VCC range at -40°C to +85°C and full ⌂VTX range with pathological patterns)
Measured with Belden 1694A coaxial cable
Peak to peak jitter on LFO
1:
2:
DS60001303C-page 12
 2012-2016 Microchip Technology Inc.
EQCO30T5.2
4.0
PACKAGING INFORMATION
4.1
Package Marking Information
16-Lead Plastic Quad Flat, No Lead Package – 4x4x0.9 mm Body [QFN]
16-Lead QFN (4x4x0.9 mm)
PIN 1
Example
PIN 1
EQCO
30T5.2
YYWWNNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
YYWWNNN
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available characters
for customer-specific information.
 2012-2016 Microchip Technology Inc.
DS60001303C-page 13
EQCO30T5.2
16-Lead Plastic Quad Flat, No Lead Package (8E) - 4x4x0.9 mm Body [QFN]
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
A
B
N
NOTE 1
1
2
E
(DATUM B)
(DATUM A)
2X
0.20 C
2X
TOP VIEW
0.20 C
0.10 C
C
A1
A
SEATING
PLANE
16X
SIDE VIEW
(A3)
0.10
0.08 C
C A B
D2
(16X K)
0.10
C A B
E2
e
2
2
1
16X L
N
e
BOTTOM VIEW
16X b
0.10
0.05
C A B
C
Microchip Technology Drawing C04-259B Sheet 1 of 2
DS60001303C-page 14
 2012-2016 Microchip Technology Inc.
EQCO30T5.2
16-Lead Plastic Quad Flat, No Lead Package (8E) - 4x4x0.9 mm Body [QFN]
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Units
Dimension Limits
Number of Pins
N
e
Pitch
A
Overall Height
Standoff
A1
A3
Terminal Thickness
Overall Width
E
E2
Exposed Pad Width
D
Overall Length
D2
Exposed Pad Length
b
Terminal Width
Terminal Length
L
K
Terminal-to-Exposed-Pad
MIN
0.80
0.00
1.95
1.95
0.25
0.45
MILLIMETERS
NOM
16
0.65 BSC
0.87
0.02
0.20 REF
4.00 BSC
2.05
4.00 BSC
2.05
0.30
0.55
0.425 REF
MAX
0.95
0.05
2.15
2.15
0.35
0.65
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Package is saw singulated
3. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-259B Sheet 2 of 2
 2012-2016 Microchip Technology Inc.
DS60001303C-page 15
EQCO30T5.2
16-Lead Plastic Quad Flat, No Lead Package (8E) - 4x4x0.9 mm Body [QFN]
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
C1
X2
16
G1
1
X1
2
C2 Y2
Y1
E
SILK SCREEN
RECOMMENDED LAND PATTERN
Units
Dimension Limits
E
Contact Pitch
Optional Center Pad Width
X2
Optional Center Pad Length
Y2
Contact Pad Spacing
C1
Contact Pad Spacing
C2
Contact Pad Width (X16)
X1
Contact Pad Length (X16)
Y1
Contact Pad to Center Pad (X16)
G1
MIN
MILLIMETERS
NOM
0.65 BSC
MAX
2.15
2.15
3.625
3.625
0.30
0.725
0.20
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing C04-2259A
DS60001303C-page 16
 2012-2016 Microchip Technology Inc.
EQCO30T5.2
APPENDIX A:
REVISION HISTORY
Revision C (February 2016)
• Removed electrostatic discharge ratings from
Table 3-1.
• Minor typographical changes.
Revision B (February 2015)
• Updated the typical application circuit diagrams in
Figures 2-1 and 2-3.
Revision A (September 2014)
This is the initial release of the document in the Microchip
format. This replaces EqcoLogic document version 2v0.
TABLE A-1:
VERSION HISTORY
Version
Date
Author
2v0
1/27/14
A. Peeters
Revision
1v0
3/13/12
A. Peeters
Final document
0v2
1/17/12
M. Kuijk
0v1
1/6/12
B. Devuyst
 2012-2016 Microchip Technology Inc.
Comments
Added Return-Loss measurement
New document
DS60001303C-page 17
EQCO30T5.2
APPENDIX B:
TYPICAL RETURN-LOSS MEASUREMENT
All measurements at VCC = 3.3V, Temp = +25ºC, data pattern = prbs15 (including 20 µs of each polarity of
pathological pattern), measured with Belden 1694A cable.
FIGURE B-1:
TYPICAL RETURN-LOSS MEASUREMENT (DB VS MHZ)
DS60001303C-page 18
 2012-2016 Microchip Technology Inc.
EQCO30T5.2
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included in the back of this document.
Technical support is available through the web site
at: http://microchip.com/support
CUSTOMER CHANGE NOTIFICATION
SERVICE
Microchip’s customer notification service helps keep
customers current on Microchip products. Subscribers
will receive e-mail notification whenever there are
changes, updates, revisions or errata related to a
specified product family or development tool of interest.
To register, access the Microchip web site at
www.microchip.com. Under “Support”, click on
“Customer Change Notification” and follow the
registration instructions.
 2012-2016 Microchip Technology Inc.
DS60001303C-page 19
EQCO30T5.2
PRODUCT IDENTIFICATION SYSTEM
To order parts, including industrial, or obtain information, for e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
I
RM
Device
Temp. Range
Radio
Module
Device:
Firmware
F
Revision Number
EQCO30T5.2
Temperature Range: I
Package:
XXX
Examples:
a)
EQCO30T5.2
b)
EQCO30T5.2-TRAY
= Industrial temperature,
16-Lead QFN
Tube packaging
= Industrial temperature,
16-Lead QFN
Tray packaging
= -40C to +85C (Industrial temperature)
TRAY = Tray
(Blank) = Tube
DS60001303C-page 20
 2012-2016 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate,
dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq,
KeeLoq logo, Kleer, LANCheck, LINK MD, MediaLB, MOST,
MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo,
RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O
are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
ClockWorks, The Embedded Control Solutions Company,
ETHERSYNCH, Hyper Speed Control, HyperLight Load,
IntelliMOS, mTouch, Precision Edge, and QUIET-WIRE are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut,
BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, Dynamic Average Matching, DAM, ECAN,
EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip
Connectivity, JitterBlocker, KleerNet, KleerNet logo, MiWi,
motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB,
MPLINK, MultiTRAK, NetDetach, Omniscient Code
Generation, PICDEM, PICDEM.net, PICkit, PICtail,
PureSilicon, RightTouch logo, REAL ICE, Ripple Blocker,
Serial Quad I/O, SQI, SuperSwitcher, SuperSwitcher II, Total
Endurance, TSHARC, USBCheck, VariSense, ViewSpan,
WiperLock, Wireless DNA, and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
 2012-2016 Microchip Technology Inc.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
GestIC is a registered trademarks of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2012-2016, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
ISBN: 978-1-5224-0256-5
DS60001303C-page 21
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07/14/15
DS60001303C-page 22
 2012-2016 Microchip Technology Inc.
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