Data Sheet

Freescale Semiconductor
Technical Data
Document Number: A2T18H455W23N
Rev. 0, 5/2016
RF Power LDMOS Transistor
N--Channel Enhancement--Mode Lateral MOSFET
A2T18H455W23NR6
This 87 W asymmetrical Doherty RF power LDMOS transistor is designed for
cellular base station applications requiring very wide instantaneous bandwidth
capability covering the frequency range of 1805 to 1880 MHz.
1800 MHz
 Typical Doherty Single--Carrier W--CDMA Performance: VDD = 31.5 Vdc,
IDQA = 1080 mA, VGSB = 0.25 Vdc, Pout = 87 W Avg., Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCDF.
Frequency
Gps
(dB)
D
(%)
Output PAR
(dB)
1805 MHz
14.5
48.1
8.1
–32.7
1840 MHz
15.2
48.2
8.1
–33.0
1880 MHz
15.9
48.4
8.0
–33.8
1805–1880 MHz, 87 W AVG., 31.5 V
AIRFAST RF POWER LDMOS
TRANSISTOR
ACPR
(dBc)
OM--1230--4L2S
PLASTIC
Features
 Advanced High Performance In--Package Doherty
 High Thermal Conductivity Packaging Technology for Reduced Thermal
Resistance
 Designed for Wide Instantaneous Bandwidth Applications
 Greater Negative Gate--Source Voltage Range for Improved Class C
Operation
 Able to Withstand Extremely High Output VSWR and Broadband Operating
Conditions
 Designed for Digital Predistortion Error Correction Systems
6 VBWA(2)
Carrier
5 RFoutA/VDSA
RFinA/VGSA 1
(1)
RFinB/VGSB 2
4 RFoutB/VDSB
Peaking
3 VBWB(2)
(Top View)
Note: Exposed backside of the package is
the source terminal for the transistors.
Figure 1. Pin Connections
1. Pin connections 4 and 5 are DC coupled
and RF independent.
2. Device cannot operate with VDD current
supplied through pin 3 and pin 6.
 Freescale Semiconductor, Inc., 2016. All rights reserved.
RF Device Data
Freescale Semiconductor, Inc.
A2T18H455W23NR6
1
Table 1. Maximum Ratings
Symbol
Value
Unit
Drain--Source Voltage
Rating
VDSS
–0.5, +65
Vdc
Gate--Source Voltage
VGS
–6.0, +10
Vdc
Operating Voltage
VDD
32, +0
Vdc
Storage Temperature Range
Tstg
–65 to +150
C
Case Operating Temperature Range
TC
–40 to +125
C
TJ
–40 to +225
C
Operating Junction Temperature Range
(1,2)
Table 2. Thermal Characteristics
Characteristic
Thermal Resistance, Junction to Case
Case Temperature 77C, 87 W Avg., W--CDMA, 31.5 Vdc, IDQA = 1080 mA, VGSB = 0.25 Vdc,
1840 MHz
Symbol
Value (2,3)
Unit
RJC
0.23
C/W
Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per JESD22--A114)
2
Machine Model (per EIA/JESD22--A115)
B
Charge Device Model (per JESD22--C101)
IV
Table 4. Moisture Sensitivity Level
Test Methodology
Per JESD22--A113, IPC/JEDEC J--STD--020
Rating
Package Peak Temperature
Unit
3
260
C
Table 5. Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol
Min
Typ
Max
Unit
Zero Gate Voltage Drain Leakage Current
(VDS = 65 Vdc, VGS = 0 Vdc)
IDSS
—
—
10
Adc
Zero Gate Voltage Drain Leakage Current
(VDS = 32 Vdc, VGS = 0 Vdc)
IDSS
—
—
5
Adc
Gate--Source Leakage Current
(VGS = 5 Vdc, VDS = 0 Vdc)
IGSS
—
—
1
Adc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 200 Adc)
VGS(th)
1.05
1.2
2.2
Vdc
Gate Quiescent Voltage
(VDD = 31.5 Vdc, IDA = 1080 mAdc, Measured in Functional Test)
VGSA(Q)
2.1
2.5
2.9
Vdc
Drain--Source On--Voltage
(VGS = 10 Vdc, ID = 2.0 Adc)
VDS(on)
0.05
0.15
0.3
Vdc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 300 Adc)
VGS(th)
0.8
1.2
1.6
Vdc
Drain--Source On--Voltage
(VGS = 10 Vdc, ID = 3 Adc)
VDS(on)
0.05
0.15
0.3
Vdc
Characteristic
Off Characteristics (4)
On Characteristics -- Side A, Carrier
On Characteristics -- Side B, Peaking
1.
2.
3.
4.
Continuous use at maximum temperature will affect MTTF.
MTTF calculator available at http://www.nxp.com/RF/calculators.
Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.nxp.com/RF and search for AN1955.
Each side of device measured separately.
(continued)
A2T18H455W23NR6
2
RF Device Data
Freescale Semiconductor, Inc.
Table 5. Electrical Characteristics (TA = 25C unless otherwise noted) (continued)
Characteristic
Symbol
Min
Typ
Max
Unit
Functional Tests — 1805 MHz (1,2,3) (In Freescale Doherty Test Fixture, 50 ohm system) VDD = 31.5 Vdc, IDQA = 1080 mA, VGSB = 0.25 Vdc,
Pout = 87 W Avg., f = 1805 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF.
ACPR measured in 3.84 MHz Channel Bandwidth @ 5 MHz Offset.
Power Gain
Gps
14.0
14.5
17.0
dB
Drain Efficiency
D
43.0
48.1
—
%
PAR
7.3
8.1
—
dB
ACPR
—
–32.7
–29.0
dBc
Output Peak--to--Average Ratio @ 0.01% Probability on CCDF
Adjacent Channel Power Ratio
(1,2,3)
Functional Tests — 1880 MHz
(In Freescale Doherty Test Fixture, 50 ohm system) VDD = 31.5 Vdc, IDQA = 1080 mA, VGSB = 0.25 Vdc,
Pout = 87 W Avg., f = 1880 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF.
ACPR measured in 3.84 MHz Channel Bandwidth @ 5 MHz Offset.
Power Gain
Gps
14.0
15.9
17.0
dB
Drain Efficiency
D
43.0
48.4
—
%
PAR
7.3
8.0
—
dB
ACPR
—
–33.8
–29.0
dBc
Output Peak--to--Average Ratio @ 0.01% Probability on CCDF
Adjacent Channel Power Ratio
Load Mismatch
(3) (In
Freescale Doherty Test Fixture, 50 ohm system) IDQA = 1080 mA, VGSB = 0.25 Vdc, f = 1840 MHz
VSWR 10:1 at 32 Vdc, 575 W CW Output Power
(3 dB Input Overdrive from 417 W CW Rated Power)
No Device Degradation
Typical Performance (3) (In Freescale Doherty Test Fixture, 50 ohm system) VDD = 31.5 Vdc, IDQA = 1080 mA, VGSB = 0.25,
1805–1880 MHz Bandwidth
Pout @ 1 dB Compression Point, CW
P1dB
—
(4)
436
—
W
P3dB
AM/PM
(Maximum value measured at the P3dB compression point across
the 1805–1880 MHz frequency range)

—
589
—
W
—
–21
—

VBWres
—
140
—
MHz
Gain Flatness in 75 MHz Bandwidth @ Pout = 87 W Avg.
GF
—
1.4
—
dB
Gain Variation over Temperature
(–30C to +85C)
G
—
0.012
—
dB/C
P1dB
—
0.007
—
dB/C
Pout @ 3 dB Compression Point
VBW Resonance Point
(IMD Third Order Intermodulation Inflection Point)
Output Power Variation over Temperature
(–30C to +85C)
Table 6. Ordering Information
Device
Tape and Reel Information
A2T18H455W23NR6
R6 Suffix = 150 Units, 56 mm Tape Width, 13--inch Reel
1.
2.
3.
4.
Package
OM--1230--4L2S
VDDA and VDDB must be tied together and powered by a single DC power supply.
Part internally matched both on input and output.
Measurements made with device in an asymmetrical Doherty configuration.
P3dB = Pavg + 7.0 dB where Pavg is the average output power measured using an unclipped W--CDMA single--carrier input signal where
output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF.
A2T18H455W23NR6
RF Device Data
Freescale Semiconductor, Inc.
3
VGGA
C13
A2T18H455W23N
Rev. 3
VDDA
C30
C31
C27
C11 R1
C18
C16 C15
C24
C34
C26
C1
C6
C5
R3
Z1
C10
C4
C9
C7
CUT OUT AREA
C21
C22
C
P
C23
C8
C17 C19
R2
C28
C25
C2
C3
C12
C20
C29
C32
D76804
VGGB
C35
C33
C14
VDDB
Note: VDDA and VDDB must be tied together and powered by a single DC power supply.
Figure 1. A2T18H455W23NR6 Test Circuit Component Layout
Table 7. A2T18H455W23NR6 Test Circuit Component Designations and Values
Part
Description
Part Number
Manufacturer
C1, C2, C3, C4, C5, C15,
C16, C17, C18
10 pF Chip Capacitors
GQM2195C2E100JB12D
Murata
C6
1 pF Chip Capacitor
GQM2195C2E1R0BB12D
Murata
C7
2.4 pF Chip Capacitor
GQM2195C2E2R4BB12D
Murata
C8
0.7 pF Chip Capacitor
GQM2195C2ER70BB12D
Murata
C9
1.3 pF Chip Capacitor
GQM2195C2E1R3BB12D
Murata
C10
0.2 pF Chip Capacitor
800B0R2BT500XT
ATC
C11, C12, C24, C25, C26,
C27, C28, C29
10 F Chip Capacitors
GRM32ER61H106KA12L
Murata
C13, C14, C30, C31, C32,
C33
10 F Chip Capacitors
C5750X7S2A106M230KE
TDK
C19, C20
10 pF Chip Capacitors
ATC800B100JT500XT
ATC
C21
0.3 pF Chip Capacitor
ATC800B0R3BT500XT
ATC
C22
6.8 pF Chip Capacitor
ATC800B6R8BT500XT
ATC
C23
8.2 pF Chip Capacitor
ATC800B8R2BT500XT
ATC
C34, C35
470 F, 63 V Electrolytic Capacitors
MCGPR63V477M13X26
Multicomp
R1, R2
3.3 , 1/8 W Chip Resistors
WCR0805-3R3FI
Welwyn
R3
50 , 10 W Termination
060120A25X50-2
Anaren
Z1
1800–2200 MHz Band, 90, 2 dB Doherty Coupler
X3C20F1-02S
Anaren
PCB
Rogers RO4350B, 0.020, r = 3.66
D76804
MTL
A2T18H455W23NR6
4
RF Device Data
Freescale Semiconductor, Inc.
Gps, POWER GAIN (dB)
17
16.5
D
Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF
16
15
47
PARC
14.5
14
13
1760
1780
1800
1820
1840
1860
–26
–1.7
–28
–1.8
–30
–32
ACPR
13.5
49
48
Gps
15.5
50
1880
1900
–34
–36
1920
–1.9
–2
–2.1
PARC (dB)
51
VDD = 31.5 Vdc, Pout = 87 W (Avg.), IDQA = 1080 mA, VGSB = 0.25 Vdc
Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth
17.5
ACPR (dBc)
18
D, DRAIN
EFFICIENCY (%)
TYPICAL CHARACTERISTICS — 1805–1880 MHz
–2.2
f, FREQUENCY (MHz)
IMD, INTERMODULATION DISTORTION (dBc)
Figure 2. Single--Carrier Output Peak--to--Average Ratio Compression
(PARC) Broadband Performance @ Pout = 87 Watts Avg.
0
VDD = 31.5 Vdc, Pout = 31 W (PEP), IDQA = 1080 mA
VGSB = 0.25 Vdc, Two--Tone Measurements
(f1 + f2)/2 = Center Frequency of 1840 MHz
–15
IM3--U
–30
IM5--L
–45
IM5--U
IM7--L
–60
–75
IM3--L
IM7--U
10
1
300
100
TWO--TONE SPACING (MHz)
16
0
15.5
15
14.5
14
13.5
VDD = 31.5 Vdc, IDQA = 1080 mA, VGSB = 0.25 Vdc, f = 1840 MHz
Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth
–1 dB = 64 W
–30
55
–31
D
–1
ACPR
Gps
50
45
–2
–2 dB = 92 W
–3
40
–3 dB = 119 W
–4
–5
60
PARC
60
90
120
150
–33
–34
35
–35
30
–36
Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF
30
–32
180
ACPR (dBc)
1
D DRAIN EFFICIENCY (%)
16.5
OUTPUT COMPRESSION AT 0.01%
PROBABILITY ON CCDF (dB)
Gps, POWER GAIN (dB)
Figure 3. Intermodulation Distortion Products
versus Two--Tone Spacing
Pout, OUTPUT POWER (WATTS)
Figure 4. Output Peak--to--Average Ratio
Compression (PARC) versus Output Power
A2T18H455W23NR6
RF Device Data
Freescale Semiconductor, Inc.
5
TYPICAL CHARACTERISTICS — 1805–1880 MHz
14
1805 MHz
13
12
D
1880 MHz
50
–20
40
30
10
1840 MHz
1805 MHz
1
–10
20
1805 MHz
ACPR
60
10
0
500
100
–30
–40
–50
ACPR (dBc)
VDD = 31.5 Vdc, IDQA = 1080 mA, VGSB = 0.25 Vdc
1880 MHz
Single--Carrier W--CDMA, 3.84 MHz
17 Channel Bandwidth Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCDF
1840 MHz
16
Gps
1840 MHz
15
1880 MHz
D, DRAIN EFFICIENCY (%)
Gps, POWER GAIN (dB)
18
–60
–70
Pout, OUTPUT POWER (WATTS) AVG.
Figure 5. Single--Carrier W--CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power
17
16
GAIN (dB)
15
VDD = 31.5 Vdc
Pin = 0 dBm
IDQA = 1080 mA
VGSB = 0.25 Vdc
Gain
14
13
12
11
1700
1750
1800
1850
1900
1950
2000
2050
2100
f, FREQUENCY (MHz)
Figure 6. Broadband Frequency Response
A2T18H455W23NR6
6
RF Device Data
Freescale Semiconductor, Inc.
Table 8. Carrier Side Load Pull Performance — Maximum Power Tuning
VDD = 31.5 Vdc, IDQA = 758 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
()
Zin
()
1800
1.95 – j6.68
2.39 + j6.81
1840
2.49 – j7.21
3.13 + j7.24
1880
3.51 – j8.21
4.17 + j7.60
Zload
()
(1)
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1.02 – j2.85
17.3
52.6
184
53.9
–14
0.88 – j3.16
16.9
52.7
185
50.5
–14
0.84 – j3.24
17.2
52.6
183
50.3
–16
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1800
1.95 – j6.68
2.26 + j7.13
0.96 – j3.04
14.9
53.4
218
53.0
–19
1840
2.49 – j7.21
2.98 + j7.75
0.88 – j3.24
14.8
53.4
219
51.4
–20
1880
3.51 – j8.21
4.21 + j8.41
0.84 – j3.36
15.0
53.3
214
50.4
–21
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 9. Carrier Side Load Pull Performance — Maximum Drain Efficiency Tuning
VDD = 31.5 Vdc, IDQA = 758 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload (1)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1800
1.95 – j6.68
2.33 + j7.08
2.57 – j1.37
20.3
49.8
96
66.7
–22
1840
2.49 – j7.21
3.15 + j7.49
2.25 – j1.61
20.2
49.9
97
65.2
–22
1880
3.51 – j8.21
3.93 + j6.87
1.87 – j2.06
20.1
50.2
106
62.9
–24
Max Drain Efficiency
P3dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2.51 – j1.37
18.3
50.5
112
66.1
–30
3.04 + j7.85
1.93 – j1.94
17.9
51.2
132
65.0
–28
3.86 + j7.31
1.82 – j2.29
17.9
51.3
135
62.3
–31
f
(MHz)
Zsource
()
Zin
()
1800
1.95 – j6.68
2.29 + j7.35
1840
2.49 – j7.21
1880
3.51 – j8.21
Zload
()
(2)
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
A2T18H455W23NR6
RF Device Data
Freescale Semiconductor, Inc.
7
Table 10. Peaking Side Load Pull Performance — Maximum Power Tuning
VDD = 31.5 Vdc, VGSB = 0 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
()
Zin
()
1800
0.99 – j5.23
0.91 + j5.01
1840
1.13 – j5.22
1.04 + j5.21
1880
1.24 – j5.77
1.24 + j5.52
Zload
()
(1)
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1.00 – j2.79
12.9
54.9
309
49.8
–27
0.98 – j2.99
13.4
54.9
307
49.6
–28
0.98 – j3.11
13.5
54.9
312
50.1
–33
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1800
0.99 – j5.23
0.90 + j5.14
1.04 – j2.95
10.8
55.6
365
52.8
–34
1840
1.13 – j5.22
1.05 + j5.37
1.03 – j3.11
11.3
55.6
363
52.6
–35
1880
1.24 – j5.77
1.27 + j5.73
1.03 – j3.24
11.5
55.6
366
52.7
–40
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 11. Peaking Side Load Pull Performance — Maximum Drain Efficiency Tuning
VDD = 31.5 Vdc, VGSB = 0 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload (1)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1800
0.99 – j5.23
0.83 + j5.01
2.93 – j2.55
14.2
53.5
223
62.9
–34
1840
1.13 – j5.22
0.92 + j5.19
2.66 – j2.09
14.8
53.3
212
62.9
–36
1880
1.24 – j5.77
1.10 + j5.49
2.13 – j2.13
14.8
53.5
226
63.1
–39
Max Drain Efficiency
P3dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2.93 – j2.72
12.2
54.0
252
61.8
–43
0.95 + j5.35
2.72 – j2.18
12.7
53.8
239
61.9
–46
1.15 + j5.70
2.37 – j2.18
12.8
53.9
247
62.5
–50
f
(MHz)
Zsource
()
Zin
()
1800
0.99 – j5.23
0.84 + j5.13
1840
1.13 – j5.22
1880
1.24 – j5.77
Zload
()
(2)
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
A2T18H455W23NR6
8
RF Device Data
Freescale Semiconductor, Inc.
P1dB -- TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 1840 MHz
0
0
E
--2
--3
P
51
52 51.5
--4
50.5 50
--5
--6
--1
48.5
IMAGINARY ()
IMAGINARY ()
--1
49.5
1
2
64
--3
3
REAL ()
4
5
--6
6
56
58
PP
54 52
50
1
0
2
3
REAL ()
4
5
6
Figure 8. P1dB Load Pull Ffficiency Contours (%)
0
0
--26 --24
20.5
--1
--1
20
--2
E
IMAGINARY ()
IMAGINARY ()
60
--4
Figure 7. P1dB Load Pull Output Power Contours (dBm)
19.5
--3
19
P
18.5
--4
17
0
1
2
--18
--3
P
--16
--4
--5
17.5
3
REAL ()
--20
E
--2
--22
--14
18
--5
--6
62
--5
49
0
E
E
--2
--12
--10
4
5
6
Figure 9. P1dB Load Pull Gain Contours (dB)
NOTE:
--6
0
1
2
3
REAL ()
4
5
6
Figure 10. P1dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T18H455W23NR6
RF Device Data
Freescale Semiconductor, Inc.
9
P3dB -- TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 1840 MHz
0
0
--1
--1
E
--2
--3
P
53
--4
IMAGINARY ()
IMAGINARY ()
50
52.5 52
51.5
51
--5
--6
50.5
50
2
1
0
3
REAL ()
4
0
1
2
E
17.5
--3
17
P
16.5
--4
16
--5
15
0
1
3
REAL ()
5
4
6
0
IMAGINARY ()
IMAGINARY ()
P
--32 --30 --28
--1
--2
56
58
Figure 12. P3dB Load Pull Efficiency Contours (%)
18.5
18
60
--4
--6
6
5
--1
--6
--3
62
--5
49.5
Figure 11. P3dB Load Pull Output Power Contours (dBm)
0
64
52
54
E
--2
2
--2
--24
E
--3
--22
P
--18
--20
--4
--16
--5
15.5
3
REAL ()
--26
4
6
5
Figure 13. P3dB Load Pull Gain Contours (dB)
NOTE:
--6
0
1
2
3
REAL ()
4
5
6
Figure 14. P3dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T18H455W23NR6
10
RF Device Data
Freescale Semiconductor, Inc.
0
0
--1
--1
--2
E
--3
P
53.5
54
--4
53
52
52.5
--5
--6
IMAGINARY ()
IMAGINARY ()
P1dB -- TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 1840 MHz
1
2
3
REAL ()
4
5
58
0
--1
--1
E
14.5
P
14
--4
54
--6
11 11.5
0
1
12 12.5
2
4
5
6
Figure 17. P1dB Load Pull Gain Contours (dB)
NOTE:
50
46
0
1
2
3
REAL ()
4
6
5
--40
--2
E
--3
P
--28
--32
--26
--4
--6
--30
--38
--36
--34
--24
--5
13
3
REAL ()
52
48
13.5
--5
56
Figure 16. P1dB Load Pull Ffficiency Contours (%)
0
--3
60
P
--4
--6
6
IMAGINARY ()
IMAGINARY ()
--3
51
Figure 15. P1dB Load Pull Output Power Contours (dBm)
--2
E
62
--5
51.5
0
--2
0
1
2
3
REAL ()
4
5
6
Figure 18. P1dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T18H455W23NR6
RF Device Data
Freescale Semiconductor, Inc.
11
P3dB -- TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 1840 MHz
0
--1
0
51.5
52
--1
E
--3
P
55
54.5
--4
54
53.5
--5
52
--6
IMAGINARY ()
IMAGINARY ()
60
--2
0
1
2
4
5
--1
--1
P
E
12
--4
11.5
--5
9
--6
IMAGINARY ()
0
--3
0
10 10.5
9.5
1
2
56
54
52
1
2
48
3
REAL ()
4
--2
E
5
6
Figure 21. P3dB Load Pull Gain Contours (dB)
NOTE:
6
--48
--46
--44
--3
P
--42
--40
--4
--38
--36
4
5
--50
--5
11
3
REAL ()
0
50
Figure 20. P3dB Load Pull Ffficiency Contours (%)
0
12.5
P
--4
--6
6
Figure 19. P3dB Load Pull Output Power Contours (dBm)
IMAGINARY ()
--3
58
46
3
REAL ()
--2
E
--5
53
52.5
--2
--6
0
1
2
3
REAL ()
--34
4
5
6
Figure 22. P3dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T18H455W23NR6
12
RF Device Data
Freescale Semiconductor, Inc.
PACKAGE DIMENSIONS
A2T18H455W23NR6
RF Device Data
Freescale Semiconductor, Inc.
13
A2T18H455W23NR6
14
RF Device Data
Freescale Semiconductor, Inc.
A2T18H455W23NR6
RF Device Data
Freescale Semiconductor, Inc.
15
PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS
Refer to the following resources to aid your design process.
Application Notes
 AN1907: Solder Reflow Attach Method for High Power RF Devices in Over--Molded Plastic Packages
 AN1955: Thermal Measurement Methodology of RF Power Amplifiers
Engineering Bulletins
 EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
 Electromigration MTTF Calculator
 .s2p File
Development Tools
 Printed Circuit Boards
To Download Resources Specific to a Given Part Number:
1. Go to http://www.nxp.com/RF
2. Search by part number
3. Click part number link
4. Choose the desired resource from the drop down menu
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
0
May 2016
Description
 Initial Release of Data Sheet
A2T18H455W23NR6
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RF Device Data
Freescale Semiconductor, Inc.
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