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RT8011/A
2A, 4MHz, Synchronous Step-Down Regulator
General Description
Features
The RT8011/A is a high efficiency synchronous, step-down
DC/DC converter. Its input voltage range is from 2.6V to
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5.5V and provides an adjustable regulated output voltage
from 0.8V to 5V while delivering up to 2A of output current.
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The internal synchronous low on-resistance power
switches increase efficiency and eliminate the need for
an external Schottky diode. Switching frequency is set
by an external resistor or can be synchronized to an
external clock. 100% duty cycle provides low dropout
operation extending battery life in portable systems.
Current mode operation with external compensation
allows the transient response to be optimized over a wide
range of loads and output capacitors.
RT8011/A operation in forced continuous PWM Mode which
minimizes ripple voltage and reduces the noise and RF
interference.
100% duty cycle in Low Dropout Operation further
maximize battery life.
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High Efficiency : Up to 95%
Low RDS(ON) Internal Switches : 110mΩ
Ω
Programmable Frequency : 300kHz to 4MHz
No Schottky Diode Required
0.8V Reference Allows Low Output Voltage
Forced Continuous Mode Operation
Low Dropout Operation : 100% Duty Cycle
Synchronizable Switching Frequency (For RT8011
Only)
Power Good Output Voltage Monitor (For RT8011
Only)
RoHS Compliant and 100% Lead (Pb)-Free
Applications
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Portable Instruments
Battery-Powered Equipment
Notebook Computers
Distributed Power Systems
IP Phones
Digital Cameras
Ordering Information
Pin Configurations
RT8011/A
Package Type
F : MSOP-10 (RT8011)
QW : WDFN-10L 3x3 (RT8011)
QW : WDFN-8EL 3x3 (RT8011A)
(TOP VIEW)
SHDN/RT
SYNC
GND
LX
PGND
Lead Plating System
P : Pb Free
G : Green (Halogen Free and Pb Free)
10
2
9
3
8
4
7
5
6
COMP
FB
PGOOD
VDD
PVDD
MSOP-10
Without SYNC and PGOOD Function
With SYNC and PGOOD Function
Richtek products are :
`
1
2
3
4
5
10
9
8
7
COMP
FB
PGOOD
VDD
PVDD
SHDN/RT
GND
LX
PGND
1
2
3
4
8
7
6
5
COMP
FB
VDD
PVDD
RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.
`
SHDN/RT
SYNC
GND
LX
PGND
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Note :
WDFN-10L 3x3
WDFN-8EL 3x3
Suitable for use in SnPb or Pb-free soldering processes.
Marking Information
For marking information, contact our sales representative
directly or through a Richtek distributor located in your
area.
DS8011/A-02 March 2011
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RT8011/A
Typical Application Circuit
VIN
2.6V to 5.5V
ROSC
332k
RT8011
1 SHDN/RT
COMP
2 SYNC
3
4
5
FB
10
LX
VDD
PGND
PVDD
CCOMP
1000pF
R2 240k
9
PGOOD 8
GND
RCOMP
13k
RPGOOD
100k
7
6
CIN
22uF
R1
510k
C1
22pF
L1
2.2uH
VOUT
COUT
22uF
2.5V/2A
Figure 1. Typical Application Circuit for RT8011
VIN
2.6V to 5.5V
ROSC
332k
RT8011A
1 SHDN/RT
2
3
4
COMP
GND
FB
LX
PGND
VDD
PVDD
8
RCOMP
13k
CCOMP
1000pF
R2 240k
7
6
5
CIN
22uF
R1
510k
L1
2.2uH
VOUT
COUT
22uF
2.5V/2A
Figure 2. Typical Application Circuit for RT8011A
Note : Using all Ceramic Capacitors
Table 1
Component Supplier Series
Inductance (μH) DCR (mΩ) Current Rating (mA) Dimensions (mm)
TAIYO YUDEN
NR 4018
2.2
60
2700
4x4x1.8
Sumida
CDRH4D28
2.2
31.3
2040
4.5x4.5x3
GOTREND
GTSD53
2.2
29
2410
5x5x2.8
ABC
SR0403
2.2
47
2600
4.5x4x3.2
Table 2
Component Supplier
TDK
TDK
TDK
Panasonic
Panasonic
Panasonic
TAIYO YUDEN
TAIYO YUDEN
TAIYO YUDEN
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Part No.
C3225X5R0J226M
C3225X5R0J226M
C2012X5R0J106M
ECJ4YB0J226M
ECJ4YB1A226M
ECJ4YB1A106M
LMK325BJ226ML
JMK316BJ226ML
JMK212BJ106ML
Capacitance (μF)
22
22
10
22
22
10
22
22
10
Case Size
1210
1210
0805
1210
1210
1210
1210
1206
0805
DS8011/A-02 March 2011
RT8011/A
Layout Guide
CIN must be placed between
VDD and GND as closer as
possible
VIN
Output capacitor must
be near RT8011
GND
CIN
COUT
VOUT
RT8011
5
PGND
VDD
7
4
LX
PGOOD
8
3
GND
FB
9
2
SYNC
10
1
SHDN/RT
COMP
R1
CF
R2
L1
PVDD
6
RCOMP
CIN must be placed between
VDD and GND as closer as
possible
LX should be
connected to
Inductor by wide
and short trace,
keep sensitive
compontents away
from this trace
VIN
COUT
VOUT
RT8011A
R1
CF
CCOMP
VOUT
GND
CIN
R2
L1
PVDD
5
4
PGND
VDD
6
3
LX
FB
7
2
GND
COMP
8
1
SHDN/RT
VIN
ROSC
Output capacitor must
be near RT8011A
RCOMP
LX should be
connected to
Inductor by wide
and short trace,
keep sensitive
compontents away
from this trace
ROSC
CCOMP
VOUT
GND
Connect the FB pin directly to feedback resistors. The
resistor divider must be connected between V OUT and
GND.
Figure 3. RT8011 Layout Guide
GND
Connect the FB pin directly to feedback resistors. The
resistor divider must be connected between V OUT and
GND.
Figure 4. RT8011A Layout Guide
Functional Pin Description
Pin Number
RT8011
RT8011A
Pin Function
Pin Name
Oscillator Resistor Input. Connecting a resistor to ground from this pin sets
1
1
SHDN/RT
the switching frequency. Forcing this pin to VDD causes the device to be shut
down.
External Clock Synchronization Input. The oscillation frequency can be
2
--
SYNC
synchronized to an external oscillation applied to this pin. When tied to VDD,
internal oscillator is selected.
Signal Ground. All small-signal components and compensation components
3
2
GND
4
3
LX
Internal Power MOSFET Switches Output. Connect this pin to the inductor.
5
4
PGND
Power Ground. Connect this pin close to the (−) terminal of CIN and COUT.
6
5
PVDD
Power Input Supply. Decouple this pin to PGND with a capacitor.
7
6
VDD
8
--
PGOOD
9
7
FB
should connect to this ground, which in turn connects to PGND at one point.
Signal Input Supply. Decouple this pin to GND with a capacitor. Normally VDD
is equal to PVDD.
Power Good Indicator. Open-drain logic output that is pulled to ground when
the output voltage is not within ±12.5% of regulation point.
Feedback Pin. Receives the feedback voltage from a resistive divider
connected across the output.
Error Amplifier Compensation Point. The current comparator threshold
10
8
COMP
increases with this control voltage. Connect external compensation elements
to this pin to stabilize the control loop.
DS8011/A-02 March 2011
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RT8011/A
Function Block Diagram
SHDN/RT
SD
PVDD
ISEN
OSC
SYNC
Slope
Com
COMP
0.8V
EA
FB
Output
Clamp
OC
Limit
Driver
Int-SS
LX
0.9V
Control
Logic
0.7V
NISEN
POR
PGND
NMOS I Limit
0.4V
PGOOD
OTP
VREF
GND
VDD
RT8011
SHDN/RT
SD
PVDD
ISEN
OSC
Slope
Com
COMP
0.8V
FB
EA
Output
Clamp
OC
Limit
Driver
Int-SS
LX
0.9V
Control
Logic
0.7V
NISEN
POR
PGND
NMOS I Limit
0.4V
VREF
OTP
GND
VDD
RT8011A
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DS8011/A-02 March 2011
RT8011/A
Operation
Main Control Loop
The RT8011/A is a monolithic, constant-frequency, current
mode step-down DC/DC converter. During normal
operation, the internal top power switch (P-Channel
MOSFET) is turned on at the beginning of each clock
cycle. Current in the inductor increases until the peak
inductor current reach the value defined by the voltage on
the COMP pin. The error amplifier adjusts the voltage on
the COMP pin by comparing the feedback signal from a
resistor divider on the FB pin with an internal 0.8V
reference. When the load current increases, it causes a
reduction in the feedback voltage relative to the reference.
The error amplifier raises the COMP voltage until the
average inductor current matches the new load current.
When the top power MOSFET shuts off, the synchronous
power switch (N-Channel MOSFET) turns on until either
the bottom current limit is reached or the beginning of the
next clock cycle.
The operating frequency is set by an external resistor
connected between the RT pin and ground. The practical
switching frequency can range from 300kHz to 4MHz.
Power Good comparators will pull the PGOOD output low
if the output voltage comes out of regulation by 12.5%. In
an over-voltage condition, the top power MOSFET is turned
off and the bottom power MOSFET is switched on until
either the over-voltage condition clears or the bottom
MOSFET's current limit is reached.
Frequency Synchronization
The internal oscillator of the RT8011 can be synchronized
to an external clock connected to the SYNC pin. The
frequency of the external clock can be in the range of
300kHz to 4MHz. For this application, the oscillator timing
resistor should be chosen to correspond to a frequency
that is about 20% lower than the synchronization
frequency.
The output voltage will then be determined by the input
voltage minus the voltage drop across the internal
P-Channel MOSFET and the inductor.
Low Supply Operation
The RT8011/A is designed to operate down to an input
supply voltage of 2.6V. One important consideration at
low input supply voltages is that the R DS(ON) of the
P-Channel and N-Channel power switches increases. The
user should calculate the power dissipation when the
RT8011/A is used at 100% duty cycle with low input
voltages to ensure that thermal limits are not exceeded.
Slope Compensation and Inductor Peak Current
Slope compensation provides stability in constant
frequency architectures by preventing sub-harmonic
oscillations at duty cycles greater than 50%. It is
accomplished internally by adding a compensating ramp
to the inductor current signal. Normally, the maximum
inductor peak current is reduced when slope compensation
is added. In the RT8011/A, however, separated inductor
current signals are used to monitor over current condition.
This keeps the maximum output current relatively constant
regardless of duty cycle.
Short-Circuit Protection
When the output is shorted to ground, the inductor current
decays very slowly during a single switching cycle. A
current runaway detector is used to monitor inductor
current. As current increasing beyond the control of current
loop, switching cycles will be skipped to prevent current
runaway from occurring.
Dropout Operation
When the input supply voltage decreases toward the output
voltage, the duty cycle increases toward the maximum
on-time. Further reduction of the supply voltage forces
the main switch to remain on for more than one cycle
eventually reaching 100% duty cycle.
DS8011/A-02 March 2011
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RT8011/A
Absolute Maximum Ratings
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(Note 1)
Supply Input Voltage, VDD, PVDD ---------------------------------------------------------------------------- −0.3V to 6V
LX Pin Switch Voltage -------------------------------------------------------------------------------------------- −0.3V to (PVDD + 0.3V)
Other I/O Pin Voltages ------------------------------------------------------------------------------------------- −0.3V to (VDD + 0.3V)
LX Pin Switch Current -------------------------------------------------------------------------------------------- 4A
Power Dissipation, PD @ TA = 25°C
MSOP-10 ------------------------------------------------------------------------------------------------------------ 467mW
WDFN-10L 3x3 ----------------------------------------------------------------------------------------------------- 909mW
WDFN-8EL 3x3 ---------------------------------------------------------------------------------------------------- 909mW
Package Thermal Resistance (Note 2)
MSOP-10, θJA ------------------------------------------------------------------------------------------------------ 214°C/W
WDFN-10L 3x3, θJA ----------------------------------------------------------------------------------------------- 110°C/W
WDFN-8EL 3x3, θJA ----------------------------------------------------------------------------------------------- 110°C/W
Junction Temperature --------------------------------------------------------------------------------------------- 150°C
Lead Temperature (Soldering, 10 sec.) ----------------------------------------------------------------------- 260°C
Storage Temperature Range ------------------------------------------------------------------------------------ −65°C to 150°C
ESD Susceptibility (Note 3)
HBM (Human Body Mode) -------------------------------------------------------------------------------------- 2kV
MM (Machine Mode) ---------------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions
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(Note 4)
Supply Input Voltage ---------------------------------------------------------------------------------------------- 2.6V to 5.5V
Junction Temperature Range ------------------------------------------------------------------------------------ −40°C to 125°C
Ambient Temperature Range ------------------------------------------------------------------------------------ −40°C to 85°C
Electrical Characteristics
(VDD = 3.3V, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Input Voltage Range
V DD
2.6
--
5.5
V
Feedback Voltage
V FB
0.784
0.8
0.816
V
Active , V FB = 0.78V, Not Switching
--
460
--
μA
Shutdown
--
--
1
μA
Output Voltage Line Regulation
VIN = 2.7V to 5.5V
--
0.04
--
%/V
Output Voltage Load Regulation
0A < ILOAD < 2A
--
0.25
--
%
DC Bias Current
Error Amplifier
Transconductance
gm
--
800
--
μs
Current Sense Transresistance
RT
--
0.4
--
Ω
Power Good Range
--
±12.5
±15
%
Power Good Pull-Down
Resistance
--
--
120
Ω
To be continued
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DS8011/A-02 March 2011
RT8011/A
Parameter
Symbol
Switching Frequency
Test Conditions
Min
Typ
Max
Unit
ROSC = 332k
0.8
1
1.2
MHz
Switching Frequency
0.3
--
4
MHz
0.3
--
4
MHz
Sync Frequency Range
Switch On Resistance, High
RPMOS
ISW = 0.5A
--
110
160
mΩ
Switch On Resistance, Low
RNMOS
ISW = 0.5A
--
110
170
mΩ
Peak Current Limit
ILIM
2.2
3.2
--
A
VDD Rising
--
2.4
--
V
VDD Falling
--
2.3
--
V
Under Voltage Lockout
Threshold
Shutdown Threshold
--
VIN − 0.7 VIN − 0.4
V
Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θJA is measured in the natural convection at TA = 25°C on a effective single layer thermal conductivity test board of
JEDEC thermal measurement standard.
Note 3. Devices are ESD sensitive. Handling precaution recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
DS8011/A-02 March 2011
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7
RT8011/A
Typical Operating Characteristics
Output Voltage vs. Output Current
Efficiency vs. Output Current
100
1.810
90
1.808
1.806
Output Voltage (V)
80
VIN = 5V, VOUT = 1.8V
70
Efficiency (%)
VIN = 3.3V
VIN = 3.3V, VOUT = 1.8V
60
50
40
30
1.804
1.802
1.800
1.798
1.796
20
1.794
10
1.792
1.790
0
0
250
500
0
750 1000 1250 1500 1750 2000 2250
250
500
Output Current (mA)
Peak Current Limited vs. Input Voltage
4.0
1100
VOUT = 2.5V
Peak Current Limited (A)
VIN = 3.3V, VOUT = 1.8V
IOUT = 0A
1080
1060
1040
1020
3.5
3.0
2.5
2.0
1000
-50
-25
0
25
50
75
100
3
125
3.25 3.5 3.75
4
4.25 4.5 4.75
5
5.25 5.5
Input Voltage (V)
Temperature (°C)
Quiescent Current vs. Input Voltage
Quiescent Current vs. Temperature
550
500
530
480
Quiescent Current (uA)
Quiescent Current (uA)
1000 1250 1500 1750 2000
Output Current (mA)
Frequency vs. Temperature
Frequency (kHz)
750
510
490
470
450
VIN = 3.3V
460
440
420
400
3
3.25 3.5 3.75
4
4.25 4.5 4.75
Input Voltage (V)
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8
5
5.25 5.5
-50
-25
0
25
50
75
100
125
Temperature (°C)
DS8011/A-02 March 2011
RT8011/A
Output Voltage vs. Temperature
1.820
VREF vs. Input Voltage
0.805
VIN = 3.3V
1.815
1.805
V REF (V)
Output Voltage (V)
0.804
1.810
1.800
1.795
0.803
0.802
1.790
0.801
1.785
0.800
1.780
-50
-25
0
25
50
75
100
3
125
Temperature (°C)
4
4.25 4.5 4.75
5.25 5.5
Load Transient Response
VIN = 3.3V, VOUT = 2.5V
IOUT = 0A to 2A
VIN = 3.3V, VOUT = 2.5V
IOUT = 1A to 2A
VOUT
(50mV/Div)
VOUT
(50mV/Div)
ILX
(1A/Div)
ILX
(1A/Div)
Time (50μs/Div)
Time (50μs/Div)
Output Ripple
Output Ripple
VIN = 3.3V, VOUT = 2.5V
IOUT = 2A
VIN = 5V, VOUT = 2.5V
IOUT = 2A
VOUT
(10mV/Div)
VOUT
(10mV/Div)
VLX
(5V/Div)
VLX
(5V/Div)
ILX
(2A/Div)
ILX
(2A/Div)
Time (250ns/Div)
5
Input Voltage (V)
Load Transient Response
DS8011/A-02 March 2011
3.25 3.5 3.75
Time (250ns/Div)
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9
RT8011/A
Power Good
Power On & Inductor Current
VIN = 3.3V, VOUT = 2.5V
IOUT = 2A
VIN
(2V/Div)
PGOOD
(2V/Div)
VIN = 3.3V, VOUT = 2.5V
IOUT = 2A
VIN
(2V/Div)
VOUT
(2V/Div)
VLX
(5V/Div)
VOUT
(2V/Div)
ILX
(2A/Div)
ILX
(2A/Div)
Time (1ms/Div)
Time (1ms/Div)
Power On & Inductor Current
Soft Start and Inrush Current
VIN = 5V, VOUT = 2.5V
IOUT = 2A
VIN = 3.3V, VOUT = 2.5V
IOUT = 2A
VIN
(2V/Div)
VLX
(5V/Div)
VIN
(2V/Div)
VOUT
(2V/Div)
VLX
(5V/Div)
VOUT
(2V/Div)
I IN
(2A/Div)
ILX
(2A/Div)
Time (1ms/Div)
Time (2.5ms/Div)
Soft Start and Inrush Current
VIN = 5V, VOUT = 2.5V
IOUT = 2A
VIN
(2V/Div)
VLX
(5V/Div)
VOUT
(2V/Div)
I IN
(2A/Div)
Time (2.5ms/Div)
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DS8011/A-02 March 2011
RT8011/A
Application Information
The basic RT8011/A application circuit is shown in Typical
Application Circuit. External component selection is
determined by the maximum load current and begins with
the selection of the inductor value and operating frequency
followed by CIN and COUT.
The transition from low current operation begins when the
peak inductor current falls below the minimum peak
current. Lower inductor values result in higher ripple current
which causes this to occur at lower load currents. This
causes a dip in efficiency in the upper range of low current
operation.
Operating Frequency
The operating frequency of the RT8011/A is determined
by an external resistor that is connected between the RT
pin and ground. The value of the resistor sets the ramp
current that is used to charge and discharge an internal
timing capacitor within the oscillator. The RT resistor value
can be determined by examining the frequency vs. RT
curve. Although frequencies as high as 4MHz are possible,
the minimum on-time of the RT8011/A imposes a minimum
limit on the operating duty cycle. The minimum on-time
is typically 110ns. Therefore, the minimum duty cycle is
equal to 100 x 110ns x f(Hz).
Inductor Selection
For a given input and output voltage, the inductor value
and operating frequency determine the ripple current. The
ripple current ΔIL increases with higher VIN and decreases
with higher inductance.
⎡V
⎤⎡ V
⎤
ΔIL = ⎢ OUT ⎥ ⎢1 − OUT ⎥
VIN ⎦
⎣ f × L ⎦⎣
Having a lower ripple current reduces the ESR losses in
the output capacitors and the output voltage ripple. Highest
efficiency operation is achieved at low frequency with small
ripple current. This, however, requires a large inductor. A
reasonable starting point for selecting the ripple current
is ΔI = 0.4(IMAX). The largest ripple current occurs at the
highest VIN. To guarantee that the ripple current stays
below a specified maximum, the inductor value should be
chosen according to the following equation :
⎡ VOUT ⎤ ⎡
VOUT ⎤
L=⎢
1−
⎥
⎥
⎢
⎣ f × ΔIL(MAX) ⎦ ⎣ VIN(MAX) ⎦
DS8011/A-02 March 2011
4
3.5
Frequency (MHz)
Selection of the operating frequency is a tradeoff between
efficiency and component size. High frequency operation
allows the use of smaller inductor and capacitor values.
Operation at lower frequency improves efficiency by
reducing internal gate charge and switching losses but
requires larger inductance and/or capacitance to maintain
low output ripple voltage.
4.5
3
RT = 154k for 2MHz
2.5
2
1.5
RT = 332k for 1MHz
1
0.5
0
0
100 200 300 400 500 600 700 800 900 100
1000
0
(kΩ))
RRT
RT (k
Figure 5
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite or mollypermalloy
cores. Actual core loss is independent of core size for a
fixed inductor value but it is very dependent on the
inductance selected. As the inductance increases, core
losses decrease. Unfortunately, increased inductance
requires more turns of wire and therefore copper losses
will increase.
Ferrite designs have very low core losses and are preferred
at high switching frequencies, so design goals can
concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard”, which means that
inductance collapses abruptly when the peak design
current is exceeded.
This result in an abrupt increase in inductor ripple current
and consequent output voltage ripple.
Do not allow the core to saturate!
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RT8011/A
Different core materials and shapes will change the size/
current and price/current relationship of an inductor. Toroid
or shielded pot cores in ferrite or permalloy materials are
small and don't radiate energy but generally cost more
than powdered iron core inductors with similar
characteristics. The choice of which style inductor to use
mainly depends on the price vs. size requirements and
any radiated field/EMI requirements.
use types that have been surge tested for use in switching
power supplies. Aluminum electrolytic capacitors have
significantly higher ESR but can be used in cost-sensitive
applications provided that consideration is given to ripple
current ratings and long term reliability. Ceramic capacitors
have excellent low ESR characteristics but can have a
high voltage coefficient and audible piezoelectric effects.
The high Q of ceramic capacitors with trace inductance
can also lead to significant ringing.
CIN and COUT Selection
The input capacitance, C IN, is needed to filter the
trapezoidal current at the source of the top MOSFET. To
prevent large ripple voltage, a low ESR input capacitor
sized for the maximum RMS current should be used. RMS
current is given by :
V
VIN
IRMS = IOUT(MAX) OUT
−1
VIN
VOUT
This formula has a maximum at VIN = 2VOUT, where
I RMS = I OUT/2. This simple worst-case condition is
commonly used for design because even significant
deviations do not offer much relief. Note that ripple current
ratings from capacitor manufacturers are often based on
only 2000 hours of life which makes it advisable to further
derate the capacitor, or choose a capacitor rated at a higher
temperature than required.
Using Ceramic Input and Output Capacitors
Several capacitors may also be paralleled to meet size or
height requirements in the design.
Output Voltage Programming
The selection of COUT is determined by the effective series
resistance (ESR) that is required to minimize voltage ripple
and load step transients, as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
the load transient response as described in a later section.
The output ripple, ΔVOUT, is determined by :
⎡
1 ⎤
ΔVOUT ≤ ΔIL ⎢ESR +
8fCOUT ⎥⎦
⎣
The output ripple is highest at maximum input voltage
since ΔIL increases with input voltage. Multiple capacitors
placed in parallel may be needed to meet the ESR and
RMS current handling requirements. Dry tantalum, special
polymer, aluminum electrolytic and ceramic capacitors are
all available in surface mount packages. Special polymer
capacitors offer very low ESR but have lower capacitance
density than other types. Tantalum capacitors have the
highest capacitance density but it is important to only
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12
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input, VIN. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
part.
The output voltage is set by an external resistive divider
according to the following equation :
VOUT = VREF × ⎛⎜1 + R1 ⎞⎟
⎝ R2 ⎠
where VREF equals to 0.8V typical.
The resistive divider allows the FB pin to sense a fraction
of the output voltage as shown in Figure 6.
VOUT
R1
VFB
RT8011/A
R2
GND
Figure 6. Setting the Output Voltage
DS8011/A-02 March 2011
RT8011/A
Efficiency Considerations
The efficiency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as :
Efficiency = 100% − (L1+ L2+ L3+ ...) where L1, L2, etc.
are the individual losses as a percentage of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
losses: VDD quiescent current and I2R losses.
The VDD quiescent current loss dominates the efficiency
loss at very low load currents whereas the I2R loss
dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve
at very low load currents can be misleading since the
actual power lost is of no consequence.
1. The VDD quiescent current is due to two components :
the DC bias current as given in the electrical characteristics
and the internal main switch and synchronous switch gate
charge currents. The gate charge current results from
switching the gate capacitance of the internal power
MOSFET switches. Each time the gate is switched from
high to low to high again, a packet of charge ΔQ moves
from VDD to ground. The resulting ΔQ/Δt is the current out
of VDD that is typically larger than the DC bias current. In
continuous mode, IGATECHG = f(QT+QB) where QT and QB
are the gate charges of the internal top and bottom
switches.
Both the DC bias and gate charge losses are proportional
to VDD and thus their effects will be more pronounced at
higher supply voltages.
2. I2R losses are calculated from the resistances of the
internal switches, RSW and external inductor RL. In
continuous mode the average output current flowing
through inductor L is “chopped” between the main switch
and the synchronous switch. Thus, the series resistance
looking into the LX pin is a function of both top and bottom
MOSFET RDS(ON) and the duty cycle (D) as follows :
RSW = RDS(ON)TOP x D + RDS(ON)BOT x (1"D) The RDS(ON)
for both the top and bottom MOSFETs can be obtained
from the Typical Performance Characteristics curves. Thus,
to obtain I2R losses, simply add RSW to RL and multiply
DS8011/A-02 March 2011
the result by the square of the average output current.
Other losses including CIN and COUT ESR dissipative
losses and inductor core losses generally account for less
than 2% of the total loss.
Thermal Considerations
In most applications, the RT8011/A does not dissipate
much heat due to its high efficiency. But, in applications
where the RT8011/A is running at high ambient
temperature with low supply voltage and high duty cycles,
such as in dropout, the heat dissipated may exceed the
maximum junction temperature of the part. If the junction
temperature reaches approximately 150°C, both power
switches will be turned off and the SW node will become
high impedance. To avoid the RT8011/A from exceeding
the maximum junction temperature, the user will need to
do some thermal analysis. The goal of the thermal analysis
is to determine whether the power dissipated exceeds
the maximum junction temperature of the part. The
temperature rise is given by : TR = PD x θJA Where PD is
the power dissipated by the regulator and θJA is the thermal
resistance from the junction of the die to the ambient
temperature. The junction temperature, TJ, is given by :
TJ = TA + TR Where TA is the ambient temperature.
As an example, consider the RT8011/A in dropout at an
input voltage of 3.3V, a load current of 2A and an ambient
temperature of 70°C. From the typical performance graph
of switch resistance, the RDS(ON) of the P-Channel switch
at 70°C is approximately 121mΩ. Therefore, power
dissipated by the part is :
PD = (ILOAD)2 (RDS(ON)) = (2A)2 (121mΩ) = 0.484W
For the DFN3x3 package, the θJA is 110°C/W. Thus the
junction temperature of the regulator is : TJ = 70°C +
(0.484W) (110°C/W) = 123.24°C Which is below the
maximum junction temperature of 125°C. Note that at
higher supply voltages, the junction temperature is lower
due to reduced switch resistance (RDS(ON)).
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to ΔILOAD(ESR), where ESR is the effective series
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13
RT8011/A
resistance of COUT. ΔILOAD also begins to charge or
discharge COUT generating a feedback error signal used
by the regulator to return VOUT to its steady-state value.
During this recovery time, VOUT can be monitored for
overshoot or ringing that would indicate a stability problem.
The COMP pin external components and output capacitor
shown in Typical Application Circuit will provide adequate
compensation for most applications.
Layout Considerations
Follow the PCB layout guidelines for optimal performance
of RT8011/A.
Figure 7. RT8011 Demo Board
` A ground plane is recommended. If a ground plane layer
is not used, the signal and power grounds should be
segregated with all small-signal components returning
to the GND pin at one point that is then connected to
the PGND pin close to the IC. The exposed pad should
be connected to GND.
` Connect the terminal of the input capacitor(s), CIN, as
close as possible to the PVDD pin. This capacitor
provides the AC current into the internal power
MOSFETs.
` LX node is with high frequency voltage swing and should
be kept small area. Keep all sensitive small-signal nodes
away from LX node to prevent stray capacitive noise
pick-up.
Figure 8. RT8011A Demo Board (Only WDFN-8EL 3x3)
` Flood all unused areas on all layers with copper.
Flooding with copper will reduce the temperature rise
of powercomponents.
You can connect the copper areas to any DC net (PVDD,
VDD, VOUT, PGND, GND, or any other DC rail in your
system).
` Connect the FB pin directly to the feedback resistors.
The resistor divider must be connected between VOUT
and GND.
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DS8011/A-02 March 2011
RT8011/A
Outline Dimension
D2
D
L
E
E2
1
e
SEE DETAIL A
b
2
1
2
1
A
A1
A3
DETAIL A
Pin #1 ID and Tie Bar Mark Options
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.180
0.300
0.007
0.012
D
2.950
3.050
0.116
0.120
D2
2.200
2.700
0.087
0.106
E
2.950
3.050
0.116
0.120
E2
1.450
1.750
0.057
0.069
e
L
0.500
0.350
0.020
0.450
0.014
0.018
W-Type 8EL DFN 3x3 Package (0.5mm Lead Pitch)
DS8011/A-02 March 2011
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15
RT8011/A
D2
D
L
E
E2
1
e
SEE DETAIL A
b
2
1
2
1
A
A1
A3
DETAIL A
Pin #1 ID and Tie Bar Mark Options
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.180
0.300
0.007
0.012
D
2.950
3.050
0.116
0.120
D2
2.300
2.650
0.091
0.104
E
2.950
3.050
0.116
0.120
E2
1.500
1.750
0.059
0.069
e
L
0.500
0.350
0.020
0.450
0.014
0.018
W-Type 10L DFN 3x3 Package
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16
DS8011/A-02 March 2011
RT8011/A
D
L
E1
E
e
A2
A
A1
b
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
0.810
1.100
0.032
0.043
A1
0.000
0.150
0.000
0.006
A2
0.750
0.950
0.030
0.037
b
0.170
0.270
0.007
0.011
D
2.900
3.100
0.114
0.122
e
0.500
0.020
E
4.800
5.000
0.189
0.197
E1
2.900
3.100
0.114
0.122
L
0.400
0.800
0.016
0.031
10-Lead MSOP Plastic Package
Richtek Technology Corporation
Richtek Technology Corporation
Headquarter
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
5F, No. 95, Minchiuan Road, Hsintien City
Hsinchu, Taiwan, R.O.C.
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)86672399 Fax: (8862)86672377
Email: marketing@richtek.com
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
DS8011/A-02 March 2011
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