IRF IRL630

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PD -9.1255
IRL630
HEXFET ® Power MOSFET
Dynamic dv/dt Rating
Repetitive Avalanche Rated
Logic-Level Gate Drive
RDS(ON) Specified at V GS = 4V & 5V
150°C Operating Temperature
Fast Switching
Ease of paralleling
VDSS = 200V
RDS(on) = 0.40 Ω
ID = 9.0A
Description
Third Generation HEXFETs from International Rectifier provide the designer
with the best combination of fast switching, ruggedized device design, low onresistance and cost-effectiveness.
The TO-220 package is universally preferred for all commercial-industrial
applications at power dissipation levels to approximately 50 watts. The low
thermal resistance and low package cost of the TO-220 contribute to its wide
acceptance throughout the industry.
Absolute Maximum Ratings
ID @ T C = 25°C
ID @ T C = 100°C
IDM
PD @T C = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Parameter
Max.
Continuous Drain Current, V GS @ 5.0V
Continuous Drain Current, V GS @ 5.0V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw.
9.0
5.7
36
74
0.59
±10
250
9.0
7.4
5.0
-55 to + 150
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case)
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
To Order
Min.
Typ.
Max.
Units
––––
––––
––––
––––
0.50
––––
1.7
––––
62
°C/W
Revision 0
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IRL630
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
∆V(BR)DSS/∆TJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
RDS(ON)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
V(BR)DSS
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
LD
Internal Drain Inductance
LS
Internal Source Inductance
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
IGSS
Min.
200
–––
–––
–––
1.0
4.8
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.27
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
8.0
57
38
33
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, I D = 1mA
0.40
VGS = 5.0V, I D = 5.4A
Ω
0.50
VGS = 4.0V, I D = 4.5A
2.0
V
VDS = VGS, ID = 250µA
–––
S
VDS = 50V, ID = 5.4A
25
VDS = 200V, VGS = 0V
µA
250
VDS = 160V, VGS = 0V, T J = 125°C
100
VGS = 10V
nA
-100
VGS = -10V
40
ID = 9.0A
5.5
nC
VDS = 160V
24
VGS = 10V, See Fig. 6 and 13
–––
VDD = 100V
ns
–––
ID = 9.0A
–––
RG = 6.0Ω
–––
RD = 11Ω, See Fig. 10
Between lead,
––– 4.5 –––
6mm (0.25in.)
nH
from package
––– 7.5 –––
and center of die contact
––– 1100 –––
VGS = 0V
––– 220 –––
pF
VDS = 25V
––– 70
–––
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
–––
–––
9.0
–––
–––
36
–––
–––
–––
–––
230
1.7
2.0
350
2.6
A
V
ns
µC
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
TJ = 25°C, I S = 9.0A, V GS = 0V
TJ = 25°C, I F = 9.0A
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by L
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
ISD ≤ 9.0A, di/dt ≤ 120A/µs, V DD ≤ V(BR)DSS,
T J ≤ 150°C
VDD = 25V, starting T J = 25°C, L = 4.6mH
R G = 25Ω, IAS = 9.0A. (See Figure 12)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
To Order
S+LD)
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IRL630
100
VGS
7.50V
5.00V
4.00V
3.50V
3.00V
2.75V
2.50V
BOTTOM 2.25V
I , Drain-to-Source Current (A)
D
I , Drain-to-Source Current (A)
D
TOP
10
1
2.25V
20µs PULSE WIDTH
Tc = 25°C
0.1
0.1
1
10
100
A
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics,
TC = 25oC
Fig 2. Typical Output Characteristics,
TC = 150oC
R DS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
100
10
TJ = 150°C
1
TJ = 25°C
0.1
VDS = 50V
20µs PULSE WIDTH
0.01
2.0
2.5
3.0
3.5
4.0
4.5
A
5.0
2.5
ID = 9.0A
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VGS , Gate-to-Source Voltage (V)
VGS = 5.0V
0
20
40
60
TJ , Junction Temperature (°C)
Fig 3. Typical Transfer Characteristics
To Order
A
80 100 120 140 160
Fig 4. Normalized On-Resistance
Vs. Temperature
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IRL630
10
V GS = 0V,
f = 1MHz
Ciss = Cgs + C gd , Cds SHORTED
Crss = C gd
Coss = Cds + C gd
V GS , Gate-to-Source Voltage (V)
C, Capacitance (pF)
2000
1500
Ciss
1000
Coss
500
Crss
1
10
VDS = 160V
VDS = 100V
VDS = 40V
8
6
4
2
A
0
I D = 9.0A
FOR TEST CIRCUIT
SEE FIGURE 13
0
100
0
VDS , Drain-to-Source Voltage (V)
20
30
40
A
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
100
OPERATION IN THIS AREA LIMITED
BY R DS(on)
10µs
I D , Drain Current (A)
ISD , Reverse Drain Current (A)
10
10
TJ = 150°C
TJ = 25°C
1
10
100µs
1ms
1
10ms
100ms
VGS = 0V
0.1
0
0.4
0.8
1.2
A
TC = 25°C
TJ = 150°C
Single Pulse
0.1
1.6
1
10
100
VDS , Drain-to-Source Voltage (V)
V SD , Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 8. Maximum Safe Operating Area
To Order
10 00
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IRL630
RD
VDS
VGS
10
D.U.T.
RG
ID, Drain Current (Amps)
VDD
8
5.0 V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
6
Fig 10a. Switching Time Test Circuit
4
2
0
25
50
75
100
125
A
150
TC , Case Temperature (°C)
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
10
1
D = 0.50
0.20
0.10
0.1
PDM
0.05
t
0.02
0.01
t
2
N o te s :
1 . D u ty fa c to r D = t / t
1 2
SINGLE PULSE
(THERMAL RESPONSE)
0.01
0.00001
1
2 . P e a k TJ = P D M x Z th J C + T C
0.0001
0.001
0.01
0.1
1
t 1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
To Order
A
10 A
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5.0V
Fig 12a. Unclamped Inductive Test Circuit
EAS , Single Pulse Avalanche Energy (mJ)
IRL630
600
ID
9.0A
5.7A
BOTTOM 4.0A
TOP
500
400
300
200
100
0
VDD = 50V
25
50
A
75
100
125
150
Starting TJ , Juntion Temperature (°C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
5.0V
Fig 13a. Basic Gate Charge Waveform
To Order
Fig 13b. Gate Charge Test Circuit
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IRL630
Peak Diode Recovery dv/dt Test Circuit
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
RG
•
•
•
•
dv/dt controlled by R G
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
*
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
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IRL630
Package Outline
TO-220AB Outline
2.87 (.113)
2.62 (.103)
10.54 (.415)
10.29 (.405)
3.78 (.149)
3.54 (.139)
-A-
4
-B-
4.69 (.185)
4.20 (.165)
1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
15.24 (.600)
14.84 (.584)
1.15 (.045)
MIN
1
2
LEAD ASSIGNMENTS
1 - GATE
2 - DRAIN
3 - SOURCE
4 - DRAIN
3
3X
14.09 (.555)
13.47 (.530)
4.06 (.160)
3.55 (.140)
3X
3X
1.40 (.055)
1.15 (.045)
NOTES:
1 DIMENSIONS & TOLERANCING
PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH.
3 DIMENSIONS ARE SHOW N
MILLIMETERS (INCHES).
4 CONFORMS TO JEDEC OUTLINE
TO-220AB.
0.93 (.037)
0.69 (.027)
0.36 (.014)
3X
M B A M
0.55 (.022)
0.46 (.018)
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
CONFORMS TO JEDEC OUTLINE TO-220AB
Dimensions in Millimeters and (Inches)
Part Marking Information
TO-220AB
EXAMPLE: THIS IS AN IRF1010 WITH
ASSEMBLY LOT CODE 9B1M
INTERNATIONAL
RECTIFIER
LOGO
PART NUMBER
IRF1010
9246
9B
ASSEMBLY
LOT CODE
1M
DATE CODE
(YYWW)
YY = YEAR
WW = WEEK
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Data and specifications subject to change without notice.
To Order