PHILIPS TJA1055T/3

TJA1055
Enhanced fault-tolerant CAN transceiver
Rev. 04 — 17 February 2009
Product data sheet
1. General description
The TJA1055 is the interface between the protocol controller and the physical bus wires in
a Controller Area Network (CAN). It is primarily intended for low-speed applications up to
125 kBd in passenger cars. The device provides differential receive and transmit
capability but will switch to single-wire transmitter and/or receiver in error conditions. The
TJA1055 is the enhanced version of the TJA1054 and TJA1054A. TJA1055 has the same
functionality but in addition offering a number of improvements. The most important
improvements of the TJA1055 with respect to the TJA1054 and TJA1054A are:
•
•
•
•
Improved ElectroStatic Discharge (ESD) performance
Lower current consumption in sleep mode
Wake-up signalling on RXD and ERR without VCC active
3 V interfacing with microcontroller possible with TJA1055T/3
2. Features
2.1 Optimized for in-car low-speed communication
n
n
n
n
n
n
n
n
n
n
Pin-to-pin compatible with TJA1054 and TJA1054A
Baud rate up to 125 kBd
Up to 32 nodes can be connected
Supports unshielded bus wires
Very low ElectroMagnetic Emission (EME) due to built-in slope control function and a
very good matching of the CANL and CANH bus outputs
Very high ElectroMagnetic Immunity (EMI) in normal operating mode and in low power
modes
Fully integrated receiver filters
Transmit Data (TxD) dominant time-out function
High ESD robustness:
u ±8 kV Electrostatic Discharge (ESD) protection Human Body Model (HBM) for
off-board pins
u ±6 kV Electrostatic Discharge (ESD) protection IEC 61000-4-2 for off-board pins
Low-voltage microcontroller support
2.2 Bus failure management
n Supports single-wire transmission modes with ground offset voltages up to 1.5 V
n Automatic switching to single-wire mode in the event of bus failures, even when the
CANH bus wire is short-circuited to VCC
TJA1055
NXP Semiconductors
Enhanced fault-tolerant CAN transceiver
n Automatic reset to differential mode if bus failure is removed
n Full wake-up capability during failure modes
2.3 Protections
n
n
n
n
n
Bus pins short-circuit safe to battery and to ground
Thermally protected
Bus lines protected against transients in an automotive environment
An unpowered node does not disturb the bus lines
Microcontroller interface without reverse current paths, if unpowered
2.4 Support for low power modes
n Low current sleep mode and standby mode with wake-up via the bus lines
n Software accessible power-on reset flag
3. Quick reference data
Table 1.
Quick reference data
Symbol Parameter
Conditions
VCC
supply voltage
VBAT
battery supply voltage
no time limit
Typ Max
Unit
4.75
-
5.25
V
−0.3
-
+40
V
operating mode
5.0
-
40
V
load dump
-
-
58
V
IBAT
battery supply current
sleep mode at
VRTL = VWAKE = VINH =
VBAT = 14 V; Tamb =
−40 °C to +125 °C
-
25
40
µA
VCANH
voltage on pin CANH
VCC = 0 V to 5.0 V;
VBAT ≥ 0 V; no time limit;
with respect to any other
pin
−58
-
+58
V
VCANL
voltage on pin CANL
VCC = 0 V to 5.0 V;
VBAT ≥ 0 V; no time limit;
with respect to any other
pin
−58
-
+58
V
VO(dom)
dominant output voltage
VTXD = 0 V; VEN = VCC
on pin CANH
on pin CANL
tPD(L)
propagation delay TXD
(LOW) to RXD (LOW)
Tvj
virtual junction temperature
[1]
ICANH = −40 mA
VCC − 1.4 -
-
V
ICANL = 40 mA
-
-
1.4
V
-
-
1.5
µs
−40
-
+150 °C
no failures;
RCAN_L = RCAN_H =
125 Ω; CCAN_L =
CCAN_H = 1 nF;
see Figure 4 to Figure 6
[1]
Junction temperature in accordance with “IEC 60747-1”. An alternative definition is: Tvj = Tamb + P × Rth(vj-a)
where Rth(vj-a) is a fixed value to be used for the calculation of Tvj. The rating for Tvj limits the allowable
combinations of power dissipation (P) and operating ambient temperature (Tamb).
TJA1055_4
Product data sheet
Min
© NXP B.V. 2009. All rights reserved.
Rev. 04 — 17 February 2009
2 of 26
TJA1055
NXP Semiconductors
Enhanced fault-tolerant CAN transceiver
4. Ordering information
Table 2.
Ordering information
Type number
Package
TJA1055T
Name
Description
Version
SO14
plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
TJA1055T/3
5. Block diagram
BAT
14
INH
WAKE
STB
EN
VCC
10
1
7
TEMPERATURE
PROTECTION
WAKE-UP
STANDBY
CONTROL
5
6
9
11
VCC
12
2
TXD
8
DRIVER
(1)
RTL
CANH
CANL
RTH
TIMER
VCC(2)
ERR
FAILURE DETECTOR
PLUS WAKE-UP
PLUS TIME-OUT
4
TJA1055T
VCC
(2)
FILTER
RXD
3
RECEIVER
FILTER
13
001aac769
GND
(1) For TJA1055T/3 current source to GND; for TJA1055T pull-up resistor to VCC.
(2) Not within TJA1055T/3.
Fig 1.
Block diagram
TJA1055_4
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 04 — 17 February 2009
3 of 26
TJA1055
NXP Semiconductors
Enhanced fault-tolerant CAN transceiver
6. Pinning information
6.1 Pinning
INH
1
14 BAT
TXD
2
13 GND
RXD
3
12 CANL
ERR
4
TJA1055T
11 CANH
TJA1055T/3
STB
5
EN
6
WAKE
7
10 VCC
9
RTL
8
RTH
001aac770
Fig 2.
Pin configuration
6.2 Pin description
Table 3.
Pin description
Symbol
Pin
Description
INH
1
inhibit output for switching an external voltage regulator if a
wake-up signal occurs
TXD
2
transmit data input for activating the driver to the bus lines
RXD
3
receive data output for reading out the data from the bus lines
ERR
4
error, wake-up and power-on indication output; active LOW in
normal operating mode when a bus failure is detected; active LOW
in standby and sleep mode when a wake-up is detected; active
LOW in power-on standby when a VBAT power-on event is detected
STB
5
standby digital control signal input; together with the input signal
on pin EN this input determines the state of the transceiver;
see Table 5 and Figure 3
EN
6
enable digital control signal input; together with the input signal on
pin STB this input determines the state of the transceiver;
see Table 5 and Figure 3
WAKE
7
local wake-up signal input (active LOW); both falling and rising
edges are detected
RTH
8
termination resistor connection; in case of a CANH bus wire error
the line is terminated with a predefined impedance
RTL
9
termination resistor connection; in case of a CANL bus wire error
the line is terminated with a predefined impedance
VCC
10
supply voltage
CANH
11
HIGH-level CAN bus line
CANL
12
LOW-level CAN bus line
GND
13
ground
BAT
14
battery supply voltage
TJA1055_4
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 04 — 17 February 2009
4 of 26
TJA1055
NXP Semiconductors
Enhanced fault-tolerant CAN transceiver
7. Functional description
The TJA1055 is the interface between the CAN protocol controller and the physical wires
of the CAN bus (see Figure 9 and Figure 10). It is primarily intended for low-speed
applications, up to 125 kBd, in passenger cars. The device provides differential transmit
capability to the CAN bus and differential receive capability to the CAN controller.
To reduce EME, the rise and fall slopes are limited. This allows the use of an unshielded
twisted pair or a parallel pair of wires for the bus lines. Moreover, the device supports
transmission capability on either bus line if one of the wires is corrupted. The failure
detection logic automatically selects a suitable transmission mode.
In normal operating mode (no wiring failures) the differential receiver is output on pin RXD
(see Figure 1). The differential receiver inputs are connected to pins CANH and CANL
through integrated filters. The filtered input signals are also used for the single-wire
receivers. The receivers connected to pins CANH and CANL have threshold voltages that
ensure a maximum noise margin in single-wire mode.
A timer function (TxD dominant time-out function) has been integrated to prevent the bus
lines from being driven into a permanent dominant state (thus blocking the entire network
communication) due to a situation in which pin TXD is permanently forced to a LOW level,
caused by a hardware and/or software application failure.
If the duration of the LOW level on pin TXD exceeds a certain time, the transmitter will be
disabled. The timer will be reset by a HIGH level on pin TXD.
7.1 Failure detector
The failure detector is fully active in the normal operating mode. After the detection of a
single bus failure the detector switches to the appropriate mode (see Table 4). The
differential receiver threshold voltage is set at −3.2 V typical (VCC = 5 V). This ensures
correct reception with a noise margin as high as possible in the normal operating mode
and in the event of failures 1, 2, 5 and 6a. These failures, or recovery from them, do not
destroy ongoing transmissions. The output drivers remain active, the termination does not
change and the receiver remains in differential mode (see Table 4).
Failures 3, 3a and 6 are detected by comparators connected to the CANH and CANL bus
lines. Failures 3 and 3a are detected in a two-step approach. If the CANH bus line
exceeds a certain voltage level, the differential comparator signals a continuous dominant
condition. Because of inter operability reasons with the predecessor products TJA1054
and TJA1054A, after a first time-out the transceiver switches to single-wire operation
through CANH. If the CANH bus line is still exceeding the CANH detection voltage for a
second time-out, the TJA1055 switches to CANL operation; the CANH driver is switched
off and the RTH bias changes to the pull-down current source. The time-outs (delays) are
needed to avoid false triggering by external RF fields.
TJA1055_4
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 04 — 17 February 2009
5 of 26
TJA1055
NXP Semiconductors
Enhanced fault-tolerant CAN transceiver
Table 4.
Bus failures
Failure
Description
Termination Termination
CANH (RTH) CANL (RTL)
CANH
driver
CANL
driver
Receiver
mode
1
CANH wire
interrupted
on
on
on
on
differential
2
CANL wire interrupted on
on
on
on
differential
on
off
on
CANL
3
CANH short-circuited
to battery
weak[1]
3a
CANH short-circuited
to VCC
weak[1]
on
off
on
CANL
4
CANL short-circuited
to ground
on
weak[2]
on
off
CANH
5
CANH short-circuited
to ground
on
on
on
on
differential
6
CANL short-circuited
to battery
on
weak[2]
on
off
CANH
6a
CANL short-circuited
to VCC
on
on
on
on
differential
7
CANL and CANH
mutually
short-circuited
on
weak[2]
on
off
CANH
[1]
A weak termination implies a pull-down current source behavior of 75 µA typical.
[2]
A weak termination implies a pull-up current source behavior of 75 µA typical.
Failure 6 is detected if the CANL bus line exceeds its comparator threshold for a certain
period of time. This delay is needed to avoid false triggering by external RF fields. After
detection of failure 6, the reception is switched to the single-wire mode through CANH; the
CANL driver is switched off and the RTL bias changes to the pull-up current source.
Recovery from failures 3, 3a and 6 is detected automatically after reading a consecutive
recessive level by corresponding comparators for a certain period of time.
Failures 4 and 7 initially result in a permanent dominant level on pin RXD. After a time-out
the CANL driver is switched off and the RTL bias changes to the pull-up current source.
Reception continues by switching to the single-wire mode via pins CANH or CANL. When
failures 4 or 7 are removed, the recessive bus levels are restored. If the differential voltage
remains below the recessive threshold level for a certain period of time, reception and
transmission switch back to the differential mode.
If any of the wiring failure occurs, the output signal on pin ERR will be set to LOW. On
error recovery, the output signal on pin ERR will be set to HIGH again. In case of an
interrupted open bus wire, this failure will be detected and signalled only if there is an
open wire between the transmitting and receiving node(s). Thus, during open wire
failures, pin ERR typically toggles.
During all single-wire transmissions, EMC performance (both immunity and emission) is
worse than in the differential mode. The integrated receiver filters suppress any HF noise
induced into the bus wires. The cut-off frequency of these filters is a compromise between
propagation delay and HF suppression. In single-wire mode, LF noise cannot be
distinguished from the required signal.
TJA1055_4
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 04 — 17 February 2009
6 of 26
TJA1055
NXP Semiconductors
Enhanced fault-tolerant CAN transceiver
7.2 Low power modes
The transceiver provides three low power modes which can be entered and exited via
STB and EN (see Table 5 and Figure 3).
The sleep mode is the mode with the lowest power consumption. Pin INH is switched to
HIGH-impedance for deactivation of the external voltage regulator. Pin CANL is biased to
the battery voltage via pin RTL. Pins RXD and ERR will signal the wake-up interrupt even
in case VCC is not present.
The standby mode operates in the same way as the sleep mode but with a HIGH level on
pin INH.
The power-on standby mode is the same as the standby mode, however, in this mode the
battery power-on flag is shown on pin ERR instead of the wake-up interrupt signal. The
output on pin RXD will show the wake-up interrupt. This mode is only for reading out the
power-on flag.
Table 5.
Mode
Normal operating and low power modes
Pin STB
Pin EN
Pin ERR
Pin RXD
LOW
HIGH
LOW
HIGH
wake-up
interrupt
signal[1]
[2][3]
wake-up
interrupt
signal[1]
[2][3]
Goto-sleep
command
LOW
HIGH
Sleep
LOW
LOW[4]
Standby
LOW
LOW
Power-on
standby
HIGH
LOW
VBAT
power-on
flag[5]
Normal
operating
HIGH
HIGH
error flag
wake-up
interrupt
signal[1]
no error
flag
dominant
received
data
Pin RTL
switched
to
VBAT
VBAT
recessive
received
data
VCC
[1]
Wake-up interrupts are released when entering normal operating mode.
[2]
For TJA1055T a diode is added in series with the high-side driver of ERR and RXD to prevent a reverse
current from ERR to VCC in the unpowered state.
[3]
For TJA1055T/3, ERR and RXD are open-drain.
[4]
In case the goto-sleep command was used before. When VCC drops, pin EN will become LOW, but due to
the fail-safe functionality this does not effect the internal functions.
[5]
VBAT power-on flag will be reset when entering normal operating mode.
Wake-up requests are recognized by the transceiver through two possible channels:
• The bus lines for remote wake-up
• Pin WAKE for local wake-up
In order to wake-up the transceiver remotely through the bus lines, a filter mechanism is
integrated. This mechanism makes sure that noise and any present bus failure conditions
do not result into an erroneous wake-up. Because of this mechanism it is not sufficient to
simply pull the CANH or CANL bus lines to a dominant level for a certain time. To
guarantee a successful remote wake-up under all conditions, a message frame with a
dominant phase of at least the maximum specified tdom(CANH) or tdom(CANL) in it is required.
TJA1055_4
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 04 — 17 February 2009
7 of 26
TJA1055
NXP Semiconductors
Enhanced fault-tolerant CAN transceiver
A local wake-up through pin WAKE is detected by a rising or falling edge with a
consecutive level exceeding the maximum specified tWAKE.
On a wake-up request the transceiver will set the output on pin INH to HIGH which can be
used to activate the external supply voltage regulator.
A wake-up request is signalled on ERR or RXD with an active LOW signal. So the external
microcontroller can activate the transceiver (switch to normal operating mode) via
pins STB and EN.
To prevent a false remote wake-up due to transients or RF fields, the wake-up voltage
levels have to be maintained for a certain period of time. In the low power modes the
failure detection circuit remains partly active to prevent an increased power consumption
in the event of failures 3, 3a, 4 and 7.
To prevent a false local wake-up during an open wire at pin WAKE, this pin has a weak
pull-up current source towards VBAT. However, in order to protect the transceiver against
any EMC immunity issues, it is recommended to connect a not used pin WAKE to pin
BAT. Pin INH is set to floating only if the goto-sleep command is entered successfully. To
enter a successful goto-sleep command under all conditions, this command must be kept
stable for the maximum specified td(sleep).
Pin INH will be set to a HIGH level again by the following events only:
• VBAT power-on (cold start)
• Rising or falling edge on pin WAKE
• A message frame with a dominant phase of at least the maximum specified tdom(CANH)
or tdom(CANL), while pin EN or pin STB is at a LOW level
• Pin STB goes to a HIGH level with VCC active
To provide fail-safe functionality, the signals on pins STB and EN will internally be set to
LOW when VCC is below a certain threshold voltage (VCC(stb)). An unused output pin INH
can simply be left open within the application.
7.3 Power-on
After power-on (VBAT switched on) the signal on pin INH will become HIGH and an internal
power-on flag will be set. This flag can be read in the power-on standby mode through
pin ERR (STB = 1; EN = 0) and will be reset by entering the normal operating mode.
7.4 Protections
A current limiting circuit protects the transmitter output stages against short-circuit to
positive and negative battery voltage.
If the junction temperature exceeds the typical value of 175 °C, the transmitter output
stages are disabled. Because the transmitter is responsible for the major part of the power
dissipation, this will result in a reduced power dissipation and hence a lower chip
temperature. All other parts of the device will continue to operate.
The pins CANH and CANL are protected against electrical transients which may occur in
an automotive environment.
TJA1055_4
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 04 — 17 February 2009
8 of 26
TJA1055
NXP Semiconductors
Enhanced fault-tolerant CAN transceiver
POWER-ON
STANDBY
10
GOTO
SLEEP (5)
01
NORMAL (4)
11
STANDBY
00
(1)
(2)
SLEEP
00
(3)
mbk949
Mode 10 stands for: Pin STB = HIGH and pin EN = LOW.
(1) Mode change via input pins STB and EN.
(2) Mode change via input pins STB and EN; it should be noted that in the sleep mode pin INH is
inactive and possibly there is no VCC. Mode control is only possible if VCC of the transceiver is
active.
(3) Pin INH is activated and pins RXD and ERR are pulled LOW after wake-up via bus or input
pin WAKE.
(4) Transitions to normal mode clear the internal wake-up: wake-up interrupt flag and power-on flag
are cleared.
(5) Transitions to sleep mode: pin INH is deactivated.
Fig 3.
Mode control
8. Limiting values
Table 6.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).[1]
Symbol
Parameter
VCC
Conditions
Min
Max
Unit
supply voltage
−0.3
+6
V
VBAT
battery supply voltage
−0.3
+58
V
VTXD
voltage on pin TXD
−0.3
VCC + 0.3
V
VRXD
voltage on pin RXD
−0.3
VCC + 0.3
V
VERR
voltage on pin ERR
−0.3
VCC + 0.3
V
VSTB
voltage on pin STB
−0.3
VCC + 0.3
V
VEN
voltage on pin EN
−0.3
VCC + 0.3
V
VCANH
voltage on pin CANH
−58
+58
V
VCC = 0 V to 5.0 V;
VBAT ≥ 0 V; no time
limit; with respect to
any other pin
TJA1055_4
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 04 — 17 February 2009
9 of 26
TJA1055
NXP Semiconductors
Enhanced fault-tolerant CAN transceiver
Table 6.
Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134).[1]
Symbol
Parameter
Conditions
Min
Max
Unit
VCANL
voltage on pin CANL
VCC = 0 V to 5.0 V;
VBAT ≥ 0 V; no time
limit; with respect to
any other pin
−58
+58
V
Vtrt(n)
transient voltage on
pins CANH and CANL
see Figure 7 and 8
−150
+100
V
VI(WAKE)
input voltage on pin WAKE with respect to any
other pin
−0.3
+58
V
II(WAKE)
input current on pin WAKE
−15
-
mA
VINH
voltage on pin INH
−0.3
VBAT + 0.3 V
VRTH
voltage on pin RTH
with respect to any
other pin
−58
+58
V
VRTL
voltage on pin RTL
with respect to any
other pin
−58
+58
V
RRTH
termination resistance on
pin RTH
500
16000
Ω
RRTL
termination resistance on
pin RTL
500
16000
Ω
Tvj
virtual junction temperature
Tstg
storage temperature
Vesd
electrostatic discharge
voltage
[2]
[3]
human body model
all other pins
−8
+8
kV
−2
+2
kV
−6
+6
kV
−300
+300
V
[6]
any pin
[1]
All voltages are defined with respect to pin GND, unless otherwise specified. Positive current flows into the
device.
[2]
Only relevant if VWAKE < VGND − 0.3 V; current will flow into pin GND.
[3]
Junction temperature in accordance with “IEC 60747-1”. An alternative definition is: Tvj = Tamb + P × Rth(vj-a)
where Rth(vj-a) is a fixed value to be used for the calculation of Tvj. The rating for Tvj limits the allowable
combinations of power dissipation (P) and operating ambient temperature (Tamb).
[4]
Equivalent to discharging a 100 pF capacitor through a 1.5 kΩ resistor.
[5]
The ESD performance of pins CANH, CANL, RTH and RTL, with respect to GND, was verified by an
external test house in accordance with IEC-61000-4-2 (C = 150 pF, R = 330 Ω). The results were equal to,
or better than, ±6 kV.
[6]
Equivalent to discharging a 200 pF capacitor through a 10 Ω resistor and a 0.75 µH coil.
TJA1055_4
Product data sheet
°C
°C
[5]
pins RTH, RTL,
CANH and CANL
machine model
+150
+150
[4]
pins RTH, RTL,
CANH and CANL
IEC 61000-4-2
−40
−55
© NXP B.V. 2009. All rights reserved.
Rev. 04 — 17 February 2009
10 of 26
TJA1055
NXP Semiconductors
Enhanced fault-tolerant CAN transceiver
9. Thermal characteristics
Table 7.
Thermal characteristics
Symbol
Parameter
Conditions
Typ
Unit
Rth(j-a)
thermal resistance from junction
to ambient
in free air
120
K/W
Rth(j-s)
thermal resistance from junction
to substrate
in free air
40
K/W
10. Static characteristics
Table 8.
Static characteristics
VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 40 V; VSTB = VCC; Tvj = −40 °C to +150 °C; all voltages are defined with respect to
ground; positive currents flow into the device; unless otherwise specified.[1]
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Supplies (pins VCC and BAT)
VCC
supply voltage
4.75
-
5.25
V
VCC(stb)
supply voltage for forced
standby mode (fail-safe)
3.1
-
4.5
V
ICC
supply current
normal operating mode;
VTXD = VCC (recessive)
2.5
6
10
mA
normal operating mode;
VTXD = 0 V (dominant); no load
3
13
21
mA
Tamb = −40 °C to +85 °C
0
0
5
µA
Tamb = +85 °C to +125 °C
0
0
25
µA
low power modes at VTXD = VCC
VBAT
IBAT
battery supply voltage
battery supply current
no time limit
−0.3
-
+40
V
operating mode
5.0
-
40
V
load dump
-
-
58
V
sleep mode at
VRTL = VWAKE = VINH = VBAT = 14 V;
Tamb = −40 °C to +125 °C
-
25
40
µA
VBAT = 5 V to 8 V
10
-
100
µA
VBAT = 8 V to 40 V
10
-
75
µA
-
150
220
µA
power-on flag set
-
-
3.8
V
power-on flag not set
5
-
-
V
low power mode at
VRTL = VWAKE = VINH = VBAT;
Tamb = −40 °C to +125 °C
normal operating mode at
VRTL = VWAKE = VINH = VBAT = 5 V
to 40 V
Vpof(BAT)
power-on flag voltage on
pin BAT
low power modes
TJA1055_4
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 04 — 17 February 2009
11 of 26
TJA1055
NXP Semiconductors
Enhanced fault-tolerant CAN transceiver
Table 8.
Static characteristics …continued
VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 40 V; VSTB = VCC; Tvj = −40 °C to +150 °C; all voltages are defined with respect to
ground; positive currents flow into the device; unless otherwise specified.[1]
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Isup(tot)
total supply current
low power modes; VCC = 5 V;
VBAT = VWAKE = VINH = 14 V
Tamb = −40 °C to +85 °C
-
25
45
µA
Tamb = +85 °C to +125 °C
-
25
65
µA
Pins STB, EN and TXD
VIH
HIGH-level input voltage
2.2
-
7
V
VIL
LOW-level input voltage
−0.3
-
+0.8
V
IIH
HIGH-level input current
µA
IIL
pins STB and EN
VI = 4 V
-
11
21
pin TXD (TJA1055T)
VI = 3 V
−160
−80
−40
µA
pin TXD (TJA1055T/3)
normal operating mode; VI = 2.4 V
2
11
21
µA
low power mode; VI = 2.4 V
0.1
0.9
2
µA
LOW-level input current
pins STB and EN
VI = 1 V
2
11
-
µA
pin TXD (TJA1055T)
VI = 1 V
−400
−240
−100
µA
pin TXD (TJA1055T/3)
normal operating mode; VI = 1 V
2
11
-
µA
low power mode; VI = 1 V
0.1
0.9
2
µA
on pin ERR
IO = −100 µA
VCC − 0.9 -
VCC
V
on pin RXD
IO = −1 mA
VCC − 0.9 -
VCC
V
IO = −100 µA
VCC − 1.1 VCC − 0.7 VCC − 0.4 V
Pins RXD and ERR (TJA1055T)
VOH(norm)
VOH(lp)
HIGH-level output voltage
in normal mode
HIGH-level output voltage
in low-power mode
on pin ERR
on pin RXD
VOL
LOW-level output voltage
IO = −100 µA
VCC − 1.1 VCC − 0.7 VCC − 0.4 V
IO = 1.6 mA
0
-
0.4
V
IO = 1.2 mA; VCC < 4.75 V
0
-
0.4
V
IO = 5 mA
0
-
1.5
V
Pins RXD and ERR (TJA1055T/3)
IOL
LOW-level output current
VO = 0.4 V
1.3
3.5
-
mA
ILH
HIGH-level leakage
current
VO = 3 V
−5
0
+8
µA
IIL
LOW-level input current
VWAKE = 0 V; VBAT = 40 V
−12
−4
−1
µA
Vth(wake)
wake-up threshold
voltage
VSTB = 0 V
2.5
3.2
3.9
V
∆VH
HIGH-level voltage drop
IINH = −0.18 mA
-
-
0.8
V
|IL|
leakage current
sleep mode; VINH = 0 V
-
-
5
µA
Pin WAKE
Pin INH
TJA1055_4
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 04 — 17 February 2009
12 of 26
TJA1055
NXP Semiconductors
Enhanced fault-tolerant CAN transceiver
Table 8.
Static characteristics …continued
VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 40 V; VSTB = VCC; Tvj = −40 °C to +150 °C; all voltages are defined with respect to
ground; positive currents flow into the device; unless otherwise specified.[1]
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VCC = 5 V
−3.5
−3.2
−2.9
V
VCC = 4.75 V to 5.25 V
−0.70VCC −0.64VCC −0.58VCC V
Pins CANH and CANL
Vth(dif)
VO(reces)
VO(dom)
IO(CANH)
IO(CANL)
Vdet(sc)(CANH)
Vdet(sc)(CANL)
Vth(wake)
differential receiver
threshold voltage
recessive output voltage
no failures and
bus failures 1, 2, 5 and 6a;
see Figure 4
VTXD = VCC
on pin CANH
RRTH < 4 kΩ
-
on pin CANL
RRTL < 4 kΩ
dominant output voltage
-
0.2
V
VCC − 0.2 -
-
V
VTXD = 0 V; VEN = VCC
on pin CANH
ICANH = −40 mA
VCC − 1.4 -
-
V
on pin CANL
ICANL = 40 mA
-
-
1.4
V
normal operating mode;
VCANH = 0 V; VTXD = 0 V
−110
−80
−45
mA
low power modes; VCANH = 0 V;
VCC = 5 V
-
−0.25
-
µA
normal operating mode;
VCANL = 14 V; VTXD = 0 V
45
70
100
mA
low power modes; VCANL = 14 V;
VBAT = 14 V
-
0
-
µA
detection voltage for
short-circuit to battery
voltage on pin CANH
normal operating mode; VCC = 5 V
1.5
1.7
1.85
V
low power modes
1.1
1.8
2.5
V
detection voltage for
short-circuit to battery
voltage on pin CANL
normal operating mode
VCC = 5 V
6.6
7.2
7.8
V
VCC = 4.75 V to 5.25 V
1.32VCC
1.44VCC
1.56VCC
V
output current on
pin CANH
output current on
pin CANL
wake-up threshold
voltage
on pin CANL
low power modes
2.5
3.2
3.9
V
on pin CANH
low power modes
1.1
1.8
2.5
V
∆Vth(wake)
difference of wake-up
threshold voltages (on
pins CANL and CANH)
low power modes
0.8
1.4
-
V
Vth(se)(CANH)
single-ended receiver
threshold voltage on
pin CANH
normal operating mode and
failures 4, 6 and 7
VCC = 5 V
1.5
1.7
1.85
V
VCC = 4.75 V to 5.25 V
0.30VCC
0.34VCC
0.37VCC
V
VCC = 5 V
3.15
3.3
3.45
V
VCC = 4.75 V to 5.25 V
0.63VCC
0.66VCC
0.69VCC
V
110
165
270
kΩ
Vth(se)(CANL)
Ri(se)(CANH)
single-ended receiver
threshold voltage on
pin CANL
single-ended input
resistance on pin CANH
normal operating mode and
failures 3 and 3a
normal operating mode
TJA1055_4
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 04 — 17 February 2009
13 of 26
TJA1055
NXP Semiconductors
Enhanced fault-tolerant CAN transceiver
Table 8.
Static characteristics …continued
VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 40 V; VSTB = VCC; Tvj = −40 °C to +150 °C; all voltages are defined with respect to
ground; positive currents flow into the device; unless otherwise specified.[1]
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Ri(se)(CANL)
single-ended input
resistance on pin CANL
normal operating mode
110
165
270
kΩ
Ri(dif)
differential input
resistance
normal operating mode
220
330
540
kΩ
Pins RTH and RTL
Rsw(RTL)
switch-on resistance on
pin RTL
normal operating mode; switch-on
resistance between pin RTL and
VCC; |IO| < 10 mA
-
40
100
Ω
Rsw(RTH)
switch-on resistance on
pin RTH
normal operating mode; switch-on
resistance between pin RTH and
ground; |IO| < 10 mA
-
40
100
Ω
VO(RTH)
output voltage on pin RTH low power modes; IO = 100 µA
-
0.7
1.0
V
IO(RTL)
output current on pin RTL low power modes; VRTL = 0 V
−1.5
−0.65
−0.1
mA
Ipu(RTL)
pull-up current on pin RTL normal operating mode and
failures 4, 6 and 7
-
75
-
µA
Ipd(RTH)
pull-down current on
pin RTH
-
75
-
µA
160
175
190
°C
normal operating mode and
failures 3 and 3a
Thermal shutdown
Tj(sd)
[1]
shutdown junction
temperature
All parameters are guaranteed over the virtual junction temperature range by design, but only 100 % tested at Tamb = 125 °C for dies on
wafer level, and above this for cased products 100 % tested at Tamb = 25 °C, unless otherwise specified.
11. Dynamic characteristics
Table 9.
Dynamic characteristics
VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 40 V; VSTB = VCC; Tvj = −40 °C to +150 °C; all voltages are defined with respect to
ground; unless otherwise specified.[1]
Symbol
Conditions
Min
Typ
Max Unit
tt(reces-dom) transition time for recessive to
dominant (on pins CANL and
CANH)
between 10 % and 90 %; RCAN_L = RCAN_H =
125 Ω; CCAN_L = CCAN_H = 1 nF;
see Figure 5 and 6
0.2
0.6
-
µs
tt(dom-reces) transition time for dominant to
recessive (on pins CANL and
CANH)
between 10 % and 90 %; RCAN_L = RCAN_H =
125 Ω; CCAN_L = CCAN_H = 1 nF;
see Figure 5 and 6
0.3
0.7
-
µs
no failures; RCAN_L = RCAN_H = 125 Ω;
CCAN_L = CCAN_H = 1 nF; see Figure 4 to
Figure 6
-
-
1.5
µs
all failures except CAN_L shorted to CAN_H;
RCAN_L = RCAN_H = 125 Ω; CCAN_L =
CCAN_H = 1 nF; see Figure 4 to Figure 6
-
-
1.9
µs
failure 7, CAN_L shorted to CAN_H;
RCAN_L = 1 MΩ; RCAN_H = 125 Ω;
CCAN_L = CCAN_H = 1 nF; see Figure 4 to
Figure 6
-
-
1.9
µs
tPD(L)
Parameter
propagation delay TXD (LOW) to
RXD (LOW)
TJA1055_4
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 04 — 17 February 2009
14 of 26
TJA1055
NXP Semiconductors
Enhanced fault-tolerant CAN transceiver
Table 9.
Dynamic characteristics …continued
VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 40 V; VSTB = VCC; Tvj = −40 °C to +150 °C; all voltages are defined with respect to
ground; unless otherwise specified.[1]
Symbol
Parameter
Conditions
Min
Typ
Max Unit
tPD(H)
propagation delay TXD (HIGH) to
RXD (HIGH)
no failures; RCAN_L = RCAN_H = 125 Ω;
CCAN_L = CCAN_H = 1 nF; see Figure 4 to
Figure 6
-
-
1.5
µs
all failures except CAN_L shorted to CAN_H;
RCAN_L = RCAN_H = 125 Ω; CCAN_L =
CCAN_H = 1 nF; see Figure 4 to Figure 6
-
-
1.9
µs
failure 7, CAN_L shorted to CAN_H;
RCAN_L = 1 MΩ; RCAN_H = 125 Ω; CCAN_L =
CCAN_H = 1 nF; see Figure 4 to Figure 6
-
-
1.9
µs
5
-
td(sleep)
delay time to sleep
tdis(TxD)
disable time of TxD permanent
dominant timer
tdom(CANH) dominant time on pin CANH
[2]
normal operating mode; VTXD = 0 V
50
µs
0.75 -
4
ms
low power modes; VBAT = 14 V
[2]
7
-
38
µs
7
-
38
µs
7
-
38
µs
failures 3 and 3a
1.6
-
8.0
ms
failures 4, 6 and 7
0.3
-
1.6
ms
failures 3 and 3a
1.6
-
8.0
ms
failures 4 and 7
0.1
-
1.6
ms
failures 3 and 3a
0.3
-
1.6
ms
failures 4 and 7
7
-
38
µs
failure 6
125
-
750
µs
0.3
-
1.6
ms
tdom(CANL)
dominant time on pin CANL
low power modes; VBAT = 14 V
[2]
tWAKE
local wake-up time on pin WAKE
low power modes; VBAT = 14 V; for wake-up
after receiving a falling or rising edge
[2]
tdet
failure detection time
normal operating mode
low power modes; VBAT = 14 V
failure recovery time
trec
normal operating mode
low power modes; VBAT = 14 V
failures 3, 3a, 4 and 7
ndet
pulse-count failure detection
difference between CANH and CANL;
normal operating mode and failures 1, 2, 5
and 6a; pin ERR becomes LOW
-
4
-
nrec
number of consecutive pulses for
failure recovery
on CANH and CANL simultaneously;
failures 1, 2, 5 and 6a
-
4
-
[1]
All parameters are guaranteed over the virtual junction temperature range by design, but only 100 % tested at Tamb = 125 °C for dies on
wafer level, and above this for cased products 100 % tested at Tamb = 25 °C, unless otherwise specified.
[2]
To guarantee a successful mode transition under all conditions, the maximum specified time must be applied.
TJA1055_4
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 04 — 17 February 2009
15 of 26
TJA1055
NXP Semiconductors
Enhanced fault-tolerant CAN transceiver
2 V to VCC
VTXD
0V
VCANL
5V
3.6 V
1.4 V
VCANH
0V
2.2 V
−3.2 V
∆VCAN
−5 V
VRXD
0.7VCC
0.3VCC
tPD(H)
tPD(L)
mgl424
∆VCAN = VCANH − VCANL
Fig 4.
Timing diagram for dynamic characteristics
12. Test information
VBAT = 5 V to 40 V
+5 V
INH
WAKE
VTXD
TXD
STB
EN
RXD
CRXD
10 pF
1
VCC
10 8 RTH
BAT
14
7
RRTH
500 Ω
2
5
12
11
CANH
RRTL
500 Ω
3
13
GND
9
4
VCC
CCAN_L
RCAN_L
CCAN_H
RCAN_H
CANL
TJA1055T
6
BAT
RTL
FAILURE
GENERATION
GND
ERR
001aac932
VTXD is a rectangular signal of 50 kHz with 50 % duty cycle and slope time < 10 ns.
Termination resistors RCAN_L and RCAN_H (125 Ω) are not connected to pin RTL or pin RTH for
testing purposes because the minimum load allowed on the CAN bus lines is 500 Ω per
transceiver.
Fig 5.
Test circuit for dynamic characteristics
TJA1055_4
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 04 — 17 February 2009
16 of 26
TJA1055
NXP Semiconductors
Enhanced fault-tolerant CAN transceiver
VBAT = 5 V to 40 V
+5 V
INH
WAKE
VTXD
TXD
+3.3 V
STB
2.5
kΩ
EN
RXD
VCC
10 8 RTH
BAT
1
14
7
BAT
RRTH
500 Ω
2
12
11
6
CRXD
10 pF
9
4
13
RCAN_L
CCAN_H
RCAN_H
FAILURE
GENERATION
CANH
RRTL
500 Ω
3
CCAN_L
CANL
TJA1055T/3
5
VCC
GND
RTL
ERR
GND
001aac933
VTXD is a rectangular signal of 50 kHz with 50 % duty cycle and slope time < 10 ns.
Termination resistors RCAN_L and RCAN_H (125 Ω) are not connected to pin RTL or pin RTH for
testing purposes because the minimum load allowed on the CAN bus lines is 500 Ω per
transceiver.
Fig 6.
Test circuit for dynamic characteristics (TJA1055T/3)
+12 V
+5 V
10 µF
INH
WAKE
TXD
STB
EN
RXD
1
125 Ω
1 nF
7
500 Ω
2
5
12
1 nF
CANL
TJA1055T
11
6
1 nF
CANH
GENERATOR
500 Ω
3
13
10 pF
VCC
10 8 RTH
BAT
14
GND
9
4
RTL
125 Ω
1 nF
ERR
001aac934
The waveforms of the applied transients on pins CANH and CANL will be in accordance with
“ISO 7637 part 1”: test pulses 1, 2, 3a and 3b.
Fig 7.
Test circuit for automotive transients
TJA1055_4
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 04 — 17 February 2009
17 of 26
TJA1055
NXP Semiconductors
Enhanced fault-tolerant CAN transceiver
+12 V
+5 V
10 µF
INH
WAKE
TXD
STB
+3.3 V
2.5
kΩ
EN
RXD
1
VCC
10 8 RTH
BAT
14
125 Ω
1 nF
7
500 Ω
2
12
1 nF
CANL
TJA1055T/3
5
11
6
GENERATOR
1 nF
CANH
500 Ω
3
9
4
13
10 pF
GND
RTL
125 Ω
1 nF
ERR
001aac935
The waveforms of the applied transients on pins CANH and CANL will be in accordance with
“ISO 7637 part 1”: test pulses 1, 2, 3a and 3b.
Fig 8.
Test circuit for automotive transients (TJA1055T/3)
VBAT
VDD
5 V CAN CONTROLLER
CTX0 CRX0 Px.x
TXD
WAKE
2
RXD
3
Px.x
Px.x
ERR
STB
5
EN
INH
6
4
1
7
14
TJA1055T
10
CAN TRANSCEIVER
13
8
11
RTH
CANH
+5 V
12
CANL
BAT
VCC
GND
100 nF
9
RTL
CAN BUS LINE
001aac936
For more information: refer to the separate FTCAN information available on our web site.
Fig 9.
Application diagram
TJA1055_4
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 04 — 17 February 2009
18 of 26
TJA1055
NXP Semiconductors
Enhanced fault-tolerant CAN transceiver
VBAT
VDD
3 V CAN CONTROLLER
CTX0 CRX0 Px.x
TXD
WAKE
2
RXD
3
Px.x
+5 V
Px.x
ERR
STB
5
EN
INH
6
4
1
7
14
TJA1055T/3
10
CAN TRANSCEIVER
13
8
11
RTH
CANH
+3 V
12
CANL
BAT
VCC
GND
100 nF
9
RTL
CAN BUS LINE
001aac937
For more information: refer to the separate FTCAN information available on our web site.
Fig 10. Application diagram (TJA1055T/3)
12.1 Quality information
This product has been qualified to the appropriate Automotive Electronics Council (AEC)
standard Q100 or Q101 and is suitable for use in automotive applications.
TJA1055_4
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 04 — 17 February 2009
19 of 26
TJA1055
NXP Semiconductors
Enhanced fault-tolerant CAN transceiver
13. Package outline
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
D
E
A
X
c
y
HE
v M A
Z
8
14
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
1
L
7
e
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
Z (1)
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25
0.25
0.1
0.7
0.3
0.01
0.019 0.0100 0.35
0.014 0.0075 0.34
0.16
0.15
0.010 0.057
inches 0.069
0.004 0.049
0.05
0.244
0.039
0.041
0.228
0.016
0.028
0.024
0.01
0.01
0.028
0.004
0.012
θ
o
8
o
0
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT108-1
076E06
MS-012
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig 11. Package outline SOT108-1 (SO14)
TJA1055_4
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 04 — 17 February 2009
20 of 26
TJA1055
NXP Semiconductors
Enhanced fault-tolerant CAN transceiver
14. Soldering of SMD packages
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering ICs can be found in Application Note AN10365 “Surface mount reflow
soldering description”.
14.1 Introduction to soldering
Soldering is one of the most common methods through which packages are attached to
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both
the mechanical and the electrical connection. There is no single soldering method that is
ideal for all IC packages. Wave soldering is often preferred when through-hole and
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high
densities that come with increased miniaturization.
14.2 Wave and reflow soldering
Wave soldering is a joining technology in which the joints are made by solder coming from
a standing wave of liquid solder. The wave soldering process is suitable for the following:
• Through-hole components
• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
•
•
•
•
•
•
Board specifications, including the board finish, solder masks and vias
Package footprints, including solder thieves and orientation
The moisture sensitivity level of the packages
Package placement
Inspection and repair
Lead-free soldering versus SnPb soldering
14.3 Wave soldering
Key characteristics in wave soldering are:
• Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
• Solder bath specifications, including temperature and impurities
TJA1055_4
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 04 — 17 February 2009
21 of 26
TJA1055
NXP Semiconductors
Enhanced fault-tolerant CAN transceiver
14.4 Reflow soldering
Key characteristics in reflow soldering are:
• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 12) than a SnPb process, thus
reducing the process window
• Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 10 and 11
Table 10.
SnPb eutectic process (from J-STD-020C)
Package thickness (mm)
Package reflow temperature (°C)
Volume (mm3)
< 350
≥ 350
< 2.5
235
220
≥ 2.5
220
220
Table 11.
Lead-free process (from J-STD-020C)
Package thickness (mm)
Package reflow temperature (°C)
Volume (mm3)
< 350
350 to 2000
> 2000
< 1.6
260
260
260
1.6 to 2.5
260
250
245
> 2.5
250
245
245
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 12.
TJA1055_4
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 04 — 17 February 2009
22 of 26
TJA1055
NXP Semiconductors
Enhanced fault-tolerant CAN transceiver
temperature
maximum peak temperature
= MSL limit, damage level
minimum peak temperature
= minimum soldering temperature
peak
temperature
time
001aac844
MSL: Moisture Sensitivity Level
Fig 12. Temperature profiles for large and small components
For further information on temperature profiles, refer to Application Note AN10365
“Surface mount reflow soldering description”.
15. Appendix
15.1 Overview of differences between the TJA1055 and the TJA1054A
Table 12.
Limiting values
Symbol
Parameter
Conditions
TJA1055
Min
Max
Min
Max
VCANH
voltage on pin CANH
−58
+58
−27
+40
V
VCANL
voltage on pin CANL
−58
+58
−27
+40
V
Vesd
electrostatic discharge voltage
Unit
−8
+8
−4
+4
kV
pins RTH, RTL, CANH, CANL
human body model
IEC 61000-4-2
[1]
TJA1054A
[1]
The ESD performance of pins CANH, CANL, RTH and RTL, with respect to GND, was verified by an external test house in accordance
with IEC-61000-4-2 (C = 150 pF, R = 330 Ω). The results were equal to, or better than, ±6 kV for TJA1055 and equal to, or better than,
±1.5 kV for TJA1054A.
TJA1055_4
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 04 — 17 February 2009
23 of 26
TJA1055
NXP Semiconductors
Enhanced fault-tolerant CAN transceiver
16. Revision history
Table 13.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
TJA1055_4
20090217
Product data sheet
-
TJA1055_3
Modifications:
•
No technical content change; data sheet release date updated
TJA1055_3
20070313
Product data sheet
-
TJA1055_2
TJA1055_2
20061030
Preliminary data sheet
-
TJA1055_1
TJA1055_1
(9397 750 14908)
20060801
Objective data sheet
-
-
TJA1055_4
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 04 — 17 February 2009
24 of 26
TJA1055
NXP Semiconductors
Enhanced fault-tolerant CAN transceiver
17. Legal information
17.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
17.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
17.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
17.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
18. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
TJA1055_4
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 04 — 17 February 2009
25 of 26
TJA1055
NXP Semiconductors
Enhanced fault-tolerant CAN transceiver
19. Contents
1
2
2.1
2.2
2.3
2.4
3
4
5
6
6.1
6.2
7
7.1
7.2
7.3
7.4
8
9
10
11
12
12.1
13
14
14.1
14.2
14.3
14.4
15
15.1
16
17
17.1
17.2
17.3
17.4
18
19
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Optimized for in-car low-speed
communication . . . . . . . . . . . . . . . . . . . . . . . . . 1
Bus failure management. . . . . . . . . . . . . . . . . . 1
Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Support for low power modes . . . . . . . . . . . . . . 2
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
Functional description . . . . . . . . . . . . . . . . . . . 5
Failure detector . . . . . . . . . . . . . . . . . . . . . . . . . 5
Low power modes. . . . . . . . . . . . . . . . . . . . . . . 7
Power-on. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 9
Thermal characteristics. . . . . . . . . . . . . . . . . . 11
Static characteristics. . . . . . . . . . . . . . . . . . . . 11
Dynamic characteristics . . . . . . . . . . . . . . . . . 14
Test information . . . . . . . . . . . . . . . . . . . . . . . . 16
Quality information . . . . . . . . . . . . . . . . . . . . . 19
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 20
Soldering of SMD packages . . . . . . . . . . . . . . 21
Introduction to soldering . . . . . . . . . . . . . . . . . 21
Wave and reflow soldering . . . . . . . . . . . . . . . 21
Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 21
Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 22
Appendix. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Overview of differences between the
TJA1055 and the TJA1054A. . . . . . . . . . . . . . 23
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 24
Legal information. . . . . . . . . . . . . . . . . . . . . . . 25
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 25
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Contact information. . . . . . . . . . . . . . . . . . . . . 25
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 17 February 2009
Document identifier: TJA1055_4