044505 rev 1.0 7C681000B, FX2LP,FX1-128, C8Q-3R.pdf

Cypress Semiconductor
Product Qualification Report
QTP# 044505 VERSION 1.0
July 2005
FX2LP/FX1-128 Device Family
C8Q-3R Technology, Fab 4
CY7C68013A
CY7C68014A
EZ-USB FX2LP™ USB Microcontroller
CY7C64713
EZ-USB FX1™ USB Microcontroller
Full –Speed USB Peripheral Controller
CY7C68300B
CY7C68301B
CY7C68320
CY7C68321
EZ-USB AT2LP™ USB 2.0 to ATA/ATAPI
Bridge
CYPRESS TECHNICAL CONTACT FOR QUALIFICATION DATA:
Sabbas Daniel
Quality Engineering Director
(408) 943-2685
Fredrick Whitwer
Principal Reliability Engineer
(408) 943-2722
Cypress Semiconductor
FX2LP/FX1-128 Device Family, C8Q-3R Technology, Fab4
Device: CY7C68013/4/5/6A, CY7C64713, CY7C68300/1B, CY7C68320/1
QTP# 044505, V, 1.0
Page 2 of 11
July 2005
PRODUCT QUALIFICATION HISTORY
Qual
Report
Description of Qualification Purpose
Date
Comp
033805
FX2LP/FX1/AT2LP New Device Family on New C8Q-3R Technology, Fab4
Jan 05
044505
7C6810**B Device Family (FX2LP-128) on C8Q-3R Technology, Fab4
Jun 05
Cypress Semiconductor
FX2LP/FX1-128 Device Family, C8Q-3R Technology, Fab4
Device: CY7C68013/4/5/6A, CY7C64713, CY7C68300/1B, CY7C68320/1
QTP# 044505, V, 1.0
Page 3 of 11
July 2005
PRODUCT DESCRIPTION (for qualification)
Qualification Purpose: New Device Family FX2LP/FX1-128 in C8Q-3R Technology from Fab4
Marketing Part #:
CY68013/4/5/6A, CY7C64713, CY7C68300/1B, CY7C68320/1
Device Description:
3.3V, Commercial, available in 100/128-pin TQFP, 56-pin SSOP and QFN
Cypress Division:
Cypress Semiconductor Corporation – Consumer & Computation Division (CCD)
Overall Die (or Mask) REV Level (pre-requisite for qualification):
Rev. B
What ID markings on Die: 7C68100A
TECHNOLOGY/FAB PROCESS DESCRIPTION
Number of Metal Layers:
4
Metal Composition:
Metal 1: 300A Ti/3,200A Al 0.5% Cu /300A TiW
Metal 2: 150A Ti/4,000A Al 0.5% Cu/300A TiW
Metal 3: 150A Ti/4,000A Al 0.5% Cu/300A TiW
Metal 4: 150A Ti/4,000A Al 0.5% Cu/300A TiW
Passivation Type and Materials:
1,000A TeOs / 9,000A Si3N4
Free Phosphorus contents in top glass layer (%):
0%
Number of Transistors in Device:
700K
Number of Gates in Device
120K
Generic Process Technology/Design Rule (µ-drawn):
CMOS, 0.13 µm
Gate Oxide Material/Thickness (MOS):
SiO2 DGOX 32/55A
Name/Location of Die Fab (prime) Facility:
CMI/Fab4
Die Fab Line ID/Wafer Process ID:
Fab4, C8Q-3R
PACKAGE AVAILABILITY
PACKAGE
ASSEMBLY SITE FACILITY
100-Pin TQFP
Cypress Phil (CML-R)
128-Pin TQFP
ASE-Taiwan (TAIWN-G)
56-Pin SSOP
Cypress Phil. (CML-R)
56-Pin QFN
Seoul-Korea (SEOL-L)
Note: Package Qualification details upon request.
Cypress Semiconductor
FX2LP/FX1-128 Device Family, C8Q-3R Technology, Fab4
Device: CY7C68013/4/5/6A, CY7C64713, CY7C68300/1B, CY7C68320/1
MAJOR PACKAGE INFORMATION USED IN THIS QUALIFICATION
Package Designation:
Package Outline, Type, or Name:
Mold Compound Name/Manufacturer:
Mold Compound Flammability Rating:
AZ128
128-Pin Thin Quad Flat Pack (TQFP)
Hitachi CEL9200CYR
V-O per UL94
Oxygen Rating Index:
N/A
Lead Frame Designation:
N/A
Lead Frame Material:
Copper
Lead Finish, Composition / Thickness:
Pure Sn
Die Backside Preparation Method/Metallization:
Grinding
Die Separation Method:
Sawing
Die Attach Supplier:
Dexter
Die Attach Material:
QMI 505
Die Attach Method:
Dispensing
Bond Diagram Designation:
10-06610
Wire Bond Method:
Thermosonic
Wire Material/Size:
Au, 1.0mil
Thermal Resistance Theta JA °C/W:
42.27°C/W
Package Cross Section Yes/No:
No
Assembly Process Flow:
49-41035
Name/Location of Assembly (prime) facility:
Taiwan-G
ELECTRICAL TEST / FINISH DESCRIPTION
Test Location:
CML-R
Fault Coverage:
99.5%
Note: Please contact a Cypress Representative for other packages availability.
QTP# 044505, V, 1.0
Page 4 of 11
July 2005
Cypress Semiconductor
FX2LP/FX1-128 Device Family, C8Q-3R Technology, Fab4
Device: CY7C68013/4/5/6A, CY7C64713, CY7C68300/1B, CY7C68320/1
QTP# 044505, V, 1.0
Page 5 of 11
July 2005
RELIABILITY TESTS PERFORMED PER SPECIFICATION REQUIREMENT
Stress/Test
Test Condition
(Temp/Bias)
Result
P/F
High Temperature Operating Life
Dynamic Operating Condition, Vcc Max = 2.35V, 125°C
Early Failure Rate
Dynamic Operating Condition, Vcc Max = 3.8V, 125°C
High Temperature Operating Life
Dynamic Operating Condition, Vcc Max = 2.35V, 125°C
Latent Failure Rate
Dynamic Operating Condition, Vcc Max = 3.8V, 125°C
Long Life Verification
Dynamic Operating Condition, Vcc Max = 3.8V, 125°C
P
Low Temperature Operating Life
-30C, 4.3V
P
High Temperature Steady State life
150°C, 3.63V, Vcc Max
P
High Accelerated Saturation Test
(HAST)
130°C, 1.8V/3.63V, 85%RH
Precondition: JESD22 Moisture Sensitivity Level 3
P
P
P
192 Hrs, 30°C/60%RH+3IR-Reflow, 260°C+0, -5°C
Temperature Cycle
MIL-STD-883C, Method 1010, Condition C, -65°C to 150°C
Precondition: JESD22 Moisture Sensitivity Level 3
P
192 Hrs, 30°C/60%RH+3IR-Reflow, 260°C+0, -5°C
Pressure Cooker
121°C, 100%RH
Precondition: JESD22 Moisture Sensitivity Level 3
P
192 Hrs, 30°C/60%RH+3IR-Reflow, 260°C+0, -5°C
Electrostatic Discharge
Human Body Model (ESD-HBM)
2,200V
MIL-STD-883, Method 3015.7
P
Electrostatic Discharge
Human Body Model (ESD-HBM)
2,200V
JESD22, Method A114-B
P
Electrostatic Discharge
Charge Device Model (ESD-CDM)
500V
Cypress Spec. 25-00020
P
Age Bond Strength
200C, 4hrs
MIL-STD-883, Method 883-2011
P
Ball Shear
Cypress Spec 24-00018
P
Acoustic Microscopy
Spec. 25-00104
P
Latch up Sensitivity
125°C, ± 100mA/300 mA
P
In accordance with JEDEC 17. Cypress Spec. 01-00081
Cypress Semiconductor
FX2LP/FX1-128 Device Family, C8Q-3R Technology, Fab4
Device: CY7C68013/4/5/6A, CY7C64713, CY7C68300/1B, CY7C68320/1
QTP# 044505, V, 1.0
Page 6 of 11
July 2005
RELIABILITY FAILURE RATE SUMMARY
Device Tested/
Device Hours
#
Fails
Activation
Energy
Thermal3
A.F
Failure
Rate
High Temperature Operating Life
Early Failure Rate1
2,477 Devices
0
N/A
N/A
0 PPM
High Temperature Operating Life1,2
Long Term Failure Rate
806,008 DHRs
0
0 .7
55
21 FIT
Stress/Test
1
2
3
Assuming an ambient temperature of 55°C and a junction temperature rise of 15°C.
Chi-squared 60% estimations used to calculate the failure rate.
Thermal Acceleration Factor is calculated from the Arrhenius equation
E  1 1  
AF = exp  A  -  
 k  T 2 T1  
where:
EA =The Activation Energy of the defect mechanism.
k = Boltzmann's constant = 8.62x10-5 eV/Kelvin.
T1 is the junction temperature of the device under stress and T2 is the junction temperature of the device
at use conditions.
Cypress Semiconductor
FX2LP/FX1-128 Device Family, C8Q-3R Technology, Fab4
Device: CY7C68013/4/5/6A, CY7C64713, CY7C68300/1B, CY7C68320/1
QTP# 044505, V, 1.0
Page 7 of 11
July 2005
Reliability Test Data
QTP #:
Device
Fab Lot #
033805
Assy Lot #
Assy Loc Duration
Samp
Rej
610434406
TAIWN-G
COMP
17
0
H20592
TAIWN-G
COMP
16
0
610434407/8
TAIWN-G
COMP
17
0
H20549
TAIWN-G
COMP
16
0
CY7C68013A (7C681000A) 4416666
610434406
TAIWN-G
COMP
5
0
CY7C68013A (7C682001A) 4416701
610437657
TAIWN-G
COMP
5
0
H20549
TAIWN-G
COMP
3
0
610437657
TAIWN-G
COMP
5
0
TAIWN-G
COMP
3
0
STRESS: ACOUSTIC -MSL3
CY7C68013A (7C681000A) 4416666
CY2SSTU877 (7C87741A)
4416666B
CY7C68013A (7C681000A) 4416701
CY2SSTU877 (7C87740A)
4417143
STRESS: AGE BOND STRENGTH
CY2SSTU877 (7C87740A)
4417143
STRESS: BALL SHEAR
CY7C68013A (7C682001A) 4416701
STRESS: DYNAMIC LATCH-UP TESTING (6.9V)
CY7C68013A (7C682001A) 4416701
610437657
STRESS: ESD-CHARGE DEVICE MODEL (500V)
CY7C68013A (7C682001A) 4416666
610437607
TAIWN-G
COMP
9
0
CY7C68013A (7C682000A) 4416666
610437102
TAIWN-G
COMP
9
0
CY7C68013A (7C681000A) 4416701
610434407/8
TAIWN-G
COMP
9
0
CY7C68013A (7C682000A) 4416701
610437702
TAIWN-G
COMP
9
0
H20549
TAIWN-G
COMP
9
0
CY2SSTU877 (7C87740A)
4417143
STRESS: ESD-HUMAN BODY CIRCUIT PER JESD22, METHOD A114-B, 2,200V
CY7C68013A (7C682001A) 4416666
610437607
TAIWN-G
COMP
9
0
CY7C68013A (7C681000A) 4416701
610434407/8
TAIWN-G
COMP
9
0
CY2SSTU877 (7C82877A)
4413035
H19747
TAIWN-G
COMP
9
0
CY2SSTU877 (7C87740A)
4417143
H20549
TAIWN-G
COMP
9
0
STRESS: ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015, 2,200V
CY7C68013A (7C682001A) 4416666
610437607
TAIWN-G
COMP
3
0
CY7C68013A (7C681000A) 4416701
610434407/8
TAIWN-G
COMP
3
0
CY2SSTU877 (7C82877A)
4413035
H19747
TAIWN-G
COMP
3
0
CY2SSTU877 (7C87740A)
4417143
H20549
TAIWN-G
COMP
3
0
Failure Mechanism
Cypress Semiconductor
FX2LP/FX1-128 Device Family, C8Q-3R Technology, Fab4
Device: CY7C68013/4/5/6A, CY7C64713, CY7C68300/1B, CY7C68320/1
QTP# 044505, V, 1.0
Page 8 of 11
July 2005
Reliability Test Data
QTP #:
Device
Fab Lot #
Assy Lot #
033805
Assy Loc Duration Samp
Rej
Failure Mechanism
STRESS: HIGH TEMP STEADY STATE LIFE TEST (150C, 3.63V)
CY7C68013A (7C682005A) 4416701
610438121
TAIWN-G
80
80
0
CY7C68013A (7C682005A) 4416701
610438121
TAIWN-G
168
80
0
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE (125C, 3.8V, Vcc Max)
CY7C68013A (7C682001A) 4416666
610437607
TAIWN-G
96
499
0
CY7C68013A (7C682005A) 4417143
610443845
TAIWN-G
96
514
0
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE (125C, 3.8V, Vcc Max)
CY7C68013A (7C682001A) 4416666
610437607
TAIWN-G
168
200
0
CY7C68013A (7C682001A) 4416666
610437607
TAIWN-G
1000
194
0
CY7C68013A (7C682005A) 4417143
610443845
TAIWN-G
168
208
0
CY7C68013A (7C682005A) 4417143
610443845
TAIWN-G
1000
208
0
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE (125C, 2.35V, Vcc Max)
CY2SSTU877 (7C87741A)
4416666B
H20592
TAIWN-G
96
276
0
CY2SSTU877 (7C82877A)
4416701
H20501
TAIWN-G
96
126
0
CY2SSTU877 (7C87741A)
4416701
H20500
TAIWN-G
96
89
0
CY2SSTU877 (7C87740A)
4416791B
H20536
TAIWN-G
96
169
0
CY2SSTU877 (7C87741A)
4417975
H20583
TAIWN-G
96
304
0
CY2SSTU877 (7C87741A)
4419587
H20650
TAIWN-G
96
500
0
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE (125C, 2.35V, Vcc Max)
CY2SSTU877 (7C87741A)
4416666B
H20592
TAIWN-G
1000
253
0
CY2SSTU877 (7C87740A)
4417143
H20549
TAIWN-G
168
150
0
CY2SSTU877 (7C87740A)
4417143
H20549
TAIWN-G
1000
150
0
STRESS: HI-ACCEL SATURATION TEST (130C, 85%RH, 3.63V), PRE COND 192 HR, 30C/60%RH, MSL3
CY7C68013A (7C682001A) 4416666
610437607
TAIWN-G
128
47
0
CY7C68013A (7C682001A) 4416666
610437607
TAIWN-G
256
47
0
CY7C68013A (7C682000A) 4416701
610437702
TAIWN-G
128
47
0
CY7C68013A (7C682000A) 4416701
610437702
TAIWN-G
256
45
0
STRESS: HI-ACCEL SATURATION TEST (130C, 85%RH, 1.8V), PRE COND 192 HR, 30C/60%RH, MSL3
CY2SSTU877 (7C87741A)
4417975
H20583
TAIWN-G
128
43
0
Cypress Semiconductor
FX2LP/FX1-128 Device Family, C8Q-3R Technology, Fab4
Device: CY7C68013/4/5/6A, CY7C64713, CY7C68300/1B, CY7C68320/1
QTP# 044505, V, 1.0
Page 9 of 11
July 2005
Reliability Test Data
QTP #:
Device
Fab Lot #
Assy Lot #
033805
Assy Loc Duration Samp
Rej
STRESS: LOW TEMPERATURE OPERATING LIFE (-30C, 4.3V)
CY7C68013A (7C682005A) 4416701
610438121
TAIWN-G
500
80
0
STRESS: HIGH TEMPERATURE STORAGE, 150C, no bias
CY7C68013A (7C681000A) 4416701
610434407/8
TAIWN-G
500
50
0
CY7C68013A (7C681000A) 4416701
610434407/8
TAIWN-G
1000
50
0
CY2SSTU877 (7C87740A)
4417143
H20549
TAIWN-G
500
45
0
CY2SSTU877 (7C87740A)
4417143
H20549
TAIWN-G
1000
45
0
STRESS: PRESSURE COOKER TEST (121C, 100%RH), PRE COND 192 HR, 30C/60%RH, MSL3
CY7C68013A (7C681000A) 4416666
610434406
TAIWN-G
168
50
0
CY7C68013A (7C681000A) 4416666
610434406
TAIWN-G
288
50
0
CY7C68013A (7C681000A) 4416701
610434407/8
TAIWN-G
168
50
0
CY7C68013A (7C681000A) 4416701
610434407/8
TAIWN-G
288
50
0
CY2SSTU877 (7C82877A)
4413035
H19747
TAIWN-G
168
47
0
CY2SSTU877 (7C82877A)
4413035
H19747
TAIWN-G
288
47
0
CY2SSTU877 (7C87740A)
4417143
H20549
TAIWN-G
168
45
0
CY2SSTU877 (7C87740A)
4417143
H20549
TAIWN-G
288
45
0
STRESS: TC COND. C -65C TO 150C, PRE COND 192 HRS, 30C/60%RH, MSL3
CY7C68013A (7C681000A) 4416666
610434406
TAIWN-G
300
50
0
CY7C68013A (7C681000A) 4416666
610434406
TAIWN-G
500
50
0
CY7C68013A (7C681000A) 4416666
610434406
TAIWN-G
1000
50
0
CY7C68013A (7C681000A) 4416701
610434407/8
TAIWN-G
168
50
0
CY7C68013A (7C681000A) 4416701
610434407/8
TAIWN-G
500
50
0
CY7C68013A (7C681000A) 4416701
610434407/8
TAIWN-G
1000
50
0
CY2SSTU877 (7C82877A)
4413035
H19747
TAIWN-G
300
46
0
CY2SSTU877 (7C82877A)
4413035
H19747
TAIWN-G
500
45
0
CY2SSTU877 (7C82877A)
4413035
H19747
TAIWN-G
1000
45
0
CY2SSTU877 (7C87740A)
4417143
H20549
TAIWN-G
300
45
0
CY2SSTU877 (7C87740A)
4417143
H20549
TAIWN-G
500
45
0
CY2SSTU877 (7C87740A)
4417143
H20549
TAIWN-G
1000
45
0
Failure Mechanism
Cypress Semiconductor
FX2LP/FX1-128 Device Family, C8Q-3R Technology, Fab4
Device: CY7C68013/4/5/6A, CY7C64713, CY7C68300/1B, CY7C68320/1
QTP# 044505, V, 1.0
Page 10 of 11
July 2005
Reliability Test Data
QTP #:
Device
Fab Lot #
Assy Lot #
033805
Assy Loc Duration Samp
Rej
STRESS: STATIC LATCH-UP TESTING (125C, 5.5V, ±300mA)
CY2SSTU877 (7C82877A)
4413035
H19747
TAIWN-G
COMP
3
0
CY2SSTU877 (7C87740A)
4417143
H20549
TAIWN-G
COMP
3
0
COMP
3
0
COMP
3
0
STRESS: STATIC LATCH-UP TESTING (125C, 6.5V, ±300mA)
CY7C68013A (7C682001A) 4416666
610437607
TAIWN-G
STRESS: STATIC LATCH-UP TESTING (125C, 7.5V, ±300mA)
CY7C68013A (7C682001A) 4416701
610437657
TAIWN-G
Failure Mechanism
Cypress Semiconductor
FX2LP/FX1-128 Device Family, C8Q-3R Technology, Fab4
Device: CY7C68013/4/5/6A, CY7C64713, CY7C68300/1B, CY7C68320/1
QTP# 044505, V, 1.0
Page 11 of 11
July 2005
Reliability Test Data
QTP #:
Device
Fab Lot #
044505
Assy Lot # Assy Loc Duration Samp
Rej
STRESS: ESD-CHARGE DEVICE MODEL (500V)
CY7C68013A (7C681000B)
4445356
610500431
TAIWN-G
COMP
9
0
9
0
COMP
3
0
STRESS: ESD-HUMAN BODY CIRCUIT PER JESD22, METHOD A114-B, 2,200V
CY7C68013A (7C681000B)
4445356
610500431
TAIWN-G
COMP
STRESS: ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015, 2,200V
CY7C68013A (7C681000B)
4445356
610500431
TAIWN-G
STRESS: STATIC LATCH-UP TESTING (125C, 7.5V, ±100mA)
CY7C68013A (7C681000B)
4450548
610508837
TAIWN-G
COMP
6
0
CY7C68013A (7C681000B)
4503135
610511953
TAIWN-G
COMP
6
0
CY7C68013A (7C681000B)
4507150
610517384
TAIWN-G
COMP
6
0
Failure Mechanism
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