IRF IRF5N3415

PD - 94267
HEXFET® POWER MOSFET
SURFACE MOUNT (SMD-1)
IRF5N3415
150V, N-CHANNEL
Product Summary
Part Number
BVDSS
IRF5N3415
150V
RDS(on)
ID
0.042Ω 37.5A
Fifth Generation HEXFET® power MOSFETs from
International Rectifier utilize advanced processing
techniques to achieve the lowest possible on-resistance
per silicon unit area. This benefit, combined with the
fast switching speed and ruggedized device design
that HEXFET power MOSFETs are well known for,
provides the designer with an extremely efficient device
for use in a wide variety of applications.
These devices are well-suited for applications such
as switching power supplies, motor controls, inverters, choppers, audio amplifiers and high-energy pulse
circuits.
SMD-1
Features:
n
n
n
n
n
n
n
Low RDS(on)
Avalanche Energy Ratings
Dynamic dv/dt Rating
Simple Drive Requirements
Ease of Paralleling
Hermetically Sealed
Light Weight
Absolute Maximum Ratings
Parameter
ID @ VGS = 10V, TC = 25°C
ID @ VGS = 10V, TC = 100°C
IDM
PD @ TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
T STG
Units
Continuous Drain Current
Continuous Drain Current
Pulsed Drain Current ➀
Max. Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy ➁
Avalanche Current ➀
Repetitive Avalanche Energy ➀
Peak Diode Recovery dv/dt ➂
Operating Junction
Storage Temperature Range
37.5
22
150
125
1.0
±20
210
22
12.5
3.0
-55 to 150
Package Mounting Surface Temp.
Weight
300 (for 5s)
2.6 (Typical)
A
W
W/°C
V
mJ
A
mJ
V/ns
o
C
g
For footnotes refer to the last page
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1
06/19/01
IRF5N3415
Electrical Characteristics @ Tj = 25°C (Unless Otherwise Specified)
Parameter
Min
Typ Max Units
Test Conditions
BVDSS
Drain-to-Source Breakdown Voltage
∆BV DSS/∆T J Temperature Coefficient of Breakdown
Voltage
RDS(on)
Static Drain-to-Source On-State
Resistance
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
IDSS
Zero Gate Voltage Drain Current
150
—
—
V
VGS = 0V, ID = 250µA
—
0.18
—
V/°C
Reference to 25°C, ID = 1.0mA
—
—
0.042
Ω
2.0
19
—
—
—
—
—
—
4.0
—
25
250
V
S( )
IGSS
IGSS
Qg
Q gs
Q gd
td(on)
tr
td(off)
tf
LS + LD
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain (‘Miller’) Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Inductance
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
4.0
100
-100
200
17
98
20
110
75
110
—
Ciss
C oss
C rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
—
—
—
2700
560
280
—
—
—
VGS = 10V, ID = 22A ➃
Ω
µA
l
nA
nC
VDS = VGS, ID = 250µA
VDS =15V, IDS = 22A ➃
VDS = 150V ,VGS=0V
VDS = 120V,
VGS = 0V, TJ =125°C
VGS =-20V
VGS = -20V
VGS =10V, ID = 22A
VDS = 120V
VDD = 75V, ID = 22A,
VGS = 10V, RG = 2.5Ω
ns
nH Measured from the center of drain
pad to the center of source pad
VGS = 0V, VDS = 25V
f = 1.0MHz
pF
Source-Drain Diode Ratings and Characteristics
Parameter
IS
ISM
VSD
t rr
QRR
ton
Min Typ Max Units
Continuous Source Current (Body Diode)
Pulse Source Current (Body Diode) ➀
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
—
—
—
—
—
—
—
—
—
—
37.5
150
1.3
390
3.3
Test Conditions
A
V
ns
µC
Tj = 25°C, IS = 22A, VGS = 0V ➃
Tj = 25°C, IF = 22A, di/dt ≤ 100A/µs
VDD ≤ 50V ➃
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
Thermal Resistance
Parameter
RthJC
Junction-to-Case
Min Typ Max Units
—
—
1.0
Test Conditions
°C/W
Note: Corresponding Spice and Saber models are available on the G&S Website.
For footnotes refer to the last page
2
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IRF5N3415
1000
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
100
100
4.5V
10
20µs PULSE WIDTH
T = 25 C
°
J
1
0.1
1
10
4.5V
10
100
TJ = 25 ° C
100
TJ = 150 ° C
15
V DS = 50V
20µs PULSE WIDTH
8.0
9.0
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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R DS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
2.5
7.0
10
100
Fig 2. Typical Output Characteristics
1000
6.0
°
J
1
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
5.0
20µs PULSE WIDTH
T = 150 C
1
0.1
VDS , Drain-to-Source Voltage (V)
10
4.0
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
ID = 37.5A
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VGS = 10V
0
20
40
60
80 100 120 140 160
TJ , Junction Temperature( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRF5N3415
VGS =
Ciss =
Crss =
Coss =
C, Capacitance (pF)
5000
0V,
f = 1MHz
Cgs + Cgd , Cds SHORTED
Cgd
Cds + Cgd
4000
Ciss
3000
C
oss
2000
Crss
1000
20
VGS , Gate-to-Source Voltage (V)
6000
0
ID = 22A
VDS = 120V
VDS = 75V
VDS = 30V
16
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
1
10
100
0
VDS , Drain-to-Source Voltage (V)
80
120
160
200
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
ID, Drain-to-Source Current (A)
1000
ISD , Reverse Drain Current (A)
40
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
TJ = 150 ° C
TJ = 25 ° C
1
V GS = 0 V
0.6
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
10
0.1
0.2
1.0
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
1.4
10
1ms
Tc = 25°C
Tj = 150°C
Single Pulse
10ms
1
1
10
100
1000
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRF5N3415
40
RD
V DS
I D , Drain Current (A)
VGS
D.U.T.
RG
30
+
-V DD
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
20
Fig 10a. Switching Time Test Circuit
10
VDS
90%
0
25
50
75
100
125
150
TC , Case Temperature ( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
10
1
D = 0.50
0.20
PDM
0.10
0.1
t1
0.05
0.02
0.01
0.01
0.00001
t2
SINGLE PULSE
(THERMAL RESPONSE)
0.0001
Notes:
1. Duty factor D = t 1 / t 2
2. Peak TJ = P DM x Z thJC + TC
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF5N3415
1 5V
D R IV E R
L
VD S
D .U .T.
RG
+
V
- DD
IA S
VGS
20V
tp
A
0 .0 1 Ω
Fig 12a. Unclamped Inductive Test Circuit
EAS , Single Pulse Avalanche Energy (mJ)
400
TOP
BOTTOM
300
ID
10A
14A
22A
200
100
0
25
V (B R )D S S
50
75
100
125
150
Starting TJ , Junction Temperature ( ° C)
tp
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
IAS
Current Regulator
Same Type as D.U.T.
Fig 12b. Unclamped Inductive Waveforms
50KΩ
.2µF
12V
.3µF
QG
10V
D.U.T.
QGS
+
V
- DS
QGD
VGS
VG
3mA
IG
Charge
Fig 13a. Basic Gate Charge Waveform
6
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRF5N3415
Footnotes:
 Repetitive Rating; Pulse width limited by
ƒ ISD ≤ 22A, di/dt ≤ 100 A/µs,
maximum junction temperature.
‚ VDD = 25 V, Starting TJ = 25°C, L= 0.87mH
Peak IAS = 22A, VGS = 10V, RG= 25Ω
„ Pulse width ≤ 300 µs; Duty Cycle ≤ 2%
VDD ≤ 150V, TJ ≤ 150°C
Case Outline and Dimensions — SMD-1
PAD ASSIGNMENTS
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.
Data and specifications subject to change without notice. 06/01
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