CYUSBS234 USB-Serial DVK Schematic

5
4
3
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D
D
CYUSBS234 USB TO SERIAL DVK BOARD
PAGE NO
01
TITLE
TITLE PAGE
C
C
02
POWER SUPPLIES
03
CYUSBS234 DEVICE CONNECTION
04
PMIC, MICRO USB CKT
05
UART,EEPROM FOR SCB0
06
GPIO HDR,JUMPERS FOR SCB0
B
B
PCBA NUMBER : 121-60096-01
PCB NUMBER : 600-60114-01
FAB DRAWING NUMBER : 610-60113-01
ASSEMBLY DRAWING NUMBER : 620-60114-01
CYPRESS SEMICONDUCTOR © 2013
Title
A
A
CYUSBS234 USB TO SERIAL DVK BOARD
Size
A
Document Number
630-60114-01
Rev
02
TITLE PAGE
Date:
5
4
3
Tuesday, June 25, 2013
2
Sheet
1
of
1
6
5
4
TP17
1
5V DC INPUT
D
TP19
VIN
SW1
R48
SK44BL-TP
C1
C2
+
+
1
0R
1
22uF_25V
1
VSYS
TP18
+ C3
PJ-102AH
330uF_25V
1
EXTERNAL DC - 5V
3
10UF_16V
3
SPDT SWITCH
1
3
2
2
V5p0_JACK
D1
J1
3
2
1
D
2
C4
+ C5
+
SPDT_SWITCH
1101M2S3CQE2
C&K Components
100uF_10V
R1
C6
+ C7
+
330uF_10V_NL
100uF_10V_NL
330uF_10V
180R
D2
LTST-C190KG
[email protected] LDO REGULATOR
C
TP11
TP12
TP13
TP14
1
1
1
TP10
V3p3
1
TP9
VIN
GND TEST POINTS
1
C
U2
TP15
4
R49
0R
VIN
VOUT
5
R50
0R
C8
3
C9
CE
4.7UF_16V
C43
2.2UF_NL
C44
C45
R2
68R
0.1UF_NL 0.01UF_NL
4.7UF_16V
2
GND
ADJ/NC
1
D4
LTST-C190KG
NCP694H33HT1G
NCP694H33HT1G
ON Semiconductor
Place the GND test points
across 4 corners of the board.
B
B
GENERAL LAYOUT NOTE
1.Label all the Jumpers with prompt net names.
2.Provide 3X spacing between digital traces.
3.Power Trace minimum width should be 40 mil.
4.Add Four #4-40 mounting holes at board corner.
A
A
CYPRESS SEMICONDUCTOR © 2013
Title
CYUSBS234 USB TO SERIAL DVK BOARD
Size
B
Document Number
630-60114-01
Rev
02
POWER SUPPLIES
Date:
5
4
3
2
Tuesday, June 25, 2013
Sheet
1
2
of
6
5
4
3
2
1
CYUSBS234 DEVICE CONNECTION
VBUS
U1
12
VCCD
VSSD1
VSSD2
VSSD3
VSSA
EPAD
C10
D
1UF_16V
3
13
16
17
25
R63
0R
D
J29
1
V3p3
VBUS
VDDD
L2
24
BUSDETECT_GPIO_8
BLM21PG221SN1D
VBUS
R10
USBDM
+ C16
C14
10UF_16V
2.2UF_16V
J4
1
2
2PIN JUMPER
J8
1
0.01UF_16V
COUT0
LTST-C190KG
R13
3
R64
USB_DP {4}
11
7
C46
USB_DM {4}
100K_NL
R14
560R
CAPSENSE 1
Sensor
GPIO_0
0.1UF_16V
Shield
J28
19
2.2nF
C
1
WATERSHIELD
C47
2
10pF_NL
SHIELD
3
BUSDETECT_GPIO_8
4
BCD0_GPIO_9
5
BCD1_GPIO_10
6
{6} SCB_0
{6} SCB_1
{6} SCB_2
{6} SCB_3
2
2PIN JUMPER
D7
18
GPIO_1
{6} SCB_4
B
10
VSYS
2
0R
CAPSENSE BUTTON 10MM ROUND
C41
BCD0_GPIO_9
19.6K_1%
{4} BCD1_EN
0.1UF_16V
GPIO_11
2
2PIN JUMPER
{4} BCD0_EN
C17
CMOD
1
R11
C15
R7
B1
J7
10K_1%
BCD1_GPIO_10 {6}
C
USBDP
VDDD
15
{6} SCB_5
270R
1
20
21
22
23
2
GPIO_8
SUSPEND
8
SUSPEND {6}
GPIO_9
GPIO_10
SCB_0_GPIO_6
V3p3
SCB_1_GPIO_2
WAKEUP
9
WAKEUP {6}
TP6
SCB_2_GPIO_3
R12
100R
1
SCB_3_GPIO_4
SCB_4_GPIO_5
XRES
14
SW3
EVQ-PAC07K
B1
B2
RESET#
SCB_5_GPIO_7
A1
A2
B
C26
PART_NUMBER = EVQ-PAC07K
Manufacturer = Panasonic
0.01UF_16V
CY7C65211-24LTXI
LAYOUT NOTES
1. Capsense pin should be 10mm dia.
2. No plane or trace under capsense button
in any layer.
3. Hatching around capsense button is needed.
A
4. Capsense button to ground spacing should be 20mil.
A
CYPRESS SEMICONDUCTOR © 2013
5. Hatching Details: Typical hatching for the
ground fill is 25 percent on the top layer (7 mil
line, 45 mil spacing) and 17 percent on the bottom
layer (7 mil line, 70 mil spacing).
Title
CYUSBS234 USB TO SERIAL DVK BOARD
Size
B
Document Number
630-60114-01
Rev
02
CYUSBS234 DEVICE CONNECTION
Date:
5
4
3
2
Tuesday, June 25, 2013
Sheet
1
3
of
6
5
4
3
2
USB TO UART
1
PMIC CIRCUIT
D
D
VBAT
V3p3
U3
1
R65
C19
IN
EN2
4
C20
V3p3
6
68R
L3
D5
BLM21PG221SN1D
0.1UF_16V
LTST-C190KG
SYS1
DP
GND
SHIELD1
SHIELD2
3
4
5
6
7
U4
D+
1
R5
IO1A
IO1B
6
R67
0R
100K
C22
POK
SYS2
VSYS
BCD0_EN {3}
R54
TP2
USB_VBUS
10
4.7K
13
14
R51
0R
R9
+
USB_DP {3}
0.1UF_16V
SETI
12
D6
LTST-C190KG
C21
4.7uF / 25V
SETI
C
180R
+
C42
4.7uF / 25V_NL
L4
BLM21PG221SN1D
2
USB - MICRO B
DX4R005J91R1500
JAE Electronics
G
V
5
R8
8
GATE
BAT1
1
TP3
BATTERY CIRCUIT
VBAT
SW2
3
23.58K
3
IO2A
IO2B
4
R66
0R
11
GND
BAT2
EPAD
THM
2
2
R52
1
0R
USB_DM {3}
+ C23
15
USBLC6-2
USBLC6-2SC6
ST Micro.
C25
+ C24
5
22uF
SPDT_SWITCH
1
C
4.7K
4.7K_NL
CHG
J2
D-
R53
R29
VL
EN1
R3
1
2
J3
2PIN JUMPER
BCD1_EN {3}
V3p3
TP1
4.7UF_16V
VBUS
DM
9
+
4.7uF / 25V
USB MICRO-B
3
4.7K_NL
2
C18
0R
R33
1
VBUS
VBUS
TP16
22uF
BH1
0530470210
Low ESR
0.1UF_16V
MAX8856ETD+T
MAX8856ETD+T
Maxim Integrated
2
V3p3
R26
91K
Battery part no:
B
R46
0R
LAYOUT NOTES
R47
0R_NL
R25
47K_1%
30011-02
B
Tenergy Li-Ion 18650 3.7V 2600mAh
Rechargeable Battery w/ PCB & Molex
Connector
1. Place U4 closer to J2.
2. USB 90 ohm differential pairs should be
routed with ground reference.
NOTE:
3. Add ground vias near the USB differential
vias for Z-Axis reference.
4. VBUS trace width should be minimum 20mil.
1.Load the resistor R46 by default, if temperature sensing
is not required remove R46 and load R47.
2.Place NTC Thermistor R25 in close proximity to
Battery to monitor the Battery Temperature
A
A
CYPRESS SEMICONDUCTOR © 2013
Title
CYUSBS234 USB TO SERIAL DVK BOARD
Size
B
Document Number
630-60114-01
Rev
02
PMIC, MICRO USB CKT
Date:
5
4
3
2
Tuesday, June 25, 2013
Sheet
1
4
of
6
5
4
3
UART PORT FOR SCB
2
1
I2C EEPROM FOR SCB
V3p3
V3p3
R55
V3p3
D
V3p3
D
C38
4.7K
0.1UF_16V
0.1UF_16V
24
1
1
2
3
C2+
V-
3
2.2K
SDA {6}
6
SCL
SCL_IN_OUT {6}
7
WP
R44
0R
24LC128-I/SM
11
C21
14
13
T1IN
T1OUT
T2IN
T2OUT
9
10
TxD {5}
{5} DSR#
DTR# {5}
{5} RxD
C
DCD
LTST-C193KGKT-5A
{6} DTR#_OUT
2.2K
J15
G3
0.1UF_16V
270R
{6} TxD_OUT
A2
R23
5
SDA
24LC128
R24
C34
2
R16
A1
0.1UF_16V
0.1UF_16V
D8
A0
C30
C33
V3p3
VCC
27
C1-
8
22
C29
V+
GND
C1+
4.7K_NL
4
28
U7
FORCEOFF
U5
VCC
0.1UF_16V
C
V3p3
R56
26
C27
6
SPI EEPROM FOR SCB
DSR
2
RX
V3p3
V3p3
{6} RTS#_OUT
V3p3
12
T3IN
T3OUT
11
RTS# {5}
{5} RTS#
7
RTS
C37
V3p3
19
{6} RxD_OUT
{6} DSR#_OUT
18
3
R2OUTB
R21
R1OUT
R1IN
R2OUT
R2IN
{5} CTS#
4
8
CTS
RxD {5}
{5} DTR#
5
4
DTR
9
{6} CTS#_OUT
17
R3OUT
R3IN
R4OUT
R4IN
R5OUT
R5IN
6
5
U8
{6} SSEL_IN_OUT
1
{6} MISO_IN_OUT
2
{6} MOSI_IN_OUT
5
{6} SCLK_IN_OUT
6
S
W
10K
10K
3
D
B
C
4
10
8
R20
Q
G1
7
R57
15
RI
CTS# {5}
V3p3
16
10K
DSR# {5}
B
R22
TX
8
20
LTST-C193KGKT-5A
{5} TxD
VCC
270R
VSS
R18
G2
D10
0.1UF_16V
DB9M
182-009-113R531
Norcomp Inc
HOLD
7
M95M02-DRMN6TP
M95M02-DRMN6TP
STMicroelectronics
INVALID
25
21
GND
4.7K
TP7
TP40_SMD
FORCEON
23
R58
MAX3245EEUI+
4.7K_NL
A
A
CYPRESS SEMICONDUCTOR © 2013
Title
CYUSBS234 USB TO SERIAL DVK BOARD
Size
B
Document Number
630-60114-01
Rev
02
UART,EEPROM FOR SCB
Date:
5
4
3
2
Tuesday, June 25, 2013
Sheet
1
5
of
6
5
4
3
2
1
JUMPER CONFIG FOR SCB
J17
1
D
J18
1
D
1
RxD_OUT {5}
2
{3} SCB_0
2
{3} SCB_1
3
4
3
SCB_0_GPIO_6
3
SCB_1_GPIO_2
{3} SCB_2
2
4
DSR#_OUT {5}
5
SSEL_IN_OUT {5}
4PIN JUMPER
SCL_IN_OUT {5}
RTS#_OUT {5}
MISO_IN_OUT {5}
5PIN JUMPER
J20
J22
1
SCB_3_GPIO_4
1
J21
1
3
2
{3} SCB_3
SCB_2_GPIO_3
J19
4
5
SDA {5}
2
{3} SCB_4
4
CTS#_OUT {5}
3
MOSI_IN_OUT {5}
SCB_4_GPIO_5
{3} SCB_5
DTR#_OUT {5}
2
TxD_OUT {5}
3
SCB_5_GPIO_7
SCLK_IN_OUT {5}
4PIN JUMPER
5PIN JUMPER
C
C
24-QFN
PIN
1
20
B
DEFAULT
NAME
SCB_0
SCB_1
CONFIGURATION
UART
CONFIGURATION1
SCB_0
SPI
CONFIGURATION2
I2C
CONFIGURATION3
RxD
SCB_1
EXTERNAL HEADER
J23
CONFIGURATION4
P1.0
SCB_0_GPIO_6
1
2
P0.2
SCB_1_GPIO_2
3
4
P0.3
SCB_2_GPIO_3
5
6
GPIO_2
P0.4
SCB_3_GPIO_4
7
8
P0.5
SCB_4_GPIO_5
9
10
GPIO_6
DSR#
SSEL_OUT
21
SCB_2
SCB_2
RTS#
MISO_IN
SCL_OUT
GPIO_3
22
SCB_3
SCB_3
CTS#
MOSI_OUT
SDA
GPIO_4
23
SCB_4
SCB_4
TxD
SCLK_OUT
2
SCB_5
SCB_5
DTR#
NOTE:
GPIO HEADER
SCB_5_GPIO_7
P1.1
SUSPEND {3}
WAKEUP {3}
BCD1_GPIO_10 {3}
P1.4
HEADER 5X2
GPIO_5
GPIO_7
B
The Pins of 5 pin Header J17 and
J20 should be placed as shown in
the below figure
4
1
2
3
5
A
A
CYPRESS SEMICONDUCTOR © 2013
Title
CYUSBS234 USB TO SERIAL DVK BOARD
Size
B
Document Number
630-60114-01
Rev
02
GPIO HDR,JUMPER FOR SCB
Date:
5
4
3
2
Tuesday, June 25, 2013
Sheet
1
6
of
6