TOSHIBA TMP87PS39F

TMP87PS39
CMOS 8-Bit Microcontroller
TMP87PS39N/F
The TMP87PS39 is a One-Time PROM microcontroller with low-power 543 Kbits (a 60 Kbytes
program memory and a 256 characters OSD font memory) electrically programmable read only
memory for the TMP87CS39 system evaluation. The TMP87PS39 is pin compatible with the
TMP87CS39. The operations possible with the TMP87CS39 can be performed by writing programs
and OSD character data to PROM. The TMP87PS39 can write and verify in the same way as the
TC571000 using an adaptor socket BM11118/BM11138 and an EPROM programmer.
Part No.
TMP87PS39N
TMP87PS39F
OTP
RAM
60 Kbytes 14 u 18 u 256 bits
2 Kbytes
Package
Adaptor Socket
P-SDIP64-750-1.78
BM11118
P-QFP64-1420-1.00A
BM11138
030519EBP1
xThe information contained herein is subject to change without notice.
xThe information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by
TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its
use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or
others.
xTOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general
can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer,
when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid
situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to
property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most
recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for
Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc..
xThe TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal
equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are
neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunctionor
failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control
instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments,
medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made
at the customer’s own risk.
xThe products described in this document are subject to the foreign exchange and foreign trade laws.
xTOSHIBA products should not be embedded to the downstream products which are prohibited to be produced and sold, under any law
and regulations.
xFor a discussion of how the reliability of microcontrollers can be predicted, please refer to Section 1.3 of the chapter entitled Quality
and Reliability Assurance/Handling Precautions.
Purchase of TOSHIBA I2C components conveys a license under the Philips I2C Patent Rights to use
these components in an I2C system, provided that the system conforms to the I2C Standard
Specification as defined by Philips.
87PS39-1
2003-06-03
TMP87PS39
52
53
54
55
56
57
58
59
60
61
62
63
64
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
D0/P00
D1/P01
D2/P02
D3/P03
D4/P04
D5/P05
YCC/VDD
VSS
D6/P06
D7/P07
( INT0 ) P10
(INT1) P11
(INT2/TC1) P12
32
31
30
29
28
27
26
25
24
23
22
21
20
P71 ( VD )
P70 ( HD )
P67 (Y/BL)/A15
P66 (B)/A14
P65 (G)/A13
P64 (R)/A12
VSS/GND
P63/A11
P62/A10
P61 (AIN7)/A9
P60 (AIN6)/A8
P57 (AIN5)/A7
P56 (AIN4)/A6
CE/(DVO) P13
OE/(PPG) P14
PGM/(TC2) P15
P16
P17
(PWM0) P40
(PWM1) P41
(PWM2) P42
(PWM3) P43
(PWM4) P44
(PWM5) P45
(PWM6) P46
(PWM7) P47
A0/(PWM8) P50
A1/(PWM9) P51
A2/(AIN0) P52
A3/(AIN1) P53
A4/(AIN2) P54
A5/(AIN3) P55
TMP87PS39F
P-QFP64-1420-1.00A
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
P-QFP64-1420-1.00A
P36 (SCK)
P35 (SDA/SO)
P34 (SCL/SI)
P33 (TC4)
P32 (INT4)
P31 (TC3)
P30 (INT3/RXIN)/A16
P22 (XTOUT)
P21 (XTIN)
P20 (INT5/STOP)
RESET
XOUT
XIN
TEST/VPP
OSC2
OSC1
P74 (CSK1)
P73 (SDA1/SO1)
P72 (SCL1/SI1)
Pin Assignments (Top View)
P-SDIP64-750-1.78
TMP87PS39N
P-SDIP64-750-1.78
VSS
D6/P06
D7/P07
( INT0 ) P10
(INT1) P11
(INT2/TC1) P12
CE /( DVO ) P13
OE /( PPG ) P14
PGM /(TC2) P15
P16
P17
( PWM0 ) P40
( PWM1 ) P41
( PWM2 ) P42
( PWM3 ) P43
( PWM4 ) P44
( PWM5 ) P45
( PWM6 ) P46
( PWM7 ) P47
A0/( PWM8 ) P50
A1/( PWM9 ) P51
A2/(AIN0) P52
A3/(AIN1) P53
A4/(AIN2) P54
A5/(AIN3) P55
A6/(AIN4) P56
A7/(AIN5) P57
A8/(AIN6) P60
A9/(AIN7) P61
A10/P62
A11/P63
GND/VSS
87PS39-2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
VDD/VCC
P05/D5
P04/D4
P03/D3
P02/D2
P01/D1
P00/D0
P36 ( SCK )
P35 (SDA/SO)
P34 (SCL/SI)
P33 (TC4)
P32 (INT4)
P31 (TC3)
P30 (INT3/RXIN)/A16
P22 (XTOUT)
P21 (XTIN)
P20 ( INT5 / STOP )
RESET
XOUT
XIN
TEST/VPP
OSC2
OSC1
P74 ( SCK1 )
P73 (SDA1/SO1)
P72 (SCL1/SI1)
P71 ( VD )
P70 ( HD )
P67 (Y/BL)/A15
P66 (B)/A14
P65 (G)/A13
P64 (R)/A12
2003-06-03
TMP87PS39
Pin Function
The TMP87PS39 has two modes: MCU and PROM.
(1) MCU mode
In this mode, the TMP87PS39 is pin compatible with the TMP87CS39 (fix the TEST pin at
low level).
(2) PROM mode
Pin Name
(PROM mode)
Input/Output
Functions
A16
A15 to A8
P30
Input
PROM address inputs
A7 to A0
D7 to D0
CE
OE
PGM
P67 to P60
P57 to P50
I/O
Input
Input
VPP
VCC
Pin Name
(MCU mode)
Power supply
GND
PROM data input/outputs
P07 to P00
Chip enable signal input (active low)
P13
Output enable signal input (active low)
P14
Program mode signal input (active low)
P15
12.5V/5V (Program supply voltage)
TEST
5V
VDD
0V
VSS
P47 to 40
P12
Pull-up with resistance for input processing
P74 to P70
P36 to P32
P11
P21
Input
PROM mode setting pin. Be fixed at high level.
P31
P17, P16, P10
PROM mode setting pin. Be fixed at low level.
P22, P20
RESET
XIN
XOUT
Input
Output
OSC1
Input
OSC2
Output
Connect an 8 MHz oscillator to stabilize the internal state.
Non connection
87PS39-3
2003-06-03
TMP87PS39
Operational Description
The following explains the TMP87PS39 hardware configuration and operation. The
configuration and functions of the TMP87PS39 are the same as those of the TMP87CS39, except in
that a one-time PROM is used instead of an on-chip mask ROM.
The TMP87PS39 is placed in the single-clock mode during reset. To use the dual-clock mode, the
low-frequency oscillator should be turned on by executing [SET (SYSCR2). XTEN] instruction at
the beginning of the program.
1.
Operating Mode
The TMP87PS39 has two modes: MCU and PROM.
1.1
MCU Mode
The MCU mode is activated by fixing the TEST/VPP pin at low level.
In the MCU mode, operation is the same as with the TMP87CS39 (the TEST/VPP pin cannot
be used open because it has no built-in pull-down resistance).
1.1.1
Program Memory and OSD Character Font Memory
The TMP87PS39 has a 60 K u 8-bit (addresses 1100H to FFFFH in the MCU mode,
addresses 11100H to 1FFFFH in the PROM mode) of program memory and a 14 u 18 u 256
bits (addresses 04000H to 07FFFH in the PROM mode) of OSD character font memory.
0000H
0000H
00000H
04000H
Don’t use
OSD character
1100H
07FFFH
11100H
1100H
Program
Program
FFFFH
FFFFH
TMP87CS39
Program
MCU mode
(a) ROM size
0000H
Don’t use
1FFFFH
TMP87PS39
60 Kbyte
0000H
00000H
04000H
PROM mode
Don’t use
OSD character
07FFFH
Don’t use
4000H
14000H
4000H
Program
FFFFH
Program
FFFFH
TMP87CP39
MCU mode
(b) ROM size
0000H
Program
1FFFFH
TMP87PS39
48 Kbyte
0000H
00000H
04000H
PROM mode
Don’t use
OSD character
07FFFH
Don’t use
8000H
FFFFH
Program
8000H
FFFFH
Program
MCU mode
TMP87CM39
(c) ROM size
Note:
18000H
1FFFFH
Program
PROM mode
TMP87PS39
32 Kbyte
Set the PROM programmer to access only the program storage area or OSD character font area.
Figure 1.1.1 Program Memory Area
87PS39-4
2003-06-03
TMP87PS39
1.1.2
Data Memory
The TMP87PS39 has an on-chip 2 Kbytes data memory (static RAM).
1.1.3
Input/Output Circuitry
(1) Control pins
The control pins of the TMP87PS39 are the same as those of the TMP87CS39 except
that the TEST pin has no built-in pull-down resistance.
1 k:
Note:
TEST pin has no built-in pull-down resistance.
Figure 1.1.2 TEST Pin
(2) I/O ports
The I/O circuitries of TMP87PS39 I/O ports the are the same as those of the
TMP87CS39.
1.2
PROM Mode
The PROM mode is activated by setting the TEST, RESET pin and the ports P22 to P20, P17
to P16, P11 to P10 and P31 as shown in Figure 1.1.2. The PROM mode is used to write and
verify programs with a general-purpose PROM programmer. The high-speed programming
mode can be used for program operation.
The TMP87PS39 is not supported an electric signature mode, so the ROM type must be set to
TC571000.
Set the adaptor socket switch to “N”.
TMP87PS
VPP (12.75 V/5 V)
TEST
A16 to A0
VCC
VDD
P31
P21
P11
P13
P14
P15
P30
P67 to P60
P57 to P50
P07 to P00
XIN
CE
OE
PGM
D7 to D0
P10
P20
P22
P16
P17
8 MHz
XOUT
VSS
RESET
For more information on pins
refer to the section on pin
function.
GND
PROM programmer connection adaptor socket
BM11118 for TMP87PS39N, BM11138 for TMP87PS39F
Figure 1.2.1 Setting for PROM Mode
87PS39-5
2003-06-03
TMP87PS39
1.2.1
Programming Flowchart (High-speed Programming Mode)
The high-speed programming mode is achieved by applying the program voltage
(12.75 V) to the VPP pin when Vcc 6.25 V. After the address and input data are
stable, the data is programmed by applying a single 0.1 ms program pulse to the PGM
input. The programmed data is verified. If incorrect, another 0.1 ms program pulse is
applied. This process should be repeated (up to 25 times) until the program operates
correctly. After that, change the address and input data, and program as before. When
programming has been completed, the data in all addresses should be verified with Vcc
Vpp 5 V.
Start
VCC
6.25 V
VPP
12.75 V
Address
Start address
Data
FF?
Yes
No
N
0
Single 0.1 ms program pulse
N
N1
Yes
N t 25?
No
Error
Address
Verify
OK
Next address
No
Last address?
Yes
VCC
VPP
5V
5V
Read all byte
Error
Fail
OK
Pass
Figure 1.2.2 Flow Chart of High-speed Programming
87PS39-6
2003-06-03
TMP87PS39
1.2.2
Writing Method for General-purpose PROM Program
(1) Adapters
BM11118: TMP87PS39N
BM11138: TMP87PS39F
(2) Adapter setting
Switch (SW1) is set to side N.
(3) PROM programmer specifying
i)
PROM type is specified to TC571000D.
Writing voltage: 12.75 V (high-speed program mode)
ii)
Data transfer (copy) (Note 1)
In the TMP87PS39, EPROM is within the addresses 04000H to 07FFFH, and
11100H to 1FFFFH. Data is required to be transferred (copied) to the addresses
where it is possible to write. The program area in MCU mode and PROM mode is
referred to “Program memory area” in Figure 1.1.1.
iii) Writing address is specified. (Note 1)
Start address: 04000H
End address: 1FFFFH
(4) Writing
Writing/Verifying is required to be executed in accordance with PROM programmer
operating procedure.
Note 1: The specifying method is referred to the PROM programmer description. Either
write the data FFH to the unused area or set the PROM programmer to access only
the program storage area.
Note 2: When MCU is set to an adapter or the adapter is set to PROM programmer, a
position of pin 1 must be adjusted. If the setting is reversed, MCU, the adapter and
PROM program is damaged.
Note 3: The TMP87PS39 does not support the electric signature mode (hereinafter referred
to as “signature”). If the signature is used in PROM program, a device is damaged
due to applying 12 V r 0.5 V to the address pin 9 (A9). The signature must not be
used.
87PS39-7
2003-06-03
TMP87PS39
Electrical Characteristics
Absolute Maximum Ratings
Parameter
(VSS
0 V)
Symbol
Supply voltage
Pins
Ratings
VDD
Program voltage
VPP
Input voltage
VIN
Output voltage
VOUT1
Output current (Total)
Power dissipation [Topr
70qC]
Soldering temperature (time)
TEST/VPP
0.3 to 13.0
0.3 to VDD 0.3
3.2
IOUT2
Ports P60 to P63
30
Ȉ IOUT1
Ports P0, P1, P2, P3, P4, P5,
P64 to P67, P7
120
Ȉ IOUT2
Ports P60 to P63
mA
120
PD
600
mW
Tsld
260 (10 s)
Storage temperature
Tstg
55 to 125
Operating temperature
Topr
30 to 70
Note:
V
0.3 to VDD 0.3
Ports P0, P1, P2, P3, P4, P5,
P64 to P67, P7
IOUT1
Output current (Per 1 pin)
Unit
0.3 to 6.5
qC
The absolute maximum ratings are rated values which must not be exceeded during operation,
even for an instant. Any one of the ratings must not be exceeded. If any absolute maximum rating is
exceeded, a device may break down or its performance may be degraded, causing it to catch fire or
explode resulting in injury to the user. Thus, when designing products which include this device,
ensure that no absolute maximum rating value will ever be exceeded.
Recommended Operating Conditions
Parameter
Symbol
(VSS
0 V, Topr
Pins
30 to 70qC)
Conditions
Min
Max
Unit
NORMAL1
fc
Supply voltage
VDD
8 MHz
fc 32.768
kHz
IDLE1, 2
modes
SLOW mode
SLEEP mode
STOP mode
Input high voltage
VIH1
Except hysteresis input
VIH2
Hysteresis input
VDD < 4.5 V
VIH3
Input low voltage
VIL1
Except hysteresis input
VIL2
Hysteresis input
Clock frequency
fOSC
fs
VDD t 4.5 V
5.5
2.7
2.0
XIN, XOUT
OSC1, OSC2
VDD
4.5 to 5.5 V
Normal frequency mode
(FORS 0, VDD 4.5 to 5.5 V)
Doublel frequency mode
(FORS 1, VDD 4.5 to 5.5 V)
XTIN, XTOUT
V
VDD u 0.70
VDD u 0.75
VDD
VDD u 0.90
VDD u 0.30
0
VDD < 4.5 V
VIL3
fc
VDD t 4.5 V
4.5
VDD u 0.25
VDD u 0.10
4.0
8.0
4.0
fOSC d fc u
1.2 d 8.0
2.0
fOSC d fc u
0.6 d 4.0
30.0
34.0
MHz
kHz
Note 1: The recommended operating conditions for a device are operating conditions under which it can be
guaranteed that the device will operate as specified. If the device is used under operating conditions
other than the recommended operating conditions (supply voltage, operating temperature range,
specified AC/DC values etc.), malfunction may occur. Thus, when designing products which include
this device, ensure that the recommended operating conditions for the device are always adhered
to.
Note 2: Clock frequency fc; Supply voltage range is specified in NORMAL 1/2 mode and IDLE 1/2 mode.
Note 3: When using test video signal circuit, high frequency must be 8 MHz.
Note 4: When the OSD circuit is used, the supply voltage must be from 4.5 V to 5.5 V.
87PS39-8
2003-06-03
TMP87PS39
DC Characteristics
Parameter
Hysteresis voltage
Input current
(VSS
Pins
Symbol
0 V, Topr
30 to 70qC)
Conditions
Min
Typ.
Max
Unit
0.9
V
5.5 V/0 V
r2
5.5 V, VIN
5.5 V/0 V
r2
5.5 V, VIN
5.5 V/0 V
r2
5.5 V, VIN
5.5 V/0 V
VHS
Hysteresis inputs
IIN1
TEST
VDD
5.5 V, VIN
IIN2
Open drain ports
VDD
IIN3
Tri-state ports
VDD
VDD
IIN4
RESET , STOP
Input resistance
RIN2
RESET
Output leakage
current
ILO1
Sink open drain ports
VDD
5.5 V, VOUT
ILO2
Tri-state ports
VDD
5.5 V, VOUT
Output high voltage
VOH2
Tri-state ports
VDD
4.5 V, IOH
0.7 mA
Output low voltage
VOL
Except XOUT, OSC2
VDD
and ports P63 to P60
4.5 V, IOL
Output low current
IOL3
Ports P63 to P60
4.5 V, VOL
VDD
Supply current in
NORMAL 1, 2 modes
r2
220
450
5.5 V
2
5.5 V/0 V
r2
4.1
1.6 mA
0.4
1.0 V
20
13
20
6.5
10
30
70
15
35
0.5
10
VDD 5.5 V
fc 8 MHz
fs 32.768 kHz
VIN 5.3 V/0.2 V
Supply current in
IDLE 1, 2 modes
Supply current in
SLOW mode
100
IDD
VDD 3.0 V
fs 32.768 kHz
VIN 2.8 V/0.2 V
Supply current in
SLEEP mode
VDD 5.5 V
VIN 5.3 V/0.2 V
Supply current in
STOP mode
Note 1: Typical values show those at Topr
25qC, VDD
PA
k:
PA
V
mA
PA
5 V.
Note 2: Input Current IIN3; The current through pull-up resistor is not included.
Note 3: Supply Current IDD; The current (Typ. 0.5 mA) through ladder resistors of ADC is included in
NORMAL mode and IDLE mode.
AD Conversion Characteristics
Parameter
Analog reference voltage
(VSS
0 V, VDD
Conditions
4.5 to 5.5 V, Topr
30 to 70qC)
Min
Typ.
Max
VDD
Supplied from VDD pin
VDD
VSS
Supplied from VSS pin
0
0
VDD
Symbol
Analog reference voltage
range
'VAREF
Analog input voltage
VAIN
VDD VSS
V
VSS
VDD
Nonlinearity error
r1
Zero point error
r2
r2
r3
Full scale error
VDD
4.5 to 5.5V
Total error
87PS39-9
Unit
LSB
2003-06-03
TMP87PS39
AC Characteristics
Parameter
(VSS
Symbol
0 V, VDD
4.5 to 5.5 V, Topr
Conditions
Min
Typ.
Max
0.5
1.0
In NORMAL1, 2 modes
Machine cycle time
In IDLE1, 2 modes
tcy
117.6
133.3
For external clock operation
(XIN input), fc 8 MHz
50
ns
For external clock operation
(XTIN input), fs 32.768kHz
14.7
Ps
In SLEEP mode
tWCH
Low level clock pulse width
tWCL
High level clock pulse width
tWSH
Low level clock pulse width
tWSL
Recommended Oscillating Conditions
Parameter
Oscillator
(VSS
0 V, VDD
Ceramic resonator
High-frequency oscillation
4 MHz
Crystal oscillator
OSD
LC resonator
Low-frequency oscillation
Crystal oscillator
C1
XOUT
30 to 70qC)
KYOCERA
KBR8.0M
KYOCERA
KBR4.0MS
MURATA
CSA4.00MG
8 MHz
TOYOCOM
210B 8.0000
4 MHz
TOYOCOM
204B 4.0000
8 MHz
TOKO A285TNIS-11695
7 MHz
TOKO TBEKSES-30375FBY
32.768 kHz
NDK
OSC1
MX-38T
OSC2
C2
(1) High-frequency oscillation
Note 1:
4.5 to 5.5 V, Topr
Recommended Constant
Oscillation
Recommended Oscillator
Frequency
C1
C2
8 MHz
XIN
Unit
Ps
In SLOW mode
High level clock pulse width
30 to 70qC)
XTIN
30 pF
30 pF
20 pF
20 pF
15 pF
15 pF
XTOUT
C1
(2) LC resonator for OSD
C2
(3) Low-frequency oscillation
On our OSD circuit, the horizontal display start position is determined by counting the clock from LC
oscillator. So, the unstable start of oscillation after the rising edge of Horizontal Sync. Signal will be cause
the OSD distortion.
Generally, smaller C and larger L make clearer wave form at the beginning of oscillation.
We recommend that the value of LC oscillator should be equal and bigger than 33 PH.
Note 2:
To keep reliable operation, shield the device electrically with the metal plate on its package mold surface
against the high electric field, for example, be CRT (Cathode Ray Tube).
Note 3:
The product numbers and specifications of the resonators by Murata Manufacturing Co., Ltd. are subject to
change.
For up-to-date information, please refer to the following URL:
http://www.murata.co.jp/search/index.html
87PS39-10
2003-06-03
TMP87PS39
DC/AC Characteristics (PROM mode)
(VSS
0 V)
(1) Read Operation
Parameter
Symbol
Conditions
Min
Typ.
Max
Input high voltage
VIH4
VCC u 0.7
VCC
Input low voltage
VIL4
0
VCC u 0.12
Power supply voltage
VCC
4.75
5.0
5.25
1.5tcyc 300
Unit
V
Program power supply
voltage
VPP
Address access time
tACC
VCC
5.0 r 0.25 V
tcyc
ns
500 ns at 8 MHz
A16 to A0
CE
OE
PGM
tACC
High-Z
D7 to D0
Data outputs
(2) High-Speed Programming Operation
Parameter
Input high voltage
Symbol
Conditions
VIH4
Min
Typ.
Max
VCC u 0.7
VCC
Input low voltage
VIL4
0
VCC u 0.12
Power supply voltage
VCC
6.0
6.25
6.5
Program power supply
voltage
VPP
12.5
12.75
13.0
Initial program pulse width
tPW
0.095
0.1
0.105
VCC
6.0 V
Unit
V
ms
High-speed programming timing
A0 to A16
CE
OE
D7 to D0
PGM
Unknown
Input data
Data outputs
tPW
VPP
Verify
Write
Note1: When VCC power supply is turned on or after, VPP must be increased.
When VCC power supply is turned off or before, VPP must be increased.
Note2: The device must not be set to the EPROM programmer or picked op from it under applying the
program voltage (12.75 V r 0.25 V V) to the VPP pin as the device is damaged.
Note3: Be sure to execute the recommended programing mode with the recommended programing
adaptor. If a mode or an adaptor except the above, the misoperation sometimes occurs.
87PS39-11
2003-06-03
TMP87PS39
87PS39-12
2003-06-03