INTEGRATED CIRCUITS DATA SHEET TDA1591 PLL stereo decoder and noise blanker Product specification Supersedes data of March 1992 File under Integrated Circuits, IC01 1996 Sep 02 Philips Semiconductors Product specification PLL stereo decoder and noise blanker TDA1591 FEATURES GENERAL DESCRIPTION • Adjustment-free voltage controlled PLL oscillator for ceramic resonator (f = 456 kHz) • Pilot signal dependent mono/stereo switching The TDA1591 is a monolithic bipolar integrated circuit providing the stereo decoder function and noise blanking for FM car radio applications. • Analog control of mono/stereo change over [stereo blend, Stereo Noise Controller (SNC)] The device operates in a power supply range of 7.5 to 12 V. • Adjacent channel noise suppression (114 kHz) • Pilot canceller • Analog control of de-emphasis; High Cut Control (HCC) • Applicable as source selector for AM/FM/cassette switching • Separate interference noise detector • Integrated input low-pass filter for delayed noise blanking • Noise blanking at MPX-demodulator outputs • Internal voltage stabilization. QUICK REFERENCE DATA SYMBOL PARAMETER MIN. TYP. MAX. UNIT VP supply voltage (pin 5) 7.5 10 12 V IP supply current − 12 − mA Vo(rms) audio output signal (RMS value) − 900 − mV THD total harmonic distortion − 0.1 0.3 % S/N signal-to-noise ratio − 76 − dB αcs channel separation − 40 − dB Vtrigg interference voltage trigger level − 10 − mV ORDERING INFORMATION TYPE NUMBER PACKAGE NAME DESCRIPTION VERSION TDA1591 DIP20 plastic dual in-line package; 20 leads (300 mil) SOT146-1 TDA1591T SO20 plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 1996 Sep 02 2 1996 Sep 02 3 68 pF 68 kΩ 82 kΩ 0.22 µF 27 kΩ (1) C comp R1 20 22 nF CSB456F11 (Murata) 2 VCO PHASE DETECTOR 4-POLE FILTER (80 kHz) 19 10 kΩ 3 100 µF 4 16 0.1 µF 1.2 nF 470 pF 5 6 + INTERFERENCE DETECTOR 15 GATE AND HCC 14 6.8 nF 470 pF 47 nF mute on 8 NOISE DETECTOR PULSE FORMER VCO off 7 7.4 kΩ 6.8 nF 7.4 kΩ 100 kΩ 2-POLE FILTER (30 kHz) 2.2 kΩ 100 kΩ STEREO BLEND REFERENCE CURRENT LOGIC 38 kHz 17 27 kΩ 27 kΩ FB-L 6.5 kΩ 13 Fig.1 Block diagram with external components, also used as test circuit. 10 Ω 18 IDENT SWITCH 100 kΩ VOLTAGE STABILIZER 19 kHz PILOT CANCEL PILOT PILOT DETECTOR 0.1 µF interference signal (TDA1596, pin 3) 1 + 75 kΩ 470 kΩ 12 kΩ Vref = 1 to 5 V HCC + 0.22 µF R3 47 kΩ + TDA1591 47 kΩ 9 R2 47 kΩ 6.5 kΩ 12 FB-R 47 kΩ 0.22 µF 10 11 MEH027 iAUX 0.22 µF V VoR V oL 0.22 µF iAUX V PLL stereo decoder and noise blanker (1) Simulates the roll-off of the FM demodulator. INFI VP = 10 V 0.1 µF V i MPX forced mono from pin 5 SNC from IF level detector handbook, full pagewidth stereo indication Philips Semiconductors Product specification TDA1591 BLOCK DIAGRAM Philips Semiconductors Product specification PLL stereo decoder and noise blanker TDA1591 PINNING SYMBOL PIN DESCRIPTION PLL 1 phase locked loop filter OSC 2 oscillator input/output pin for ceramic resonator GND 3 ground (0 V) Iref 4 reference current VP 5 supply voltage (+10 V) INFI 6 interference signal input PUFO 7 pulse former time constant; VCO off NDET 8 noise detector time constant; mute on FB-L 9 AF feedback input for left audio signal VoL 10 AF output signal left VoR 11 AF output signal right FB-R 12 AF feedback input for right audio signal CDEEL 13 de-emphasis capacitor for left channel CDEER 14 de-emphasis capacitor for right channel HCC 15 HCC input for de-emphasis control SNC 16 stereo blend input Vref 17 externally applied reference voltage of 1 to 5 V IDENT 18 identification output (HIGH = pilot existing; stereo) PILOT 19 pilot detector level (forced mono input) Vi MPX 20 MPX input signal from IF demodulator 1996 Sep 02 handbook, halfpage PLL 1 20 Vi MPX OSC 2 19 PILOT GND 3 18 IDENT Iref 4 17 Vref VP 5 16 SNC TDA1591 INFI 6 15 HCC PUFO 7 14 CDEER NDET 8 13 CDEEL FB-L 9 12 FB-R 11 VoR VoL 10 MHA363 Fig.2 Pin configuration. 4 Philips Semiconductors Product specification PLL stereo decoder and noise blanker TDA1591 For High Cut Control (HCC), the de-emphasis time constant can be changed to higher values (see Figs 7 and 8). This function is controlled by an analog input signal. FUNCTIONAL DESCRIPTION Adapting the MPX input to the level of the FM demodulator output is realized by the value of input resistor R1 (see Fig.3). The total gain of the stereo decoder is applicable by varying the feedback resistors R2 and R3 (see Figs 1 and 4). The noise blanking facility is achieved by gating the stereo decoder output signal. The interference detector generates a gating pulse preferable forced by the level detector voltage of the IF part. In mute position and the VCO switched off (pin 7), the output amplifiers can be used for cassette playback, AM stereo purpose or other signal sources. The Stereo Noise Controller (SNC) provides a smooth mono to stereo take-over (see Fig.5). LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER MIN. MAX. UNIT VP supply voltage (pin 5) 0 13.2 V Ptot total power dissipation 0 0.25 W Tstg storage temperature −55 +150 °C Tamb operating ambient temperature −40 +85 °C Ves electrostatic handling; note 1 pins 1 and 16 −400 +400 V pin 5 −300 +300 V all other pins −600 +600 V Note 1. Equivalent to discharging a 200 pF capacitor through a 0 Ω series resistor. 1996 Sep 02 5 Philips Semiconductors Product specification PLL stereo decoder and noise blanker TDA1591 CHARACTERISTICS VP = 10 V; Tamb = 25 °C; input signal Vi MPX(p-p) = 1.7 V; m = 100% (∆f = ±75 kHz, fmod = 1 kHz); de-emphasis of 50 µs and series resistor at input R1 = 150 kΩ; measurements taken in Fig.1; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VP supply voltage (pin 5) 7.5 10 12 V IP supply current − 12 − mA − 1.7 − V Stereo decoder Vi MPX(p-p) MPX input signal on pin 20 (peak-to-peak value) ∆Vi MPX(p-p) overdrive margin of MPX input signal THD = 1% 3 − − dB Vo(rms) AF mono output signal at pins 10 and 11 (RMS value) without pilot − 900 − mV ∆Vo overdrive margin of output signal THD = 1% 3 − − dB V10-11/Vo difference of output voltage levels − − 1 dB Vo 10,11 DC output voltage (pins 10 and 11) 3.3 3.8 4.3 V Ro 10,11 output resistance − 130 − Ω αcs channel separation − 40 − dB THD total harmonic distortion − 0.1 0.3 % S/N signal-to-noise ratio f = 20 to 16000 Hz − 76 − dB α19 pilot signal suppression f = 19 kHz − 50 − dB α38 subcarrier suppression pin 16 open-circuit; see Fig.6 f = 38 kHz − 50 − dB α57 f = 57 kHz − 46 − dB α76 f = 76 kHz − 60 − dB fmod = 10 kHz; note 1 − 60 − dB fmod = 13 kHz; note 1 − 58 − dB IM2 intermodulation for fspur = 1 kHz IM3 α57ARI traffic radio (ARI) f = 57 kHz; note 2 − 70 − dB α67 Subsidiary Communication Authorization (SCA) f = 67 kHz; note 3 70 − − dB α114 Adjacent Channel Interference (ACI) f = 114 kHz; note 4 − 80 − dB f = 190 kHz; note 4 − 70 − dB f = 100 Hz; Vripple(rms) = 100 mV − 35 − dB − 456 − kHz α190 PSRR power supply ripple rejection VCO (pin 2) fosc oscillator frequency (ceramic resonator) frequency range of free running oscillator 452 − 460 kHz ∆f/f capture and holding range − 1 − % V7 VCO-off voltage (pin 7) 0 − 0.6 V 1996 Sep 02 6 Philips Semiconductors Product specification PLL stereo decoder and noise blanker SYMBOL PARAMETER TDA1591 CONDITIONS MIN. TYP. MAX. UNIT stereo on − 24 30 mV stereo off 8 20 − mV Mono/stereo control (pins 16, 17 and 19) Vi pilot(rms) pilot threshold voltage for automatic switching by pilot input voltage (RMS value) HYS hysteresis of pilot threshold voltage − 2 − dB V19 switching voltage for external mono control (pin 19) 0 − 1 V Vref reference input voltage range (pin 17) 1 − 5 V V16-17 control voltage for channel separation due to pin 17 (Vref) αcs = 6 dB; see Fig.5 − −85 − mV αcs = 26 dB; see Fig.5 − −32 − mV Pilot indicator logic level output (pin 18) V18 LOW voltage I18 = −200 µA − 250 400 mV I18 HIGH current V18 = 10 V − − 1 µA V8 < 0.4 V − 80 − dB Muting (pin 8) MUTEatt mute attenuation (pin 8) VO(offset) DC offset voltage (pins 10 and 11) V8 > 4 V − − 0.2 dB after muting − − ±400 mV HCC (pin 15) CRdeem V15-17 control range of de-emphasis see Figs 7 and 8 for European standard Cdeem = 6.8 nF 50 − 150 µs for USA standard Cdeem = 10 nF 75 − 225 µs lower value CRdeem − 0 − mV upper value CRdeem − −300 − mV V8(DC) = 7.7 V − 10 − mV V8(DC) = 6.7 V − 100 − mV V6 trigg = 10 mV − 200 − mV V6 trigg = 100 mV − 2.3 − V − 40 − µs control voltage (pin 15 due to pin 17) in both standards Noise interference detector Vtrigg trigger threshold (pin 6) fint = 120 kHz ∆V8 voltage offset as a function of Vtrigg tsup AF suppression time; pulse width I13,14 input offset current (pins 13 and 14) during AF suppression time − 20 − nA Vpulse trigger sensitivity (pin 6) τpulse = 10 µs − 10 − mV 1996 Sep 02 7 Philips Semiconductors Product specification PLL stereo decoder and noise blanker TDA1591 Notes 1. Intermodulation suppression [Beat Frequency Components (BFC)]: V o(signal) ( at 1 kHz ) IM2 = ------------------------------------------------------- ; f = ( 2 × 10 kHz ) – 19 kHz V o(spurious) ( at 1 kHz ) s V o(signal) ( at 1 kHz ) IM3 = ------------------------------------------------------- ; f = ( 3 × 13 kHz ) – 38 kHz V o(spurious) ( at 1 kHz ) s measured with 91% mono signal; fmod = 10 kHz or 13 kHz; 9% pilot signal. 2. ARI suppression: V o(signal) ( at 1 kHz ) α 57 ARI = ---------------------------------------------------------------------------V o(spurious) ( at 1 kHz ± 23 Hz ) measured with 91% stereo signal; fmod = 1 kHz; 9% pilot signal; 5% ARI subcarrier (fs = 57 kHz; fmod = 23 Hz; AM m = 0.6). 3. Subsidiary Communication Authorization (SCA): V o(signal) ( at 1 kHz ) α 67 = ------------------------------------------------------- ; f = ( 2 × 38 kHz ) – 67 kHz V o(spurious) ( at 9 kHz ) s measured with 81% mono signal; fmod = 1 kHz; 9% pilot signal; 10% SCA subcarrier (fs = 67 kHz, unmodulated). 4. Adjacent Channel Interference (ACI): V o(signal) ( at 1 kHz ) α 114 = ------------------------------------------------------- ; f = 110 kHz – ( 3 × 38 kHz ) V o(spurious) ( at 4 kHz ) s V o(signal) ( at 1 kHz ) α 190 = ------------------------------------------------------- ; f = 186 kHz – ( 5 × 38 kHz ) V o(spurious) ( at 4 kHz ) s measured with 90% mono signal; fmod = 1 kHz; 9% pilot signal; 1% spurious signal (fs = 110 kHz or 186 kHz, unmodulated). 1996 Sep 02 8 Philips Semiconductors Product specification PLL stereo decoder and noise blanker TDA1591 MEH029 4 handbook, full pagewidth Vi MPX(p-p) (V) 2 0 0 200 100 300 R1 (kΩ) Fig.3 Input signal as a function of series input resistor R1. MEH030 6 50 handbook, halfpage MEH031 handbook, halfpage αcs (dB) G (dB) 4 40 2 30 0 20 −2 10 −4 −6 Fig.4 0 20 0 −200 40 R2, R3 (kΩ) 60 Overall signal gain as a function of feedback resistors R2 and R3 (R1 = 150 kΩ). 1996 Sep 02 −100 0 control voltage V16−17 (mV) Fig.5 Stereo blend characteristic (SNC). 9 Philips Semiconductors Product specification PLL stereo decoder and noise blanker TDA1591 MEH032 50 handbook, full pagewidth αcs (dB) (1) 40 30 20 (2) 10 0 10 102 103 104 105 foAF (Hz) (1) Coupling capacitor CK at pin 20 = 10 µF. (2) Coupling capacitor CK at pin 20 = 0.1 µF. Fig.6 Channel separation as a function of audio frequency. MEH033 2 handbook, full pagewidth VoAF (dB) (1) 0 −2 (2) −4 −6 −8 −10 10 102 103 foAF (Hz) (1) V15-17 = 0. (2) V15-17 = −300 mV. Fig.7 HCC as a function of audio frequency (pin 7 connected to GND; without pre-emphasis). 1996 Sep 02 10 104 Philips Semiconductors Product specification PLL stereo decoder and noise blanker TDA1591 MEH034 0 handbook, full pagewidth ∆Vo (dB) −2 −4 −6 −8 −10 −300 −200 −100 Fig.8 HCC with fmod = 10 kHz. 1996 Sep 02 11 control voltage V15−17 (mV) 0 Philips Semiconductors Product specification PLL stereo decoder and noise blanker TDA1591 TEST INFORMATION handbook, full pagewidth 76.5 VP GND PIL HCC 12 kΩ SNC Vref 101.5 10 kΩ MONO 68 kΩ 82 kΩ 100 nF 27 kΩ 27 kΩ 100 kΩ 100 kΩ 6.8 nF 100 nF 470 kΩ MPX IN 220 nF 6.8 nF AUX IN 47 kΩ 47 kΩ 220 nF AF OUT TDA1591 1 Intf IN 220 nF 100 kΩ 100 nF 220 22 nF nF 100 µF AF OUT 47 kΩ 47 kΩ 10 Ω 27 kΩ CSB456F11 470 470 pF pF 2.2 kΩ 47 nF 220 nF AUX IN 1.2 nF VCO MUTE OFF MHA364 Dimensions in mm. Fig.9 TDA1591 test board (component side). 1996 Sep 02 12 Philips Semiconductors Product specification PLL stereo decoder and noise blanker TDA1591 PACKAGE OUTLINES DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1 ME seating plane D A2 A A1 L c e Z b1 w M (e 1) b MH 11 20 pin 1 index E 1 10 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 c mm 4.2 0.51 3.2 1.73 1.30 0.53 0.38 0.36 0.23 26.92 26.54 inches 0.17 0.020 0.13 0.068 0.051 0.021 0.015 0.014 0.009 1.060 1.045 D (1) e e1 L ME MH w Z (1) max. 6.40 6.22 2.54 7.62 3.60 3.05 8.25 7.80 10.0 8.3 0.254 2.0 0.25 0.24 0.10 0.30 0.14 0.12 0.32 0.31 0.39 0.33 0.01 0.078 E (1) Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT146-1 1996 Sep 02 REFERENCES IEC JEDEC EIAJ SC603 13 EUROPEAN PROJECTION ISSUE DATE 92-11-17 95-05-24 Philips Semiconductors Product specification PLL stereo decoder and noise blanker TDA1591 SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 D E A X c HE y v M A Z 11 20 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 10 e bp detail X w M 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.30 0.10 2.45 2.25 0.25 0.49 0.36 0.32 0.23 13.0 12.6 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.9 0.4 0.012 0.096 0.004 0.089 0.01 0.019 0.013 0.014 0.009 0.51 0.49 0.30 0.29 0.050 0.42 0.39 0.055 0.043 0.016 0.043 0.039 0.01 0.01 0.004 0.035 0.016 inches 0.10 Z (1) θ Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT163-1 075E04 MS-013AC 1996 Sep 02 EIAJ EUROPEAN PROJECTION ISSUE DATE 92-11-17 95-01-24 14 o 8 0o Philips Semiconductors Product specification PLL stereo decoder and noise blanker Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C. SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C. WAVE SOLDERING This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011). Wave soldering techniques can be used for all SO packages if the following conditions are observed: • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. DIP SOLDERING BY DIPPING OR BY WAVE • The longitudinal axis of the package footprint must be parallel to the solder flow. The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. • The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. REPAIRING SOLDERED JOINTS A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds. REPAIRING SOLDERED JOINTS Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. SO REFLOW SOLDERING Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. 1996 Sep 02 TDA1591 15 Philips Semiconductors Product specification PLL stereo decoder and noise blanker TDA1591 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1996 Sep 02 16 Philips Semiconductors Product specification PLL stereo decoder and noise blanker NOTES 1996 Sep 02 17 TDA1591 Philips Semiconductors Product specification PLL stereo decoder and noise blanker NOTES 1996 Sep 02 18 TDA1591 Philips Semiconductors Product specification PLL stereo decoder and noise blanker NOTES 1996 Sep 02 19 TDA1591 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 517021/1200/02/pp20 Date of release: 1996 Sep 02 Document order number: 9397 750 00921