May 1996 NDH8447 P-Channel Enhancement Mode Field Effect Transistor General Description Features These P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as notebook computer power management and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed. -4.4A, -30V. RDS(ON) = 0.053 @ VGS = -10V RDS(ON) = 0.095Ω @ VGS = -4.5V High density cell design for extremely low RDS(ON). Enhanced SuperSOTTM-8 small outline surface mount package with high power and current handling capability. ____________________________________________________________________________________________ 5 4 6 3 7 2 8 1 SuperSOTTM-8 Absolute Maximum Ratings T A = 25°C unless otherwise note Symbol Parameter NDH8447 Units VDSS Drain-Source Voltage -30 V VGSS Gate-Source Voltage -20 V ID Drain Current - Continuous -4.4 A (Note 1a) - Pulsed PD TJ,TSTG Maximum Power Dissipation -20 (Note 1a) 1.8 (Note 1b) 1 (Note 1c) 0.9 Operating and Storage Temperature Range W -55 to 150 °C (Note 1a) 70 °C/W (Note 1) 20 °C/W THERMAL CHARACTERISTICS RθJA Thermal Resistance, Junction-to-Ambient RθJC Thermal Resistance, Junction-to-Case © 1997 Fairchild Semiconductor Corporation NDH8447 Rev. C1 Electrical Characteristics (TA = 25°C unless otherwise noted) Symbol Parameter Conditions Min -30 Typ Max Units -1 µA OFF CHARACTERISTICS BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA IDSS Zero Gate Voltage Drain Current VDS = -24 V, VGS = 0 V V -10 µA IGSSF Gate - Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA IGSSR Gate - Body Leakage, Reverse VGS = -20 V, VDS= 0 V -100 nA V TJ = 55°C ON CHARACTERISTICS (Note 2) VGS(th) Gate Threshold Voltage VDS = VGS, ID = -250 µA TJ = 125°C RDS(ON) Static Drain-Source On-Resistance -1 -1.5 -3 -0.7 -1.2 -2.2 0.045 0.053 0.075 0.11 0.08 0.095 VGS = -10 V, ID = -4.4 A TJ = 125°C VGS = -4.5 V, ID = -3.4 A -15 Ω ID(on) On-State Drain Current VGS = -10 V, VDS = -5 V A gFS Forward Transconductance VDS = -10 V, ID = -4.4 A 7 S VDS = -15 V, VGS = 0 V, f = 1.0 MHz 670 pF 430 pF 160 pF DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance SWITCHING CHARACTERISTICS (Note 2) tD(on) Turn - On Delay Time tr Turn - On Rise Time tD(off) Turn - Off Delay Time tf Turn - Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = -15 V, ID = -1 A, VGEN = -10 V, RGEN = 6 Ω VDS = -15 V, ID = -4.4 A, VGS = -10 V 11 20 ns 15 25 ns 36 50 ns 27 40 ns 20 30 nC 2.8 nC 6 nC NDH8447 Rev. C1 Electrical Characteristics (TA = 25°C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units -1.5 A -1.2 V DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS Maximum Continuous Drain-Source Diode Forward Current VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = -1.5 A -0.8 (Note 2) Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. PD (t ) = TJ −TA R θJA(t ) = TJ −TA R θJC+RθCA(t ) = I 2D (t ) × RDS(ON ) TJ Typical RθJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment: a. 70oC/W when mounted on a 1 in2 pad of 2oz cpper. b. 125oC/W when mounted on a 0.026 in2 pad of 2oz copper. c. 135oC/W when mounted on a 0.005 in2 pad of 2oz copper. 1a 1b 1c Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%. NDH8447 Rev. C1 Typical Electrical Characteristics 3 VGS = -10V -8.0 -6.0 -5.0 R DS(on), NORMALIZED -4.5 -15 -4.0 -10 -3.5 -5 -3.0 0 0 -1 -2 V DS , DRAIN-SOURCE VOLTAGE (V) DRAIN-SOURCE ON-RESISTANCE I D , DRAIN-SOURCE CURRENT (A) -20 V GS = -3.5V 2.5 -4.5 2 -5.0 -6.0 1.5 -8.0 -10 1 0.5 -3 -4.0 0 Figure 1. On-Region Characteristics. R DS(on), NORMALIZED 1 0.8 -25 0 25 50 75 100 T , JUNCTION TEMPERATURE (°C) 125 DRAIN-SOURCE ON-RESISTANCE R DS(ON), NORMALIZED 1.2 0.6 -50 -20 V GS = -10V 1.5 TJ = 125°C 25°C 1 -55°C 0.5 150 0 -5 J -10 I D , DRAIN CURRENT (A) -15 -20 Figure 4. On-Resistance Variation with Drain Current and Temperature. Figure 3. On-Resistance Variation with Temperature. -15 T = -55°C J 25°C 125°C V th , NORMALIZED -12 -9 -6 -3 -1 -2 -3 -4 VGS , GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. -5 GATE-SOURCE THRESHOLD VOLTAGE 1.2 V DS = -10V ID , DRAIN CURRENT (A) -15 2 I D =-4.4A V GS = -10V 1.4 0 -10 ID , DRAIN CURRENT (A) Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.6 DRAIN-SOURCE ON-RESISTANCE -5 VDS = V GS I 1.1 D = -250µA 1 0.9 0.8 0.7 -50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (°C) Figure 6. Gate Threshold Variation with Temperature. NDH8447 Rev. C1 125 150 Typical Electrical Characteristics (continued) 20 I D = -250µA -IS , REVERSE DRAIN CURRENT (A) BV DSS, NORMALIZED DRAIN-SOURCE BREAKDOWN VOLTAGE 1.1 1.08 1.06 1.04 1.02 1 0.98 0.96 0.94 -50 -25 0 25 50 75 100 T J , JUNCTION TEMPERATURE (°C) 125 5 1 T = 125°C J 0.5 25°C -55°C 0.1 0.01 0.001 0.2 150 Figure 7. Breakdown Voltage Variation with Temperature. V GS = 0V 10 0.4 0.6 0.8 1 -VSD , BODY DIODE FORWARD VOLTAGE (V) Figure 8. Body Diode Forward Voltage Variation with Source Current and Temperature. 2000 10 CAPACITANCE (pF) -V GS , GATE-SOURCE VOLTAGE (V) I D = -4.4A 1000 C iss C oss 500 300 C rss 200 100 50 0.1 f = 1 MHz V GS = 0V 0.2 0.5 1 2 5 10 -VDS , DRAIN TO SOURCE VOLTAGE (V) 30 V DS = -5.0V -10V 8 -15V 6 4 2 0 0 4 8 12 Q g , GATE CHARGE (nC) t on -VDD t d(on) 20 t off tr RL V IN 16 Figure 10. Gate Charge Characteristics. Figure 9. Capacitance Characteristics. t d(off) tf 90% 90% V OUT D VGS 1.2 VOUT R GEN 10% 10% DUT G 90% S V IN 50% 50% 10% PULSE W IDTH Figure 11. Switching Test Circuit. Figure 12. Switching Waveforms. NDH8447 Rev. C1 INVERTED Typical Electrical and ThermalCharacteristics (continued) 2.5 STEADY-STATE POWER DISSIPATION (W) V DS = -10V TJ = -55°C 12 25°C 9 125°C 6 3 g FS , TRANSCONDUCTANCE (SIEMENS) 15 0 1a 1.5 0 -5 -10 , DRAIN CURRENT (A) D -15 1b 1 1c 0.5 4.5"x5" FR-4 Board T A = 25 o C Still Air 0 I -20 0 0.2 0.4 0.6 0.8 2oz COPPER MOUNTING PAD AREA (in 2 ) 1 Figure 14. SOT-8 Maximum Steady-State Power Dissipation versus Copper Mounting Pad Area. Figure 13. Transconductance Variation with Drain Current and Temperature. 5 50 30 1a 4.5 10 -I D, DRAIN CURRENT (A) -I D , STEADY-STATE DRAIN CURRENT (A) 2 4 3.5 1b 1c 3 4.5"x5" FR-4 Board R LIM 10 IT 0.3 10 VGS = 1 0 V s s DC SINGLE PULSE 0.1 0u 1m 10 s ms 10 0m s 1s 1 R θJ A = See Note 1c 0.03 Still Air N) 3 TA = 2 5 o C 2.5 (O DS T A = 25°C VG S = - 1 0 V 2 0 0.2 0.4 0.6 0.8 2oz COPPER MOUNTING PAD AREA (in 2 ) Figure 15. Maximum Steady-State Drain Current versus Copper Mounting Pad Area. 1 0.01 0.1 0.2 0.5 1 2 5 10 - V DS , DRAIN-SOURCE VOLTAGE (V) 20 30 Figure 16. Maximum Safe Operating Area. TRANSIENT THERMAL RESISTANCE r(t), NORMALIZED EFFECTIVE 1 0 .5 D = 0.5 R JA (t) = r(t) * R JA θ θ R JA = See Note 1c θ 0 .3 0 .2 0 .1 0.2 0.1 P(pk) 0.05 t1 0.05 0.02 0.03 0.02 0.01 0 .0 0 0 1 t2 TJ - T = P * R JA (t) A θ Duty Cycle, D = t 1 / t 2 0.01 Single Pulse 0 .001 0 .0 1 0 .1 t 1, TIME (sec) 1 10 100 Figure 17. Transient Thermal Response Curve. Note: Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change depending on the circuit board design. NDH8447 Rev. C1 300 50 NDH8447 Rev. C1