STP90NF03L STB90NF03L-1 N-CHANNEL 30V - 0.0056Ω - 90A TO-220/I2PAK LOW GATE CHARGE STripFET™ POWER MOSFET TYPE STP90NF03L STB90NF03L-1 ■ ■ ■ ■ ■ VDSS RDS(on) ID 30 V 30 V < 0.0065 Ω < 0.0065 Ω 90 A 90 A TYPICAL RDS(on) = 0.0056 Ω TYPICAL Qg = 35 nC @ 5V OPTIMAL R DS(on) x Qg TRADE-OFF CONDUCTION LOSSES REDUCED SWITCHING LOSSES REDUCED DESCRIPTION This application specific Power Mosfet is the third generation of STMicroelectronics unique “Single Feature Size™” strip-based process. The resulting transistor shows the best trade-off between on-resistance and gate charge. When used as high and low side in buck regulators, it gives the best performance in terms of both conduction and switching losses. This is extremely important for motherboards where fast switching and high efficiency are of paramount importance. 3 1 TO-220 3 12 2 I2PAK INTERNAL SCHEMATIC DIAGRAM APPLICATIONS SPECIFICALLY DESIGNED AND OPTIMISED FOR HIGH EFFICIENCY CPU CORE DC/DC CONVERTERS ■ ORDERING INFORMATION SALES TYPE MARKING PACKAGE PACKAGING STP90NF03L P90NF03L TO-220 TUBE STB90NF03L-1 B90NF03L I2PAK TUBE April 2003 1/9 STP90NF03L/STB90NF03L-1 ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS Parameter Value Unit Drain-source Voltage (VGS = 0) 30 V Drain-gate Voltage (RGS = 20 kΩ) 30 V Gate- source Voltage ±20 V ID Drain Current (continuous) at TC = 25°C 90 A ID Drain Current (continuous) at TC = 100°C 65 A Drain Current (pulsed) 360 A IDM () PTOT Tstg Tj Total Dissipation at TC = 25°C 150 W Derating Factor 0.73 W/°C –65 to 175 °C 175 °C Storage Temperature Max. Operating Junction Temperature ( ) Pulse width limited by safe operating area THERMAL DATA Rthj-case Thermal Resistance Junction-case Max 1 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Maximum Lead Temperature For Soldering Purpose 300 °C Tl ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) ON /OFF Symbol Parameter Test Conditions Min. Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating IGSS Gate-body Leakage Current (VDS = 0) VGS = ±20V ID(on) On State Drain Current VDS > ID(on) x RDS(on)max, VGS = 10V 90 VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA 1 RDS(on) Static Drain-source On Resistance VGS = 10V, ID = 45 A VGS = 5V, ID = 45 A V(BR)DSS 2/9 Typ. Max. 30 Unit V VDS = Max Rating, TC = 125 °C 1 µA 10 µA ±100 nA A 2.5 V 0.0056 0.0065 Ω 0.007 0.012 Ω STP90NF03L/STB90NF03L-1 ELECTRICAL CHARACTERISTICS (CONTINUED) DYNAMIC Symbol gfs (1) Parameter Forward Transconductance Test Conditions Min. VDS > ID(on) x RDS(on)max, ID = 45 A VDS = 25V, f = 1 MHz, VGS = 0 Typ. Max. Unit 40 S 2700 pF Ciss Input Capacitance Coss Output Capacitance 860 pF Crss Reverse Transfer Capacitance 170 pF SWITCHING ON Symbol Parameter Test Conditions Min. Typ. Max. Unit 30 ns Rise Time VDD = 15V, ID = 45 A RG = 4.7Ω VGS = 4.5 V (see test circuit, Figure 3) 200 ns Qg Total Gate Charge VDD = 24V, ID = 90 A,VGS = 5V 35 Qgs Gate-Source Charge 10 nC Qgd Gate-Drain Charge 18 nC td(on) tr Turn-on Delay Time 47 nC SWITCHING OFF Symbol td(off) tf Parameter Turn-off-Delay Time Fall Time Test Conditions Min. VDD = 1 5V, ID = 45 A, RG = 4.7Ω, VGS = 4.5 V (see test circuit, Figure 3) Typ. Max. 50 105 Unit ns ns SOURCE DRAIN DIODE Symbol Max. Unit Source-drain Current 90 A ISDM (2) Source-drain Current (pulsed) 360 A VSD (1) Forward On Voltage ISD = 90 A, VGS = 0 1.3 V Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 90 A, di/dt = 100A/µs, VDD = 15V, Tj = 150°C (see test circuit, Figure 5) ISD trr Qrr IRRM Parameter Test Conditions Min. Typ. 80 90 2.5 ns nC A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3/9 STP90NF03L/STB90NF03L-1 Safe Operating Area Output Characteristics Transconductance 4/9 Thermal Impedence Transfer Characteristics Static Drain-source On Resistance STP90NF03L/STB90NF03L-1 Gate Charge vs Gate-source Voltage Normalized Gate Thereshold Voltage vs Temp. Capacitance Variations Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/9 STP90NF03L/STB90NF03L-1 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/9 STP90NF03L/STB90NF03L-1 TO-220 MECHANICAL DATA DIM. A mm. MIN. TYP 4.40 inch MAX. MIN. 4.60 0.173 TYP. MAX. 0.181 b 0.61 0.88 0.024 0.034 b1 1.15 1.70 0.045 0.066 c 0.49 0.70 0.019 0.027 D 15.25 15.75 0.60 0.620 E 10 10.40 0.393 0.409 e 2.40 2.70 0.094 0.106 e1 4.95 5.15 0.194 0.202 F 1.23 1.32 0.048 0.052 H1 6.20 6.60 0.244 0.256 J1 2.40 2.72 0.094 0.107 L 13 14 0.511 0.551 L1 3.50 3.93 0.137 0.154 L20 16.40 L30 28.90 0.645 1.137 øP 3.75 3.85 0.147 0.151 Q 2.65 2.95 0.104 0.116 7/9 STP90NF03L/STB90NF03L-1 TO-262 (I2PAK) MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. 4.4 4.6 0.173 0.181 A1 2.49 2.69 0.098 0.106 B 0.7 0.93 0.027 0.036 B2 1.14 1.7 0.044 0.067 C 0.45 0.6 0.017 0.023 C2 1.23 1.36 0.048 0.053 D 8.95 9.35 0.352 0.368 e 2.4 2.7 0.094 0.106 E 10 10.4 0.393 0.409 L 13.1 13.6 0.515 0.531 L1 3.48 3.78 0.137 0.149 L2 1.27 1.4 0.050 0.055 E e B B2 C2 A1 A C A L1 L2 D L P011P5/E 8/9 STP90NF03L/STB90NF03L-1 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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