STB55NF06 N-CHANNEL 60V - 0.018Ω - 50A D2PAK STripFET POWER MOSFET TYPE STB55NF06 ■ ■ ■ ■ VDSS RDS(on) ID 60V <0.022Ω 50A TYPICAL RDS(on) = 0.018Ω EXCEPTIONAL dv/dt CAPABILITY APPLICATION ORIENTED CHARACTERIZATION FOR THROUGH-HOLE VERSION CONTACT SALES OFFICE DESCRIPTION This Power MOSFET is the latest development of STMicroelectronics unique “Single Feature Size ” strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalance characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. 3 1 D2PAK (TO-263) INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ HIGH CURRENT, HIGH SPEED SWITCHING ■ MOTOR CONTROL, AUDIO AMPLIFIERS ■ DC-DC & DC-AC CONVERTERS ■ AUTOMOTIVE ENVIRONMENT (INJECTION, ABS, AIR-BAG, LAMPDRIVERS, Etc.) ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS Value Unit Drain-source Voltage (VGS = 0) Parameter 60 V Drain-gate Voltage (RGS = 20 kΩ) 60 V ± 20 V 50 A Gate- source Voltage ID Drain Current (continuos) at TC = 25°C ID Drain Current (continuos) at TC = 100°C 36 A IDM (●) Drain Current (pulsed) 200 A PTOT Total Dissipation at TC = 25°C 95 W Derating Factor 0.63 W/°C Single Pulse Avalanche Energy 200 mJ –65 to 175 °C 175 °C EAS (1) Tstg Tj Storage Temperature Max. Operating Junction Temperature ( ●) Pulse width limi ted by safe operating area March 2001 (1) Starting Tj=25°C, ID=25A, VDD=30V 1/9 STB55NF06 THERMAL DATA Rthj-case Thermal Resistance Junction-case Max 1.6 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Maximum Lead Temperature For Soldering Purpose 300 °C Tl ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol V(BR)DSS IDSS IGSS Parameter Test Conditions Min. Typ. Max. Unit Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 Zero Gate Voltage Drain Current (V GS = 0) VDS = Max Rating 1 µA VDS = Max Rating, TC = 125 °C 10 µA Gate-body Leakage Current (VDS = 0) VGS = ± 20V ±100 nA 60 V ON (1) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250µA R DS(on) Static Drain-source On Resistance VGS = 10 V, I D = 25 A ID(on) On State Drain Current VDS > ID(on) x RDS(on)max, VGS = 10V Min. Typ. Max. Unit 2 3 4 V 0.018 0.022 Ω 50 A DYNAMIC Symbol gfs (1) 2/9 Parameter Test Conditions Forward Transconductance VDS > ID(on) x RDS(on)max, ID =25 A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. Max. Unit 20 S 1530 pF C iss Input Capacitance Coss Output Capacitance 300 pF Crss Reverse Transfer Capacitance 105 pF STB55NF06 ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Qg Qgs Q gd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions Min. VDD = 30V, ID = 25A RG = 4.7Ω VGS = 10V (see test circuit, Figure 3) VDD = 30V, ID = 50A, VGS = 10V Typ. Max. Unit 16 ns 8 ns 44.5 10.5 17.5 60 nC nC nC Typ. Max. Unit SWITCHING OFF Symbol Parameter Test Condit ions Min. td(off) tf Turn-off-Delay Time Fall Time VDD = 30V, ID = 50A, R G = 4.7Ω, VGS = 10V (see test circuit, Figure 5) 36 15 ns ns td(off) tf tc Off-voltage Rise Time Fall Time Cross-over Time Vclamp =48V, I D =50A R G = 4.7Ω, VGS = 10V (Inductive Load) 43 20 34 ns ns ns SOURCE DRAIN DIODE Symbol ISD ISDM (1) VSD (2) trr Qrr IRRM Parameter Test Conditions Min. Typ. Source-drain Current Source-drain Current (pulsed) Forward On Voltage ISD = 50A, VGS = 0 Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 50A, di/dt = 100A/µs, VDD = 100V, T j = 150°C (see test circuit, Figure 5) Max. Unit 50 A 200 A 1.5 75 170 4.5 V ns nC A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area Thermal Impedence 3/9 STB55NF06 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/9 STB55NF06 Normalized Gate Threshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/9 STB55NF06 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/9 STB55NF06 D2PAK MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. MAX. A 4.4 4.6 0.173 0.181 A1 2.49 2.69 0.098 0.106 A2 0.03 0.23 0.001 0.009 B 0.7 0.93 0.027 0.036 B2 1.14 1.7 0.044 0.067 C 0.45 0.6 0.017 0.023 C2 1.23 1.36 0.048 0.053 D 8.95 9.35 0.352 0.368 D1 E 8 0.315 10 E1 10.4 0.393 8.5 0.334 G 4.88 5.28 0.192 0.208 L 15 15.85 0.590 0.625 L2 1.27 1.4 0.050 0.055 L3 1.4 1.75 0.055 0.068 M 2.4 3.2 0.094 0.126 R 0.015 0º 8º 3 V2 0.4 7/9 1 STB55NF06 D2PAK FOOTPRINT TUBE SHIPMENT (no suffix)* TAPE AND REEL SHIPMENT (suffix ”T4”)* REEL MECHANICAL DATA DIM. mm MIN. A B C TAPE MECHANICAL DATA mm MIN. MAX. inch MIN. MAX. A0 10.5 10.7 0.413 0.421 B0 15.7 15.9 0.618 0.626 D D1 1.5 1.59 1.6 1.61 0.059 0.063 0.062 0.063 E F 1.65 11.4 1.85 11.6 0.065 0.073 0.449 0.456 K0 4.8 5.0 0.189 0.197 P0 3.9 4.1 0.153 0.161 P1 P2 11.9 1.9 12.1 2.1 0.468 0.476 0.075 0.082 R T 50 0.25 1.574 0.35 0.0098 0.0137 W 23.7 24.3 DIM. * on sales type 8/9 0.933 0.956 1.5 12.8 D 20.2 G 24.4 N T 100 MAX. 330 inch MIN. MAX. 12.992 13.2 0.059 0.504 0.520 26.4 0.960 1.039 0795 3.937 30.4 1.197 BASE QTY BULK QTY 1000 1000 STB55NF06 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. 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