STMICROELECTRONICS STE36N50A

STE36N50A
N - CHANNEL ENHANCEMENT MODE
POWER MOS TRANSISTOR IN ISOTOP PACKAGE
TYPE
STE36N50A
V DSS
R DS( on)
ID
500 V
< 0.14 Ω
36 A
4
■
■
■
■
■
■
■
■
■
HIGH CURRENT POWER MODULE
AVALANCHE RUGGED TECHNOLOGY
VERY LARGE SOA - LARGE PEAK POWER
CAPABILITY
EASY TO MOUNT
SAME CURRENT CAPABILITY FOR THE
TWO SOURCE TERMINALS
EXTREMELY LOW Rth JUNCTION TO CASE
VERY LOW DRAIN TO CASE CAPACITANCE
VERY LOW INTERNAL PARASITIC
INDUCTANCE (TYPICALLY < 5 nH)
ISOLATED PACKAGE UL RECOGNIZED
(FILE No E81743)
3
1
2
ISOTOP
INTERNAL SCHEMATIC DIAGRAM
INDUSTRIAL APPLICATIONS:
■
SMPS & UPS
■
MOTOR CONTROL
■
WELDING EQUIPMENT
■
OUTPUT STAGE FOR PWM, ULTRASONIC
CIRCUITS
ABSOLUTE MAXIMUM RATINGS
Symbol
VD S
V DG R
V GS
Parameter
Value
Unit
Drain-Source Voltage (V GS = 0)
500
V
Drain-Gate Voltage (RGS = 20 kΩ)
500
V
± 20
V
36
A
Gate-Source Voltage
o
ID
Drain Current (continuous) at T c = 25 C
ID
o
ID M(•)
P tot
T stg
Tj
V ISO
Drain Current (continuous) at T c = 100 C
24
A
Drain Current (pulsed)
144
A
Total Dissipation at Tc = 25 o C
410
W
Derating Factor
3.3
W/o C
-55 to 150
o
C
Max. Operating Junction Temperature
150
o
C
Insulation Withstand Voltage (AC-RMS)
2500
Storage Temperature
V
(•) Pulse width limited by safe operating area
September 1994
1/8
STE36N50A
THERMAL DATA
R thj-cas e
R thc-h
Thermal Resistance Junction-case
Thermal Resistance Case-heatsink With Conductive
Grease Applied
Max
0.3
o
C/W
Max
0.05
o
C/W
AVALANCHE CHARACTERISTICS
Symbol
Parameter
Max Value
Unit
IA R
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T j max, δ < 1%)
14
A
E AS
Single Pulse Avalanche Energy
(starting T j = 25 o C, ID = I AR, VD D = 50 V)
100
mJ
E AR
Repetitive Avalanche Energy
(pulse width limited by T j max, δ < 1%)
40
mJ
IA R
Avalanche Current, Repetitive or Not-Repetitive
(T c = 100 o C, pulse width limited by T j max, δ < 1%)
9
A
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified)
OFF
Symbol
V( BR)DSS
Parameter
Drain-source
Breakdown Voltage
Test Conditions
I D = 1 mA
V GS = 0
I DS S
V DS = Max Rating
Zero Gate Voltage
Drain Current (V GS = 0) V DS = Max Rating x 0.8
IG SS
Gate-body Leakage
Current (V D S = 0)
Min.
Typ.
Max.
500
Unit
V
300
1500
µA
µA
± 300
nA
Max.
Unit
3
4
V
0.12
0.14
0.28
Ω
Ω
T c = 125 oC
V GS = ± 20 V
ON (∗)
Symbol
Parameter
Test Conditions
V G S(th)
Gate Threshold Voltage V DS = V GS
R DS( on)
Static Drain-source On
Resistance
V GS = 10V ID = 18 A
V GS = 10V I D = 18 A
ID = 1 mA
I D( on)
On State Drain Current
V DS > ID( on) x RD S(on) max
V GS = 10 V
Min.
2
T c = 100 oC
Typ.
36
A
DYNAMIC
Symbol
gfs (∗)
C iss
C oss
C rss
2/8
Parameter
Test Conditions
Forward
Transconductance
V DS > ID( on) x RD S(on) max
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V DS = 25 V
f = 1 MHz
ID = 18 A
VG S = 0
Min.
Typ.
Max.
16
Unit
S
8000
1300
350
pF
pF
pF
STE36N50A
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol
t d(on)
tr
(di/dt) on
Qg
Q gs
Q gd
Typ.
Max.
Unit
Turn-on Time
Rise Time
Parameter
V DD = 250 V I D = 18 A
V GS = 10 V
R G = 4.7 Ω
(see test circuit, figure 1)
Test Conditions
45
85
65
120
ns
ns
Turn-on Current Slope
V DD = 400 V I D = 36 A
R G = 4.7 Ω
V GS = 10 V
(see test circuit, figure 3)
700
A/µs
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V DD = 400 V
295
35
145
nC
nC
nC
ID = 36 A
Min.
VG S = 10 V
SWITCHING OFF
Symbol
t r(Vof f)
tf
tc
Parameter
Off-voltage Rise Time
Fall Time
Cross-over Time
Test Conditions
Min.
V DD = 400 V I D = 36 A
R G = 4.7 Ω V GS = 10 V
(see test circuit, figure 3)
Typ.
Max.
Unit
100
45
160
140
65
225
ns
ns
ns
Typ.
Max.
Unit
36
144
A
A
SOURCE DRAIN DIODE
Symbol
Parameter
Test Conditions
IS D
I SDM(•)
Source-drain Current
Source-drain Current
(pulsed)
V S D (∗)
Forward On Voltage
I SD = 36 A
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
I SD = 36 A di/dt = 100 A/µs
T j = 150 o C
V DD = 100 V
(see test circuit, figure 3)
t rr
Q rr
I RRM
Min.
VG S = 0
1.4
V
1
µs
29
µC
58
A
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Safe Operating Areas
Thermal Impedance
3/8
STE36N50A
Derating Curve
Output Characteristics
Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
4/8
STE36N50A
Capacitance Variations
Normalized Gate Threshold Voltage vs
Temperature
Normalized Breakdown Voltage vs Temperature
Normalized On Resistance vs Temperature
Turn-on Current Slope
Turn-off Drain-source Voltage Slope
5/8
STE36N50A
Cross-over Time
Source-drain Diode Forward Characteristics
Fig. 1: Switching Times Test Circuits For
Resistive Load
Fig. 2: Gate Charge Test Circuit
Fig. 3: Test Circuit For Inductive Load Switching
And Diode Recovery Times
6/8
STE36N50A
ISOTOP MECHANICAL DATA
mm
DIM.
MIN.
TYP.
inch
MAX.
MIN.
TYP.
MAX.
A
11.8
12.2
0.466
0.480
B
8.9
9.1
0.350
0.358
C
1.95
2.05
0.076
0.080
D
0.75
0.85
0.029
0.033
E
12.6
12.8
0.496
0.503
F
25.15
25.5
0.990
1.003
G
31.5
31.7
1.240
1.248
H
4
J
4.1
4.3
0.161
0.169
K
14.9
15.1
0.586
0.594
L
30.1
30.3
1.185
1.193
M
37.8
38.2
1.488
1.503
N
4
O
7.8
P
5.5
0.157
0.157
8.2
0.307
0.322
0.216
A
G
B
O
F
E
H
D
N
J
C
K
L
M
0041565
7/8
STE36N50A
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express
written approval of SGS-THOMSON Microelectonics.
 1994 SGS-THOMSON Microelectronics - All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
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