SONY ICX204AK

ICX204AK
Diagonal 6mm (Type 1/3) Progressive Scan CCD Image Sensor with Square Pixel for Color Cameras
Description
The ICX204AK is a diagonal 6mm (Type 1/3)
interline CCD solid-state image sensor with a square
pixel array and 800K effective pixels. Progressive
scan allows all pixels' signals to be output
independently. Also, the adoption of high frame rate
readout mode supports 60 frames per second. This
chip features an electronic shutter with variable
charge-storage time which makes it possible to
realize full-frame still image without a mechanical
shutter. High resolution and high color reproductivity
are achieved through the use of R, G, B primary color
mosaic filters. Further, high sensitivity and low dark
current are achieved through the adoption of HAD
(Hole-Accumulation Diode) sensors.
This chip is suitable for applications such as
electronic still cameras, PC input cameras, etc.
Features
• Progressive scan allows individual readout of the
image signals from all pixels.
• High horizontal and vertical resolution (both approx.
600TV-lines) still image without a mechanical shutter.
• Supports high frame rate readout mode
(effective 256 lines output, 15MHz drive: 45 frame/s,
20MHz drive: 60 frame/s)
• Square pixel
• Horizontal drive frequency: Typ.: 15MHz, Max.: 20MHz
• No voltage adjustments
(reset gate and substrate bias are not adjusted.)
• R, G, B primary color mosaic filters on chip
• High resolution, high color reproductivity,
high sensitivity, low dark current
• Low smear, excellent antiblooming characteristics
• Continuous variable-speed shutter
• Recommended range of exit pupil distance: –20 to –100mm
Device Structure
• Interline CCD image sensor
• Image size:
• Total number of pixels:
• Number of effective pixels:
• Number of active pixels:
• Chip size:
• Unit cell size:
• Optical black:
• Number of dummy bits:
• Substrate material:
16 pin DIP (Plastic)
AAAAA
AAAAA
AAAAA
AAAAA
AAAAA
Pin 1
2
V
3
Pin 9
H
7
40
Optical black position
(Top View)
Diagonal 6mm (Type 1/3)
1077 (H) × 788 (V) approx. 850K pixels
1034 (H) × 779 (V) approx. 800K pixels
1024 (H) × 768 (V) approx. 790K pixels (diagonal 5.952mm)
5.80mm (H) × 4.92mm (V)
4.65µm (H) × 4.65µm (V)
Horizontal (H) direction: Front 3 pixels, rear 40 pixels
Vertical (V) direction: Front 7 pixels, rear 2 pixels
Horizontal 29
Vertical 1
Silicon
∗ Wfine CCD is a registered trademark of Sony Corporation.
Represents a CCD adopting progressive scan, primary color filter and square pixel.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E97X05B99
ICX204AK
VOUT
NC
NC
GND
Vφ2A
Vφ1
Vφ2B
Vφ3
Block Diagram and Pin Configuration
(Top View)
8
7
6
5
4
3
2
1
Vertical register
R
G
R
G
G
B
G
B
R
G
R
G
G
B
G
B
R
G
R
G
G
B
G
B
R
G
R
G
Note)
Horizontal register
12
13
GND
φSUB
CSUB
VL
14
15
16
Hφ2
11
Hφ1
10
φRG
9
VDD
Note)
: Photo sensor
Pin Description
Pin No.
Symbol
Description
Pin No.
Symbol
Description
1
Vφ3
Vertical register transfer clock
9
VDD
Supply voltage
2
Vφ2B
Vertical register transfer clock
10
GND
GND
3
Vφ1
Vertical register transfer clock
11
φSUB
4
Vφ2A
Vertical register transfer clock
12
CSUB
Substrate clock
Substrate bias∗1
5
GND
GND
13
VL
Protective transistor bias
6
NC
14
φRG
Reset gate clock
7
NC
15
Hφ1
Horizontal register transfer clock
8
VOUT
16
Hφ2
Horizontal register transfer clock
Signal output
∗1 DC bias is generated within the CCD, so that this pin should be grounded externally through a capacitance
of 0.1µF.
–2–
ICX204AK
Absolute Maximum Ratings
Item
Against φSUB
Ratings
VDD, VOUT, φRG – φSUB
–40 to +10
V
Vφ2A, Vφ2B – φSUB
–50 to +15
V
Vφ1, Vφ3, VL – φSUB
–50 to +0.3
V
Hφ1, Hφ2, GND – φSUB
–40 to +0.3
V
–25 to
V
VDD, VOUT, φRG, CSUB – GND
–0.3 to +18
V
Vφ1, Vφ2A, Vφ2B, Vφ3 – GND
–10 to +18
V
Hφ1, Hφ2 – GND
–10 to +5
V
Vφ2A, Vφ2B – VL
–0.3 to +28
V
Vφ1, Vφ3, Hφ1, Hφ2, GND – VL
–0.3 to +15
V
to +15
V
CSUB – φSUB
Against GND
Against VL
Voltage difference between vertical clock input pins
Between input
clock pins
Unit Remarks
Hφ1 – Hφ2
–5 to +5
V
–13 to +13
V
Storage temperature
–30 to +80
°C
Operating temperature
–10 to +60
°C
Hφ1, Hφ2 – Vφ3
∗2 +24V (Max.) when clock width < 10µs, clock duty factor < 0.1%.
+16V (Max.) is guaranteed for turning on or off power supply.
–3–
∗2
ICX204AK
Bias Conditions
Item
Symbol
Min.
Typ.
Max.
Unit
14.55
15.0
∗1
15.45
V
Supply voltage
VDD
Protective transistor bias
VL
Substrate clock
φSUB
∗2
Reset gate clock
φRG
∗2
Remarks
∗1 VL setting is the VVL voltage of the vertical transfer clock waveform, or the same power supply as the VL
power supply for the V driver should be used.
∗2 Do not apply a DC bias to the substrate clock and reset gate clock pins, because a DC bias is generated
within the CCD.
DC Characteristics
Item
Symbol
Min.
Typ.
IDD
Supply current
Max.
5.5
Unit
Remarks
mA
Clock Voltage Conditions
Min.
Typ.
Max.
Unit
Waveform
diagram
VVT
14.55
15.0
15.45
V
1
VVH02A
–0.05
0
0.05
V
2
VVH1, VVH2A,
VVH2B, VVH3
–0.2
0
0.05
V
2
VVL1, VVL2A,
VVL2B, VVL3
–8
–7.5
–7
V
2
Vφ1, Vφ2A,
Vφ2B, Vφ3
7
7.5
8
V
2
| VVL1 – VVL3 |
0.1
V
2
VVHH
0.9
V
2
High-level coupling
VVHL
1.3
V
2
High-level coupling
VVLH
1.0
V
2
Low-level coupling
VVLL
0.9
V
2
Low-level coupling
Item
Readout clock voltage
Vertical transfer clock
voltage
Horizontal transfer
clock voltage
Symbol
VVH = VVH02A
VVL = (VVL1 + VVL3)/2
VφH
3.0
3.3
3.6
V
3
VHL
–0.05
0
0.05
V
3
3.0
3.3
3.6
V
4
VRGLH – VRGLL
0.4
V
4
Low-level coupling
VRGL – VRGLm
0.5
V
4
Low-level coupling
23.45
V
5
VφRG
Reset gate clock
voltage
Remarks
Substrate clock voltage VφSUB
21.55
22.5
–4–
ICX204AK
Clock Equivalent Circuit Constant
Symbol
Item
Min.
Typ.
Max.
Unit
CφV1
1500
pF
CφV2A
1800
pF
CφV2B
2700
pF
CφV3
2200
pF
CφV12A
390
pF
CφV2B1
680
pF
CφV2A3
560
pF
CφV32B
1000
pF
CφV13
1800
pF
CφV2A2B
33
pF
Capacitance between horizontal transfer clock
and GND
CφH1, CφH2
18
pF
Capacitance between horizontal transfer clocks
CφHH
43
pF
Capacitance between reset gate clock and GND
CφRG
3
pF
Capacitance between substrate clock and GND
CφSUB
390
pF
R1
91
Ω
R2A
68
Ω
R2B
62
Ω
R3
30
Ω
Vertical transfer clock ground resistor
RGND
43
Ω
Horizontal transfer clock series resistor
RφH
10
Ω
Capacitance between vertical transfer clock and
GND
Capacitance between vertical transfer clocks
Vertical transfer clock series resistor
Vφ1
Remarks
Vφ2A
CφV12A
R1
R2A
RφH
RφH
Hφ1
CφV1
Hφ2
CφHH
CφV2A
CφV2B1
CφV2A3
CφV2A2B
CφH1
CφH2
CφV13
CφV2B RGND CφV3
R2B
Vφ2B
CφV32B
R3
Vφ3
Vertical transfer clock equivalent circuit
Horizontal transfer clock equivalent circuit
–5–
ICX204AK
Drive Clock Waveform Conditions
(1) Readout clock waveform
VT
100%
90%
II
II
φM
φM
2
VVT
10%
0%
tr
twh
0V
tf
Note) Readout clock is used by composing vertical transfer clocks Vφ2A and Vφ2B.
(2) Vertical transfer clock waveform
Vφ1
VVH1
VVHH
VVH
VVHL
VVLH
VVL01
VVL1
VVL
VVLL
Vφ2A, Vφ2B
VVH02A, VVH02B
VVH2A, VVH2B
VVHH
VVH
VVHL
VVLH
VVL2A, VVL2B
VVL
VVLL
Vφ3
VVH3
VVHH
VVH
VVHL
VVLH
VVL03
VVL
VVLL
VVH = VVH02A
VVL = (VVL01 + VVL03) / 2
VVL3 = VVL03
–6–
VφV1 = VVH1 – VVL01
VφV2A = VVH02A – VVL2A
VφV2B = VVH02B – VVL2B
VφV3 = VVH3 – VVL03
ICX204AK
(3) Horizontal transfer clock waveform
tr
twh
tf
Hφ2
90%
VCR
VφH
twl
VφH
2
10%
VHL
Hφ1
two
Cross-point voltage for the Hφ1 rising side of the horizontal transfer clocks Hφ1 and Hφ2 waveforms is VCR.
The overlap period for twh and twl of horizontal transfer clocks Hφ1 and Hφ2 is two.
(4) Reset gate clock waveform
tr
twh
tf
VRGH
RG waveform
twl
VφRG
Point A
VRGLH
VRGLL
VRGLm
VRGL
VRGLH is the maximum value and VRGLL is the minimum value of the coupling waveform during the period from
Point A in the above diagram until the rising edge of RG.
In addition, VRGL is the average value of VRGLH and VRGLL.
VRGL = (VRGLH + VRGLL)/2
Assuming VRGH is the minimum value during the interval twh, then:
VφRG = VRGH – VRGL.
Negative overshoot level during the falling edge of RG is VRGLm.
(5) Substrate clock waveform
100%
90%
φM
φM
2
VφSUB
10%
VSUB
0%
(A bias generated within the CCD)
tr
–7–
twh
tf
ICX204AK
Clock Switching Characteristics
Item
Symbol
VT
Vertical transfer
clock
Vφ1, Vφ2A,
Vφ2B, Vφ3
Horizontal
transfer clock
Readout clock
During
imaging
twh
twl
tr
tf
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
2.3 2.5
0.5
0.5
15
350 ns
∗1
∗2
12.5 17
12.5 17
8
12.5
8
12.5
Hφ2
12.5 17
12.5 17
8
12.5
8
12.5
Reset gate clock
φRG
Substrate clock
φSUB
8.2
8.2
7
10
34
0.01
0.01
0.01
0.01
3
3
2.2
0.5
Remarks
µs During readout
Hφ1
During
Hφ1
parallel-serial
Hφ2
conversion
Unit
ns
µs
ns
0.5 µs
During drain
charge
∗1 When vertical transfer clock driver CXD1267AN is used.
∗2 tf ≥ tr – 2ns, and the cross-point voltage (VCR) for the Hφ1 rising side of the Hφ1 and Hφ2 waveforms must be
at least VφH/2 [V].
two
Item
Symbol
Horizontal transfer clock
Min. Typ. Max.
Hφ1, Hφ2 10.5 17
Unit
Remarks
ns
Spectral Sensitivity Characteristics (excludes lens characteristics and light source characteristics)
1
G
R
0.8
Relative Response
B
0.6
0.4
0.2
0
400
500
600
Wave Length [nm]
–8–
700
ICX204AK
Image Sensor Characteristics
Item
(Ta = 25°C)
Symbol
Measurement
method
mV
1
Typ.
Sg
320
400
R
Rr
0.4
0.55
0.7
1
B
Rb
0.3
0.45
0.6
1
Saturation signal
Vsat
450
Smear
Sm
Video signal shading
SHg
G sensitivity
Sensitivity
comparison
Max.
Unit
Min.
Remarks
1/30s accumulation
mV
2
Ta = 60°C
0.004
%
3
No electronic shutter
20
%
4
Zone 0 and I
25
%
4
Zone 0 to II'
∆Srg
8
%
5
∆Sbg
8
%
5
Dark signal
Vdt
6
mV
6
Ta = 60°C, 20 frame/s
Dark signal shading
∆Vdt
2
mV
7
Ta = 60°C, 20 frame/s
Line crawl G
Lcg
3.8
%
8
Line crawl R
Lcr
3.8
%
8
Line crawl B
Lcb
3.8
%
8
Lag
Lag
0.5
%
9
Uniformity between video
signal channels
0.001
Zone Definition of Video Signal Shading
1034 (H)
4
4
4
V
10
H
8
H
8
Zone 0, I
Zone II, II'
V
10
779 (V)
5
Ignored region
Effective pixel region
Measurement System
CCD signal output [∗A]
Gr/Gb
CCD
C.D.S
AMP
S/H
Gr/Gb channel signal output [∗B]
R/B
S/H
R/B channel signal output [∗C]
Note) Adjust the amplifier gain so that the gain between [∗A] and [∗B], and between [∗A] and [∗C] equals 1.
–9–
ICX204AK
Image Sensor Characteristics Measurement Method
Color coding and readout of this image sensor
Gb
B
Gb
B
R
Gr
R
Gr
Gb
B
Gb
B
R
Gr
R
Gr
The primary color filters of this image sensor are arranged in the layout
shown in the figure on the left (Bayer arrangement).
Gr and Gb denote the G signals on the same line as the R signal and
the B signal, respectively.
Horizontal register
Color Coding Diagram
All pixel signals are output successively in a 1/20s period.
The R signal and Gr signal lines and the Gb signal and B signal lines are output successively.
– 10 –
ICX204AK
Readout modes
The diagram below shows the output methods for the following two readout modes.
High frame rate readout mode
Progressive scan mode
VOUT
12
G
B
12
G
B
11
R
G
11
R
G
10
G
B
10
G
B
9
R
G
9
R
G
8
G
B
8
G
B
7
R
G
7
R
G
6
G
B
6
G
B
5
R
G
5
R
G
4
G
B
4
G
B
3
R
G
3
R
G
2
G
B
2
G
B
1
R
G
1
R
G
VOUT
Note) Blacked out portions in the diagram indicate pixels which are not read out.
Output starts from the line 7 in high frame rate readout mode.
1. Progressive scan mode
In this mode, all pixel signals are output in non-interlace format in 1/20s.
The vertical resolution is approximately 600TV-lines and all pixel signals within the same exposure period
are read out simultaneously, making this mode suitable for high resolution image capturing.
2. High frame rate readout mode
All effective areas are scanned in approximately 1/60s by reading out one line for every three lines. The
vertical resolution is approximately 200TV-lines.
This readout mode emphasizes processing speed over vertical resolution.
– 11 –
ICX204AK
Measurement conditions
1) In the following measurements, the device drive conditions are at the typical values of the progressive scan
mode, bias and clock voltage conditions.
2) In the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical
black level (OB) is used as the reference for the signal output, which is taken as the value of the Gr/Gb
signal output or the R/B signal output of the measurement system.
Definition of standard imaging conditions
1) Standard imaging condition I:
Use a pattern box (luminance: 706cd/m2, color temperature of 3200K halogen source) as a subject. (Pattern
for evaluation is not applicable.) Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter
and image at F5.6. The luminous intensity to the sensor receiving surface at this point is defined as the
standard sensitivity testing luminous intensity.
2) Standard imaging condition II:
Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles.
Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted
to the value indicated in each testing item by the lens diaphragm.
3) Standard imaging condition III:
Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles.
Use a testing standard lens (exit pupil distance –33mm) with CM500S (t = 1.0mm) as an IR cut filter. The
luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm.
1. G sensitivity, sensitivity comparison
Set to standard imaging condition I. After selecting the electronic shutter mode with a shutter speed of
1/100s, measure the signal outputs (VGr, VGb, VR and VB) at the center of each Gr, Gb, R and B channel
screen, and substitute the values into the following formulas.
VG = (VGr + VGb)/2
Sg = VG × 100/30 [mV]
Rr = VR/VG
Rb = VB/VG
2. Saturation signal
Set to standard imaging condition II. After adjusting the luminous intensity to 20 times the intensity with the
average value of the Gr signal output, 150mV, measure the minimum values of the Gr, Gb, R and B signal
outputs.
3. Smear
Set to standard imaging condition II. With the lens diaphragm at F5.6 to F8, first adjust the average value of
the Gr signal output to 150mV. Measure the average values of the Gr signal output, Gb signal output, R
signal output and B signal output (Gra, Gba, Ra, Ba), and then adjust the luminous intensity to 500 times
the intensity with the average value of the Gr signal output, 150mV. After the readout clock is stopped and
the charge drain is executed by the electronic shutter at the respective H blankings, measure the maximum
value (VSm [mV]) independent of the Gr, Gb, R and B signal outputs, and substitute the values into the
following formula.
Sm = Vsm ÷
Gra + Gba + Ra + Ba
4
×
1
1
×
× 100 [%] (1/10V method conversion value)
10
500
– 12 –
ICX204AK
4. Video signal shading
Set to standard imaging condition III. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity
so that the average value of the Gr signal output is 150mV. Then measure the maximum (Grmax [mV]) and
minimum (Grmin [mV]) values of the Gr signal output and substitute the values into the following formula.
SHg = (Grmax – Grmin)/150 × 100 [%]
5. Uniformity between video signal channels
After measuring 4, measure the maximum (Rmax [mV]) and minimum (Rmin [mV]) values of the R signal
and the maximum (Bmax [mV]) and minimum (Bmin [mV]) values of the B signal, and substitute the values
into the following formulas.
∆Srg = (Rmax – Rmin)/150 × 100 [%]
∆Sbg = (Bmax – Bmin)/150 × 100 [%]
6. Dark signal
Measure the average value of the signal output (Vdt [mV]) with the device ambient temperature 60°C and
the device in the light-obstructed state, using the horizontal idle transfer level as a reference.
7. Dark signal shading
After measuring 6, measure the maximum (Vdmax [mV]) and minimum (Vdmin [mV]) values of the dark
signal output and substitute the values into the following formula.
∆Vdt = Vdmax – Vdmin [mV]
8. Line crawl
Set to standard imaging condition II. Adjusting the luminous intensity so that the average value of the Gr
signal output is 150mV, and then insert R, G and B filters and measure the difference between G signal
lines (∆Glr, ∆Glg, ∆Glb [mV]) as well as the average value of the G signal output (Gar, Gag, Gab).
Substitute the values into the following formula.
Lci = ∆Gli/Gai × 100 [%] (i = r, g, b)
9. Lag
Adjust the Gr signal output value generated by strobe light to 150mV. After setting the strobe light so that it
strobes with the following timing, measure the residual signal (Vlag). Substitute the value into the following
formula.
Lag = (Vlag/150) × 100 [%]
VD
V2A
Light
Strobe light
timing
Gr signal output 150mV
Output
– 13 –
Vlag (lag)
8
9
XSG2
φRG
Hφ1
Hφ2
10
7
XV2B
XV3
6
XV2A
5
XV1
XSG1
4
3
XSUB
22/20V
CXD1267AN
11
12
13
14
15
16
17
18
1/35V
22/16V
100k
1
2
3
4
5
(BOTTOM VIEW)
ICX204
6
8
7
3.3/16V
0.1
0.1 2200p
16 15 14 13 12 11 10 9
Vφ3
Hφ2
19
Vφ1
φRG
2
Vφ2B
Hφ1
20
GND
CSUB
1
Vφ2A
VL
NC
GND
VOUT
15V
NC
φSUB
– 14 –
VDD
Drive Circuit
0.01
1.8k
3.3/20V
0.1
1M
47
2SK1875
CCD OUT
–7.5V
ICX204AK
– 15 –
V3
V2A/V2B
V1
HD
XSG1/XSG2
XV3
XV2A/XV2B
XV1
Sensor Readout Clock Timing Chart
42.4µs (848 bits)
0.1µs (2 bits)
Progressive Scan Mode
2.55µs (51 bits)
Sensor readout clocks XSG1 and XSG2 are used by composing XV2A and XV2B.
ICX204AK
XSG2
XSG1
XV3
– 16 –
V3
V2B
V2A
V1
HD
XV2A/XV2B
XV1
Sensor Readout Clock Timing Chart
42.4µs (848 bits)
0.1µs (2 bits)
5.0µs (100 bits)
8 bits
10 bits
2.55µs (51 bits)
AAAA
AAAA
Sensor readout clock XSG1 is used by composing XV2A.
High Frame Rate Readout Mode
2.7µs (54 bits)
ICX204AK
– 17 –
CCD
OUT
V3
V2B
V2A
V1
HD
VD
Progressive Scan Mode
1 2 3 4 5 6 7 1 2 3 4
9
10
792
1
Drive Timing Chart (Vertical Sync)
792
1
779
1 2 3 4 5 67 1 2 3
ICX204AK
790
788
– 18 –
CCD
OUT
V3
V2B
V2A
V1
HD
BLK
525
1
757
760
763
766
769
772
VD
15
10
7
10
13
16
19
22
25
28
31
FLD
265
262
260
285
275
270
Note) Vertical OB and aperture lines 1, 4, 775 and 778 are not output.
757
760
763
766
769
772
High Frame Rate Readout Mode
280
7
10
13
16
19
22
25
28
31
20
5
520
Drive Timing Chart (Vertical Sync)
ICX204AK
– 19 –
SUB
H2
H1
V3
V2B
V2A
V1
SHD
SHP
RG
CLK
BLK
HD
1
1270 1
1
1
1
1
1
1
45 1
45
Drive Timing Chart (Horizontal Sync)
2.0µs
40
40
1
1
94
60
60
1
1
Progressive Scan Mode
100
1
48
1
80
80
1
1
80
1
56
24
44
44
64
164 1
209
29
238
1
246
Note) 1 unit: 50ns
ICX204AK
241
– 20 –
SUB
H2
H1
V3
V2B
V2A
V1
SHD
SHP
RG
CLK
BLK
HD
1
1270 1
1
1
1
1 10
1 10
1
45 1
45
Drive Timing Chart (Horizontal Sync)
1
1
18
1
28
26
26
1
1
1
28
1
26
94
1
64
28
28
1
26
1
1
1
28
26
26
1
1
1
High Frame Rate Readout Mode
28
1
44
26
1
1
28
28
26
1
1
1
28
1
26
26
1
28
1
56
1 10
20
20
28
164 1
209
29
238
1
246
Note) 1unit: 50ns
ICX204AK
241
ICX204AK
Notes on Handling
1) Static charge prevention
CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following
protective measures.
a) Either handle bare handed or use non-chargeable gloves, clothes or material.
Also use conductive shoes.
b) When handling directly use an earth band.
c) Install a conductive mat on the floor or working table to prevent the generation of static electricity.
d) Ionized air is recommended for discharge when handling CCD image sensor.
e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges.
2) Soldering
a) Make sure the package temperature does not exceed 80°C.
b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a ground 30W
soldering iron and solder each pin in less than 2 seconds. For repairs and remount, cool sufficiently.
c) To dismount an image sensor, do not use a solder suction equipment. When using an electric desoldering
tool, use a thermal controller of the zero cross On/Off type and connect it to ground.
3) Dust and dirt protection
Image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and
dirt. Clean glass plates with the following operation as required, and use them.
a) Perform all assembly operations in a clean room (class 1000 or less).
b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should
dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized
air is recommended.)
c) Clean with a cotton bud and ethyl alcohol if the grease stained. Be careful not to scratch the glass.
d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when
moving to a room with great temperature differences.
e) When a protective tape is applied before shipping, just before use remove the tape applied for
electrostatic protection. Do not reuse the tape.
4) Installing (attaching)
a) Remain within the following limits when applying a static load to the package. Do not apply any load more
than 0.7mm inside the outer perimeter of the glass portion, and do not apply any load or impact to limited
portions. (This may cause cracks in the package.)
AAAA
AAAA
AAAA AAAA
Cover glass
50N
50N
Plastic package
Compressive strength
AAAA
AAAA
1.2Nm
Torsional strength
b) If a load is applied to the entire surface by a hard component, bending stress may be generated and the
package may fracture, etc., depending on the flatness of the bottom of the package. Therefore, for
installation, use either an elastic load, such as a spring plate, or an adhesive.
– 21 –
ICX204AK
c) The adhesive may cause the marking on the rear surface to disappear, especially in case the regulated
voltage value is indicated on the rear surface. Therefore, the adhesive should not be applied to this area,
and indicated values should be transferred to the other locations as a precaution.
d) The notch of the package is used for directional index, and that can not be used for reference of fixing.
In addition, the cover glass and seal resin may overlap with the notch of the package.
e) If the lead bend repeatedly and the metal, etc., clash or rub against the package, the dust may be
generated by the fragments of resin.
f) Acrylate anaerobic adhesives are generally used to attach CCD image sensors. In addition, cyanoacrylate instantaneous adhesives are sometimes used jointly with acrylate anaerobic adhesives. (reference)
5) Others
a) Do not expose to strong light (sun rays) for long periods, color filters will be discolored. When high
luminance objects are imaged with the exposure level control by electronic-iris, the luminance of the
image-plane may become excessive and discolor of the color filter will possibly be accelerated. In such a
case, it is advisable that taking-lens with the automatic-iris and closing of the shutter during the power-off
mode should be properly arranged. For continuous using under cruel condition exceeding the normal
using condition, consult our company.
b) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or
usage in such conditions.
c) The brown stain may be seen on the bottom or side of the package. But this does not affect the CCD
characteristics.
– 22 –
– 23 –
1.2
2.5
0.69
~
~
Plastic
GOLD PLATING
42 ALLOY
0.9g
LEAD TREATMENT
LEAD MATERIAL
PACKAGE WEIGHT
0.3
M
1.27
9.2
10.3
12.2 ± 0.1
H
PACKAGE MATERIAL
V
6.1
~
2.5
0.46
0.3
A
1.2
2.5
8.4
(For the first pin only)
0.5
PACKAGE STRUCTURE
B
5.7
D
B'
C
1
8
11.6
16
9
2.5
2-R0.5
9. The notches on the bottom of the package are used only for directional index, they must
not be used for reference of fixing.
8. The thickness of the cover glass is 0.75mm, and the refractive index is 1.5.
7. The tilt of the effective image area relative to the bottom “C” is less than 50µm.
The tilt of the effective image area relative to the top “D” of the cover glass is less than 50µm.
6. The height from the bottom “C” to the effective image area is 1.41 ± 0.10mm.
The height from the top of the cover glass “D” to the effective image area is 1.94 ± 0.15mm.
5. The rotation angle of the effective image area relative to H and V is ± 1°.
4. The center of the effective image area relative to “B” and “B'”
is (H, V) = (6.1, 5.7) ± 0.15mm.
3. The bottom “C” of the package, and the top of the cover glass “D”
are the height reference.
2. The two points “B” of the package are the horizontal reference.
The point “B'” of the package is the vertical reference.
1. “A” is the center of the effective image area.
16pin DIP (450mil)
9.5
11.4 ± 0.1
3.1
Unit: mm
3.35 ± 0.15
1.27
3.5 ± 0.3
0° to 9°
0.25
11.43
Package Outline
ICX204AK