ICX278AL Diagonal 4.5mm (Type 1/4) CCD Image Sensor for EIA B/W Video Cameras Description The ICX278AL is an interline CCD solid-state image sensor suitable for EIA B/W video cameras with a diagonal 4.5mm (Type 1/4) system. Compared with the current product ICX208AL, basic characteristics such as sensitivity, smear and dynamic range are improved drastically from visible light region to near infrared light region through the adoption of EXview HAD CCDTM technology. This chip features a field period readout system and an electronic shutter with variable charge-storage time. The package is a 10mm-square 14-pin DIP (Plastic). Features • Sensitivity in near infrared light region (+5dB compared with the ICX208AL, λ = 945nm) • High sensitivity (+6dB compared with the ICX208AL, no IR cut filter) • Low smear (–20dB compared with the ICX208AL) • High D range (+2dB compared with the ICX208AL) • Horizontal register: 3.3 to 5V drive • Reset gate: 3.3 to 5V drive • No voltage adjustment (Reset gate and substrate bias are not adjusted.) • High resolution and low smear • Excellent antiblooming characteristics • Continuous variable-speed shutter • Recommended range of exit pupil distance: –20 to –100mm 14 pin DIP (Plastic) Pin 1 2 V 12 3 Pin 8 H 40 Optical black position (Top View) Device Structure • Interline CCD image sensor • Image size: Diagonal 4.5mm (Type 1/4) • Number of effective pixels: 768 (H) × 494 (V) approx. 380K pixels • Total number of pixels: 811 (H) × 508 (V) approx. 410K pixels • Chip size: 4.43mm (H) × 3.69mm (V) • Unit cell size: 4.75µm (H) × 5.55µm (V) • Optical black: Horizontal (H) direction : Front 3 pixels, rear 40 pixels Vertical (V) direction : Front 12 pixels, rear 2 pixels • Number of dummy bits: Horizontal 22 Vertical 1 (even fields only) • Substrate material: Silicon TM ∗ EXview HAD CCD is a trademark of Sony Corporation. EXview HAD CCD is a CCD that drastically improves light efficiency by including near infrared light region as a basic structure of HAD (Hole-Accumulation-Diode) sensor. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E00Z50-PS ICX278AL GND NC Vφ1 Vφ2 Vφ3 Vφ4 7 6 5 4 3 2 1 Vertical Register VOUT Block Diagram and Pin Configuration (Top View) Note) Horizontal Register 9 10 11 12 13 14 φSUB VL RG Hφ1 Hφ2 VDD 8 GND Note) : Photo sensor Pin Description Pin No. Symbol Description Pin No. Symbol Description 1 Vφ4 Vertical register transfer clock 8 VDD Supply voltage 2 Vφ3 Vertical register transfer clock 9 GND GND 3 Vφ2 Vertical register transfer clock 10 φSUB Substrate clock 4 Vφ1 Vertical register transfer clock 11 VL Protective transistor bias 5 NC 12 RG Reset gate clock 6 GND GND 13 Hφ1 Horizontal register transfer clock 7 VOUT Signal output 14 Hφ2 Horizontal register transfer clock Absolute Maximum Ratings Item Against φSUB Ratings Unit VDD, VOUT, RG – φSUB –40 to +8 V Vφ1, Vφ3 – φSUB –50 to +15 V Vφ2, Vφ4, VL – φSUB –50 to +0.3 V Hφ1, Hφ2, GND – φSUB –40 to +0.3 V –0.3 to +18 V Vφ1, Vφ2, Vφ3, Vφ4 – GND –10 to +18 V Hφ1, Hφ2 – GND –10 to +6 V Vφ1, Vφ3 – VL –0.3 to +28 V Vφ2, Vφ4, Hφ1, Hφ2, GND – VL –0.3 to +15 V to +15 V VDD, VOUT, RG – GND Against GND Against VL Voltage difference between vertical clock input pins Between input clock pins Hφ1 – Hφ2 Hφ1, Hφ2 – Vφ4 Storage temperature Operating temperature ∗1 +24V (Max.) when clock width < 10µs, clock duty factor < 0.1%. –2– –5 to +5 V –13 to +13 V –30 to +80 °C –10 to +60 °C Remarks ∗1 ICX278AL Bias Conditions Item Symbol Min. Typ. Max. Unit Supply voltage VDD 14.55 15.45 V Protective transistor bias VL 15.0 ∗1 Substrate clock φSUB ∗2 Reset gate clock φRG ∗2 Remarks ∗1 VL setting is the VVL voltage of the vertical transfer clock waveform, or the same power supply as the VL power supply for the V driver should be used. ∗2 Do not apply a DC bias to the substrate clock and reset gate clock pins, because a DC bias is generated within the CCD. DC Characteristics Symbol Item Supply current Min. IDD Typ. Max. Unit 4 6 mA Remarks Clock Voltage Conditions Item Readout clock voltage Vertical transfer clock voltage Horizontal transfer clock voltage Min. Typ. Max. Unit Waveform diagram VVT 14.55 15.0 15.45 V 1 VVH1, VVH2 –0.05 0 0.05 V 2 VVH3, VVH4 –0.2 0 0.05 V 2 VVL1, VVL2, VVL3, VVL4 –8.0 –7.0 –6.5 V 2 VVL = (VVL3 + VVL4)/2 VφV 6.3 7.0 8.05 V 2 VφV = VVHn – VVLn (n = 1 to 4) Symbol VVH = (VVH1 + VVH2)/2 VVH3 – VVH –0.25 0.1 V 2 VVH4 – VVH –0.25 0.1 V 2 VVHH 0.3 V 2 High-level coupling VVHL 0.3 V 2 High-level coupling VVLH 0.3 V 2 Low-level coupling VVLL 0.3 V 2 Low-level coupling VφH 3.0 3.3 5.25 V 3 VHL –0.05 0 0.05 V 3 3.0 3.3 5.5 V 4 Input through 0.1µF capacitance VRGLH – VRGLL 0.4 V 4 Low-level coupling VRGL – VRGLm 0.5 V 4 Low-level coupling 23.5 V 5 VφRG Reset gate clock voltage Remarks Substrate clock voltage VφSUB 21.0 22.0 –3– ICX278AL Clock Equivalent Circuit Constant Symbol Item Min. Typ. Max. Unit Remarks CφV1, CφV3 1200 pF CφV2, CφV4 560 pF CφV12, CφV34 220 pF CφV23, CφV41 120 pF CφV13 82 pF CφV24 75 pF Capacitance between horizontal transfer clock and GND CφH1, CφH2 22 pF Capacitance between horizontal transfer clocks CφHH 36 pF Capacitance between reset gate clock and GND CφRG 5 pF Capacitance between vertical transfer clock and GND Capacitance between vertical transfer clocks Capacitance between substrate clock and GND CφSUB 180 pF Vertical transfer clock series resistor R1, R2, R3, R4 82 Ω Vertical transfer clock ground resistor RGND 15 Ω Horizontal transfer clock series resistor RφH 12 Ω Reset gate clock series resistor RφRG 51 Ω Vφ2 Vφ1 CφV12 R1 R2 RφH RφH Hφ1 CφV1 Hφ2 CφHH CφV2 CφV41 CφV23 CφH1 CφH2 CφV13 CφV24 CφV4 R4 RGND CφV3 R3 CφV34 Vφ4 Vφ3 Vertical transfer clock equivalent circuit Horizontal transfer clock equivalent circuit RφRG RGφ CφRG Reset gate clock equivalent circuit –4– ICX278AL Drive Clock Waveform Conditions (1) Readout clock waveform 100% 90% φM VVT φM 2 10% 0% tr twh 0V tf (2) Vertical transfer clock waveform Vφ1 Vφ3 VVH1 VVHH VVH VVHH VVHL VVHL VVHL VVL1 VVHH VVHH VVH3 VVH VVHL VVL3 VVLH VVLH VVLL VVLL VVL VVL Vφ2 Vφ4 VVHH VVHH VVH VVH VVHH VVHH VVHL VVHL VVH2 VVHL VVH4 VVLH VVL2VVLH VVLL VVLL VVL4 VVL VVH = (VVH1 + VVH2)/2 VVL = (VVL3 + VVL4)/2 VφV = VVHn – VVLn (n = 1 to 4) VVHL –5– VVL ICX278AL (3) Horizontal transfer clock waveform tr twh tf 90% VφH twl 10% VHL (4) Reset gate clock waveform tr twh tf VRGH twl VφRG Point A RG waveform VRGLH VRGL VRGLL VRGLm Hφ1 waveform VφH/2 [V] VRGLH is the maximum value and VRGLL is the minimum value of the coupling waveform during the period from Point A in the above diagram until the rising edge of RG. In addition, VRGL is the average value of VRGLH and VRGLL. VRGL = (VRGLH + VRGLL)/2 Assuming VRGH is the minimum value during the interval twh, then: VφRG = VRGH – VRGL Negative overshoot level during the falling edge of RG is VRGLm. (5) Substrate clock waveform 100% 90% φM VφSUB 10% VSUB 0% (A bias generated within the CCD) tr twh –6– φM 2 tf ICX278AL Clock Switching Characteristics twh Symbol twl tr tf Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. 2.3 2.5 0.5 0.5 VT Vertical transfer clock Vφ1, Vφ2, Vφ3, Vφ4 Hφ1 26 28.5 26 28.5 6.5 9.5 6.5 9.5 Hφ2 26 28.5 26 28.5 6.5 9.5 6.5 9.5 During Hφ1 parallel-serial Hφ2 conversion 5.38 0.01 0.01 5.38 0.01 0.01 51 3 3 During imaging φRG 11 Substrate clock φSUB 1.5 1.8 13 Remarks During readout 250 ns ∗1 15 Reset gate clock Unit µs Readout clock Horizontal transfer clock Item 0.5 ns ∗2 µs ns 0.5 µs During drain charge ∗1 When vertical transfer clock driver CXD1267AN is used. ∗2 When VφH = 3.0V. tf ≥ tr – 2ns, and the cross-point voltage (VCR) for the Hφ1 rising side of the Hφ1 and Hφ2 waveforms must be at least VφH/2 [V]. Item Symbol Horizontal transfer clock Hφ1, Hφ2 two Min. Typ. 22 26 Max. Unit Remarks ns ∗3 ∗3 The overlap period for twh and twl of horizontal transfer clocks Hφ1 and Hφ2 is two. –7– ICX278AL Image Sensor Characteristics Item (Ta = 25°C) Symbol Min. Typ. Sensitivity 1 S1 640 Sensitivity 2 S2 2200 Saturation signal Vsat 1000 Smear Sm Video signal shading SH Dark signal Max. Unit Measurement method 800 mV 1 3200 mV 2 mV 3 –100 dB 4 20 % 5 Zone 0 and I 25 % 5 Zone 0 to II' Vdt 2 mV 6 Ta = 60°C Dark signal shading ∆Vdt 1 mV 7 Ta = 60°C Flicker F 2 % 8 Lag Lag 0.5 % 9 –108 Zone Definition of Video Signal Shading 768 (H) 14 14 12 H 8 V 10 H 8 Zone 0, I 494 (V) 10 Zone II, II' V 10 lgnored region Effective pixel region –8– Remarks Ta = 60°C ICX278AL Image Sensor Characteristics Measurement Method Measurement conditions 1) In the following measurements, the device drive conditions are at the typical values of the bias and clock voltage conditions. 2) In the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical black (OB) level is used as the reference for the signal output, and the value measured at point [∗A] in the drive circuit example is used. Definition of standard imaging conditions 1) Standard imaging condition I: Use a pattern box (luminance: 706cd/m2, color temperature of 3200K halogen source) as a subject. (Pattern for evaluation is not applicable.) Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter and image at F8. The luminous intensity to the sensor receiving surface at this point is defined as the standard sensitivity testing luminous intensity. 2) Standard imaging condition II: Indicate the state which removes an IR cut filter of standard imaging condition I. 3) Standard imaging condition III: Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles. Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm. 4) Standard imaging condition IV: Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles. Use a testing standard lens (exit pupil distance –33mm) with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm. 1. Sensitivity 1 Set to standard imaging condition I. After selecting the electronic shutter mode with a shutter speed of 1/250s, measure the signal output (Vs 1) at the center of the screen and substitute the value into the following formula. S1 = VS1 × 250 60 [mV] 2. Sensitivity 2 Set to standard imaging condition II. After selecting the electronic shutter mode with a shutter speed of 1/1000s, measure the signal output (Vs 2) at the center of the screen and substitute the value into the following formula. S2 = VS2 × 1000 [mV] 60 3. Saturation signal Set to standard imaging condition III. After adjusting the luminous intensity to 10 times the intensity with the average value of the signal output, 200mV, measure the minimum value of the signal output. –9– ICX278AL 4. Smear Set to standard imaging condition III. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity to 500 times the intensity with average value of the signal output, 200mV. When the readout clock is stopped and the charge drain is executed by the electronic shutter at the respective H blankings, measure the maximum value YSm [mV] of the signal output and substitute the value into the following formula. Sm = 20 × log 1 1 VSm × × 500 10 200 [dB] (1/10V method conversion value) 5. Video signal shading Set to standard imaging condition IV. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity so that the average value of the signal output is 200mV. Then measure the maximum (Vmax [mV]) and minimum (Vmin [mV]) values of the signal output and substitute the values into the following formula. SH = (Vmax – Vmin)/200 × 100 [%] 6. Dark signal Measure the average value of the signal output (Vdt [mV]) with the device ambient temperature 60°C and the device in the light-obstructed state, using the horizontal idle transfer level as a reference. 7. Dark signal shading After measuring 6, measure the maximum (Vdmax [mV]) and minimum (Vdmin [mV]) values of the dark signal output and substitute the values into the following formula. ∆Vdt = Vdmax – Vdmin [mV] 8. Flicker Set to standard imaging condition III. Adjust the luminous intensity so that the average value of the signal output is 200mV, and then measure the difference in the signal level between fields (∆Vf [mV]). Then substitute the value into the following formula. F = (∆Vf/200) × 100 [%] 9. Lag Adjust the signal output value generated by strobe light to 200mV. After setting the strobe light so that it strobes with the following timing, measure the residual signal (Vlag). Substitute the value into the following formula. Lag = (Vlag/200) × 100 [%] FLD V1 Light Strobe light timing Signal output 200mV Output – 10 – Vlag (lag) Drive Circuit 15V 1 20 2 19 3 18 XSUB 4 17 XV2 5 100k 1/35V 0.1 –7.0V 16 CXD1267AN XV1 6 XSG1 7 14 XV3 8 13 XSG2 9 12 XV4 10 11 3.3/16V 15 22/16V – 11 – 4 5 6 7 NC GND VOUT Vφ3 3 Vφ1 2 Vφ2 1 Vφ4 22/20V GND VDD VL 8 RG 9 Hφ1 14 13 12 11 10 Hφ2 φSUB ICX278 (BOTTOM VIEW) 100 2SK523 [∗A] CCD OUT 3.9k Hφ2 2200p Hφ1 1M 0.01 3.3/20V 0.1 RG ICX278AL ICX278AL Spectral Sensitivity Characteristics (excludes both lens characteristics and light source characteristics) 1.0 0.9 0.8 Relative Response 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 400 500 600 700 800 900 1000 Wave Length [nm] Sensor Readout Clock Timing Chart V1 2.5 V2 Odd Field V3 V4 33.5 1.6 2.5 2.5 2.5 0.2 V1 V2 Even Field V3 V4 Unit: µs – 12 – Drive Timing Chart (Vertical Sync) FLD VD BLK 280 275 270 265 260 20 15 10 525 1 2 3 4 5 520 HD – 13 – V1 V2 V3 V4 CCD OUT 493 494 2 4 6 1 3 5 2 4 6 1 3 5 494 493 1 3 5 2 4 6 1 3 5 2 4 6 ICX278AL Drive Timing Chart (Horizontal Sync) HD BLK H1 20 10 20 22 1 2 3 1 2 3 10 1 2 3 5 40 30 20 10 768 1 2 3 5 760 H2 – 14 – RG V1 V2 V3 V4 SUB ICX278AL ICX278AL Notes on Handling 1) Static charge prevention CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following protective measures. a) Either handle bare handed or use non-chargeable gloves, clothes or material. Also use conductive shoes. b) When handling directly use an earth band. c) Install a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image sensor. e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges. 2) Soldering a) Make sure the package temperature does not exceed 80°C. b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a ground 30W soldering iron and solder each pin in less than 2 seconds. For repairs and remount, cool sufficiently. c) To dismount an image sensor, do not use a solder suction equipment. When using an electric desoldering tool, use a thermal controller of the zero cross On/Off type and connect it to ground. 3) Dust and dirt protection Image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and dirt. Clean glass plates with the following operation as required, and use them. a) Perform all assembly operations in a clean room (class 1000 or less). b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air is recommended.) c) Clean with a cotton bud and ethyl alcohol if the grease stained. Be careful not to scratch the glass. d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when moving to a room with great temperature differences. e) When a protective tape is applied before shipping, just before use remove the tape applied for electrostatic protection. Do not reuse the tape. 4) Installing (attaching) a) Remain within the following limits when applying a static load to the package. Do not apply any load more than 0.7mm inside the outer perimeter of the glass portion, and do not apply any load or impact to limited portions. (This may cause cracks in the package.) Cover glass 50N 50N 1.2Nm Plastic package Compressive strength – 15 – Torsional strength ICX278AL b) If a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the bottom of the package. Therefore, for installation, use either an elastic load, such as a spring plate, or an adhesive. c) The adhesive may cause the marking on the rear surface to disappear, especially in case the regulated voltage value is indicated on the rear surface. Therefore, the adhesive should not be applied to this area, and indicated values should be transferred to the other locations as a precaution. d) The notch of the package is used for directional index, and that can not be used for reference of fixing. In addition, the cover glass and seal resin may overlap with the notch of the package. e) If the lead bend repeatedly and the metal, etc., clash or rub against the package, the dust may be generated by the fragments of resin. f) Acrylate anaerobic adhesives are generally used to attach CCD image sensors. In addition, cyano-acrylate instantaneous adhesives are sometimes used jointly with acrylate anaerobic adhesives. (reference) 5) Others a) Do not expose to strong light (sun rays) for long periods. For continuous using under cruel condition exceeding the normal using condition, consult our company. b) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or usage in such conditions. c) The brown stain may be seen on the bottom or side of the package. But this does not affect the CCD characteristics. d) This CCD image sensor has sensitivity in the near infrared area. Its focus may not match in the same condition under visible light/near infrared light because of aberration. Incident light component of long wavelength which transmits the silicon substrate may have bad influence upon image. e) This package has 2 kinds of internal structure. However, their package outline, optical size, and strength are the same. Structure A Structure B Package Chip Metal plate (lead frame) Cross section of lead frame The cross section of lead frame can be seen on the side of the package for structure A. – 16 – Package Outline Unit: mm 14 pin DIP (400mil) 0˚ to 9˚ A 5.0 2.5 C 10.16 8.9 10.0 ± 0.1 1.7 8.9 10.0 ± 0.1 7 7 2.5 7.0 1.0 – 17 – B' 2.6 ~ 1 0.25 1 3.35 ± 0.15 7.0 2.5 V 14 8 H 0.5 ~ D 5.0 ~ B 1.0 8 1.7 14 1. “A” is the center of the effective image area. 2. The two points “B” of the package are the horizontal reference. The point “B'” of the package is the vertical reference. 3. The bottom “C” of the package, and the top of the cover glass “D” are the height reference. 4. The center of the effective image area relative to “B” and “B'” is (H, V) = (5.0, 5.0) ± 0.15mm. 0.3 0.46 1.27 0.3 M PACKAGE STRUCTURE 1.27 3.5 ± 0.3 5. The rotation angle of the effective image area relative to H and V is ± 1˚. 6. The height from the bottom “C” to the effective image area is 1.41 ± 0.10mm. The height from the top of the cover glass “D” to the effective image area is 1.94 ± 0.15mm. 7. The tilt of the effective image area relative to the bottom “C” is less than 25µm. The tilt of the effective image area relative to the top “D” of the cover glass is less than 25µm. 8. The thickness of the cover glass is 0.75mm, and the refractive index is 1.5. Plastic LEAD TREATMENT GOLD PLATING LEAD MATERIAL 42 ALLOY PACKAGE MASS 0.60g DRAWING NUMBER AS-D3-01(E) 9. The notch of the package is used only for directional index, that must not be used for reference of fixing. ICX278AL Sony Corporation PACKAGE MATERIAL