STANFORD SNA-500

Product Description
SNA-500
Stanford Microdevices’ SNA-500 is a GaAs monolithic
broadband amplifier in die form. This amplifier provides
19dB of gain when biased at 70mA and 5.0V. P1dB and
TOIP may be improved by 2dB by baising @ 100mA.
DC-3 GHz, Cascadable
GaAs MMIC Amplifier
External DC decoupling capacitors determine low frequency response. The use of an external resistor allows
for bias flexibility and stability.
These unconditionally stable amplifiers are designed for
use as general purpose 50 ohm gain blocks. Also
available in packaged form (SNA-576, -586 & -587), its
small size (0.4mm x 0.4mm) and gold metallization make it an
ideal choice for use in hybrid circuits.
The SNA-500 is available in gel paks at 100 devices per
container.
Output Power vs. Frequency
22
20
18
dB
16
14
Applications
• Narrow and Broadband Linear Amplifiers
• Commercial and Industrial Applications
12
0.1
1
2
3
4
5
GHz
Electrical Specifications at Ta = 25C
Sym bol
G
P
G
F
BW 3dB
P
1dB
N F
VSW R
IP
T
3
D
IS O L
VD
P a r a m e t e r s : T e s t C o n d itio n s :
Id = 7 0 m A , Z 0 = 5 0 O h m s
U n its
M in .
Ty p .
1 8 .0
1 6 .0
1 5 .0
2 0 .0
1 8 .0
1 7 .0
S m a ll S ig n a l P o w e r G a in
f = 0 .1 -1 .0 G H z
f = 1 .0 -2 .0 G H z
f = 2 .0 -3 .0 G H z
dB
dB
dB
G a in F la tn e s s
f = 0 .1 -2 .0 G H z
dB
+ /- 1 .0
G H z
3 .0
1 8 .0
3 d B B a n d w id th
O u tp u t P o w e r a t 1 d B C o m p r e s s io n
f = 2 .0 G H z
dBm
N o is e F ig u r e
f = 2 .0 G H z
dB
In p u t / O u tp u t
f = 0 .1 -8 .0 G H z
T h ir d O r d e r In te r c e p t P o in t
f = 2 .0 G H z
dBm
3 4 .0
G r o u p D e la y
f = 2 .0 G H z
psec
120
R e v e r s e Is o la tio n
f = 0 .1 -8 .0 G H z
D e v ic e V o lta g e
4 .2
M ax.
5 .0
1 .5 :1
dB
V
2 2 .0
4 .3
5 .0
d G /d T
D e v ic e G a i n T e m p e ra t u r e C o e ff ic ie n t
d B /d e g C
-0 .0 0 2 7
d V /d T
D e v ic e V o lt a g e T e m p e r a t u re C o e ff ic ie n t
m V /d e g C
-5 .0
5 .7
The information provided herein is believed to be reliable at press time. Stanford Microdevices assumes no responsibility for inaccuracies or omissions.
Stanford Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. Stanford Microdevices does not authorize or warrant any Stanford
Microdevices product for use in life-support devices and/or systems.
Copyright 1999 Stanford Microdevices, Inc. All worldwide rights reserved.
522 Almanor Ave., Sunnyvale, CA 94086
Phone: (800) SMI-MMIC
5-69
http://www.stanfordmicro.com
50 Ohm Gain Blocks
Product Features
• Cascadable 50 Ohm Gain Block
• 19dB Gain, +18dBm P1dB
• 1.5:1 Input and Output VSWR
• Operates From Single Supply
• Chip Back Is Ground
SNA-500 DC-3 GHz Cascadable MMIC Amplifier
Typical Performance at 25° C (Vds = 5.0V, Ids = 70mA)
|S21| vs. Frequency
|S11| vs. Frequency
22
0
20
-5
18
dB
dB
-10
16
-15
14
12
-20
0.1
1
2
3
4
0.1
5
1
2
3
4
5
GHz
GHz
|S12| vs. Frequency
|S22| vs. Frequency
0
0
-5
-5
-10
dB
dB
-10
-15
-15
-20
-25
-20
0.1
1
2
3
4
5
0.1
1
2
3
4
5
50 Ohm Gain Blocks
GHz
GHz
TOIP vs. Frequency
Noise Figure vs. Frequency
38
6
36
5
34
dBm
dB
32
4
30
28
3
0.1
1.0
2
3
4
0.1
5
1
2
3
4
5
GHz
GHz
Typical Chip S-Parameters Vds = 5.0V, Ids = 70mA
Freq GHz
|S11|
S11 Ang
|S21|
S21 Ang
|S12|
S12 Ang
|S22|
S22 Ang
.100
0.162
149
10.39
175
0.059
-4
0.128
-176
.250
0.158
152
10.42
169
0.062
0
0.132
-165
.500
0.151
163
10.49
163
0.068
2
0.141
-160
1.00
0.147
175
10.53
159
0.074
4
0.152
-151
1.50
0.140
178
10.61
146
0.076
6
0.204
-148
2.00
0.129
-178
10.64
137
0.077
8
0.243
-149
2.50
0.125
-167
10.54
122
0.079
10
0.293
-155
3.00
0.136
-156
10.25
111
0.082
11
0.323
-160
522 Almanor Ave., Sunnyvale, CA 94086
Phone: (800) SMI-MMIC
5-70
http://www.stanfordmicro.com
SNA-500 DC-3 GHz Cascadable MMIC Amplifier
Absolute Maximum Ratings
Part Number Ordering Information
A b s o lu te
M a xim u m
P a r a m ete r
D e vic e C urre nt
1 3 0m A
Po w e r D issipa tion
7 5 0m W
R F In p ut Po w er
2 0 0m W
Ju n ction Te m p e ra ture
+2 0 0 C
O p e ra tin g Te m p e ra tu re
-4 5 C to +8 5 C
Sto ra g e Te m pe ra tu re
-6 5 C to +1 5 0 C
Part Number
Devices Per Pak
SNA-500
100
Notes:
1. Operation of this device above any one of
these parameters may cause permanent
damage.
6.0
MTTF vs. Temperature @ Id = 70mA
Die Bottom
Temperature
Junction
Temperature
MTTF (hrs)
+65C
+155C
1000000
+100C
+190C
100000
+130C
+220C
10000
5.0
Typical Biasing Configuration
Die Attach
Wire Bonding
The die attach process mechanically attaches the die to
the circuit substrate. In addition, it electrically connects
the ground to the trace on which the die is mounted and
establishes the thermal path by which heat can leave the
die.
Electrical connections to the die are through wire
bonds. Stanford Microdevices recommends wedge
bonding or ball bonding to the pads of these devices.
Recommended Wedge Bonding Procedure
Assembly Techniques
Epoxy die attach is recommended. The top and bottom
metallization is gold. Conductive silver-filled epoxies are
recommended. This method involves the use of epoxy to
form a joint between the backside gold of the chip and
the metallized area of the substrate. A 150 C cure for 1
hour is necessary. Recommended epoxy is Ablebond
84-1LMIT1 from Ablestik.
522 Almanor Ave., Sunnyvale, CA 94086
1. Set the heater block temperature to 260C +/- 10C.
2. Use pre-stressed (annealed) gold wire between
0.0005 to 0.001 inches in diameter.
3. Tip bonding pressure should be between 15 and
20 grams and should not exceed 20 grams. The
footprint that the wedge leaves on the gold wire
should be between 1.5 and 2.5 wire diameters
across for a good bond.
Phone: (800) SMI-MMIC
5-71
http://www.stanfordmicro.com
50 Ohm Gain Blocks
Thermal Resistance (Lead-Junction): 265° C/W