STP4N150 STW4N150 N-CHANNEL 1500V - 5Ω - 4A TO-220/TO-247 Very High Voltage PowerMESH™ MOSFET Figure 1: Package Table 1: General Features TYPE STP4N150 STW4N150 ■ ■ ■ ■ ■ VDSS RDS(on) ID Pw 1500 V 1500 V <7Ω <7Ω 4A 4A 160 W 160 W TYPICAL RDS(on) = 5 Ω AVALANCHE RUGGEDNESS GATE CHARGE MINIMIZED VERY LOW INTRINSIC CAPACITANCES HIGH SPEED SWITCHING 3 1 3 2 2 1 TO-220 DESCRIPTION Using the well consolidated high voltage MESH OVERLAY™ process, STMicroelectronics has designed an advanced family of Power MOSFETs with outstanding performances. The strengthened layout coupled with the Company’s proprietary edge termination structure, gives the lowest RDS(on) per area, unrivalled gate charge and switching characteristics. TO-247 Figure 2: Internal Schematic Diagram APPLICATIONS ■ SWITCH MODE POWER SUPPLIES Table 2: Order Codes SALES TYPE MARKING PACKAGE PACKAGING STP4N150 P4N150 TO-220 TUBE STW4N150 W4N150 TO-247 TUBE Rev. 3 July 2005 1/11 STP4N150 - STW4N150 Table 3: Absolute Maximum ratings Symbol VDS VDGR VGS Parameter Value Unit Drain-source Voltage (VGS = 0) 1500 V Drain-gate Voltage (RGS = 20 kΩ) 1500 V Gate- source Voltage ± 30 V ID Drain Current (continuous) at TC = 25°C 4 A ID Drain Current (continuous) at TC = 100°C 2.5 A IDM () PTOT Drain Current (pulsed) 12 A Total Dissipation at TC = 25°C 160 W 1 W/°C -55 to 150 °C Derating Factor Tj Tstg Operating Junction Temperature Storage Temperature ( ) Pulse width limited by safe operating area (*) Limited only by maximum temperature allowed Table 4: Thermal Data TO-220 Rthj-case Thermal Resistance Junction-case Max Rthj-amb Thermal Resistance Junction-ambient Max TO-247 0.78 62.5 °C/W 50 °C/W Table 5: Avalanche Characteristics Symbol Parameter IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) Max Value Unit 4 A 350 mJ ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) Table 6: On /Off Symbol Parameter Test Conditions Drain-source Breakdown Voltage ID = 1 mA, VGS = 0 IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating VDS = Max Rating,TC = 125°C IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 30 V VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA RDS(on) Static Drain-source On Resistance VGS = 10 V, ID = 2 A V(BR)DSS 2/11 Min. Typ. Max. 1500 3 Unit V 10 500 µA µA ± 100 nA 4 5 V 5 7 Ω STP4N150 - STW4N150 ELECTRICAL CHARACTERISTICS (CONTINUED) Table 7: Dynamic Symbol gfs (1) Parameter Test Conditions Forward Transconductance VDS = 30 V , ID = 2 A Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance td(on) tr td(off) tf Qg Qgs Qgd Min. Typ. Max. Unit 3.5 S VDS = 25 V, f = 1 MHz, VGS = 0 1300 120 12 pF pF pF Turn-on Delay Time Rise Time Turn-off-Delay Time Fall Time VDD = 750 V, ID = 2 A, RG = 4.7 Ω, VGS = 10 V (see Figure 19) 35 30 45 45 ns ns ns ns Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = 600 V, ID = 4 A, VGS = 10 V (see Figure 22) 30 10 9 50 nC nC nC Max. Unit 4 12 A A 2 V Table 8: Source Drain Diode Symbol Parameter Test Conditions Min. Typ. ISD ISDM (2) Source-drain Current Source-drain Current (pulsed) VSD (1) Forward On Voltage ISD = 4 A, VGS = 0 Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 4 A, di/dt = 100 A/µs VDD = 45V (see Figure 20) 510 3 12 ns µC A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 4 A, di/dt = 100 A/µs VDD = 45V, Tj = 150°C (see Figure 20) 650 4 12.6 ns µC A trr Qrr IRRM trr Qrr IRRM (1) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. (2) Pulse width limited by safe operating area. 3/11 STP4N150 - STW4N150 Figure 3: Safe Operating Area For TO-220 Figure 6: Thermal Impedance For TO-220 Figure 4: Safe Operating Area For TO-247 Figure 7: Thermal Impedance For TO-247 Figure 5: Output Characteristics Figure 8: Transfer Characteristics 4/11 STP4N150 - STW4N150 Figure 9: Transconductance Figure 12: Static Drain-source On Resistance Figure 10: Gate Charge vs Gate-source Voltage Figure 13: Capacitance Variations Figure 11: Normalized Gate Threshold Voltage vs Temperature Figure 14: Normalized On Resistance vs Temperature 5/11 STP4N150 - STW4N150 Figure 15: Source-Drain Forward Characteristics Figure 16: Maximum Avalanche Energy vs Temperature 6/11 Figure 17: Normalized BVdss vs Temperature STP4N150 - STW4N150 Figure 18: Unclamped Inductive Load Test Circuit Figure 21: Unclamped Inductive Waveform Figure 19: Switching Times Test Circuit For Resistive Load Figure 22: Gate Charge Test Circuit Figure 20: Test Circuit For Inductive Load Switching and Diode Recovery Times 7/11 STP4N150 - STW4N150 TO-220 MECHANICAL DATA DIM. mm. MIN. inch MAX. MIN. TYP. MAX. A 4.40 4.60 0.173 0.181 b 0.61 0.88 0.024 0.034 b1 1.15 1.70 0.045 0.066 c 0.49 0.70 0.019 0.027 D 15.25 15.75 0.60 0.620 E 10 10.40 0.393 0.409 e 2.40 2.70 0.094 0.106 e1 4.95 5.15 0.194 0.202 F 1.23 1.32 0.048 0.052 H1 6.20 6.60 0.244 0.256 J1 2.40 2.72 0.094 0.107 0.551 L 13 14 0.511 L1 3.50 3.93 0.137 L20 16.40 L30 8/11 TYP 0.154 0.645 28.90 1.137 øP 3.75 3.85 0.147 0.151 Q 2.65 2.95 0.104 0.116 STP4N150 - STW4N150 TO-247 MECHANICAL DATA DIM. mm. MIN. TYP inch MAX. MIN. TYP. MAX. A 4.85 5.15 0.19 0.20 A1 2.20 2.60 0.086 0.102 b 1.0 1.40 0.039 0.055 b1 2.0 2.40 0.079 0.094 b2 3.0 3.40 0.118 0.134 c 0.40 0.80 0.015 0.03 D 19.85 20.15 0.781 0.793 E 15.45 15.75 0.608 0.620 e 5.45 0.214 L 14.20 14.80 0.560 L1 3.70 4.30 0.14 L2 18.50 0.582 0.17 0.728 øP 3.55 3.65 0.140 0.143 øR 4.50 5.50 0.177 0.216 S 5.50 0.216 9/11 STP4N150 - STW4N150 Table 9: Revision History Date Revision 11-Mar-2005 27-Apr-2005 07-Jul-2005 1 2 3 10/11 Description of Changes First release. Removed TO-220FP Complete version STP4N150 - STW4N150 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners © 2005 STMicroelectronics - All Rights Reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 11/11