STMICROELECTRONICS STW30NM60D

STW30NM60D
N-CHANNEL 600V - 0.125Ω - 30A TO-247
Fast Diode MDmesh™ MOSFET
Table 1: General Features
TYPE
STW30NM60D
■
■
■
■
■
■
Figure 1: Package
VDSS
RDS(on)
ID
600 V
< 0.145 Ω
30 A
TYPICAL RDS(on) = 0.125 Ω
HIGH dv/dt AND AVALANCHE CAPABILITIES
100% AVALANCHE RATED
LOW INPUT CAPACITANCE AND GATE
CHARGE
LOW GATE INPUT RESISTANCE
FAST INTERNAL RECOVERY DIODE
TO-247
DESCRIPTION
The FDmesh™ associates all advantages of reduced on-resistance and fast switching with an intrinsic fast-recovery body diode. It is therefore
strongly recommended for bridge topologies, in
particular ZVS phase-shift converters.
Figure 2: Internal Schematic Diagram
APPLICATIONS
ZVS PHASE-SHIFT FULL BRIDGE
CONVERTERS FOR SMPS AND WELDING
EQUIPMENT
■
Table 2: Order Codes
SALES TYPE
MARKING
PACKAGE
PACKAGING
STW30NM60D
W30NM60D
TO-247
TUBE
Rev. 3
June 2004
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STW30NM60D
Table 3: Absolute Maximum ratings
Symbol
VDS
VDGR
VGS
Parameter
Drain-source Voltage (VGS = 0)
Value
Unit
600
V
Drain-gate Voltage (RGS = 20 kΩ)
600
V
Gate- source Voltage
± 30
V
ID
Drain Current (continuous) at TC = 25°C
30
A
ID
Drain Current (continuous) at TC = 100°C
18.9
A
IDM ()
PTOT
dv/dt (1)
Tj
Tstg
Drain Current (pulsed)
120
A
Total Dissipation at TC = 25°C
312
W
Derating Factor
2.5
W/°C
20
V/ns
-55 to 150
-55 to 150
°C
°C
Peak Diode Recovery voltage slope
Operating Junction Temperature
Storage Temperature
( ) Pulse width limited by safe operating area
(1) ISD ≤30A, di/dt ≤400A/µs, VDD ≤ V(BR)DSS, Tj ≤ T JMAX.
Table 4: Thermal Data
Rthj-case
Thermal Resistance Junction-case Max
0.4
°C/W
Rthj-amb
Thermal Resistance Junction-ambient Max
62.5
°C/W
Maximum Lead Temperature For Soldering Purpose
300
°C
Tl
Table 5: Avalanche Characteristics
Symbol
Parameter
Max Value
Unit
IAR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max)
15
A
EAS
Single Pulse Avalanche Energy
(starting Tj = 25 °C, ID = IAR, VDD = 50 V)
740
mJ
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)
Table 6: On /Off
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Drain-source Breakdown
Voltage
ID = 1 mA, VGS = 0
IDSS
Zero Gate Voltage
Drain Current (VGS = 0)
VDS = Max Rating
VDS = Max Rating, TC = 125°C
10
100
µA
µA
IGSS
Gate-body Leakage
Current (VDS = 0)
VGS = ± 20 V
± 10
µA
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
4
5
V
RDS(on
Static Drain-source On
Resistance
VGS = 10 V, ID = 15 A
0.125
0.145
Ω
2/9
600
Unit
V(BR)DSS
3
V
STW30NM60D
Table 7: Dynamic
Symbol
gfs (1)
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
Forward Transconductance
VDS = 15 V , ID = 15 A
16
S
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
VDS = 25 V, f = 1 MHz,
VGS = 0
2520
800
75
pF
pF
pF
Equivalent Output
Capacitance
VGS = 0 V, VDS = 0 to 480 V
390
pF
td(on)
tr
td(off)
tf
Turn-on Delay Time
Rise Time
Turn-off-Delay Time
Fall Time
VDD = 300 V, ID = 15 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 15)
32
33
75
35
ns
ns
ns
ns
Qg
Qgs
Qgd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
VDD = 480 V, ID = 30 A,
VGS = 10 V
(see Figure 18)
82
24
42
115
nC
nC
nC
Typ.
Max.
Unit
30
120
A
A
1.5
V
Ciss
Coss
Crss
COSS eq (3).
Table 8: Source Drain Diode
Symbol
Parameter
Test Conditions
Min.
ISD
ISDM (2)
Source-drain Current
Source-drain Current (pulsed)
VSD (1)
Forward On Voltage
ISD = 30 A, VGS = 0
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
ISD = 30 A, di/dt = 100 A/µs
VDD = 50V
(see Figure 16)
165
1.1
14
ns
nC
A
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
ISD = 30 A, di/dt = 100 A/µs
VDD = 50V, Tj = 150°C
(see Figure 16)
312
3.3
21
ns
nC
A
trr
Qrr
IRRM
trr
Qrr
IRRM
(1) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
(2) Pulse width limited by safe operating area.
(3) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS.
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STW30NM60D
Figure 3: Safe Operating Area
Figure 6: Thermal Impedance
Figure 4: Output Characteristics
Figure 7: Transfer Characteristics
Figure 5: Transconductance
Figure 8: Static Drain-source On Resistance
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STW30NM60D
Figure 9: Gate Charge vs Gate-source Voltage
Figure 12: Capacitance Variations
Figure 10: Normalized Gate Thereshold Voltage vs Temperature
Figure 13: Normalized On Resistance vs Temperature
Figure 11: Dource-Drain Diode Forward Characteristics
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STW30NM60D
Figure 14: Unclamped Inductive Load Test Circuit
Figure 17: Unclamped Inductive Wafeform
Figure 15: Switching Times Test Circuit For
Resistive Load
Figure 18: Gate Charge Test Circuit
Figure 16: Test Circuit For Inductive Load
Switching and Diode Recovery Times
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STW30NM60D
TO-247 MECHANICAL DATA
DIM.
mm.
MIN.
TYP
inch
MAX.
MIN.
TYP.
MAX.
A
4.85
5.15
0.19
0.20
A1
2.20
2.60
0.086
0.102
b
1.0
1.40
0.039
0.055
b1
2.0
2.40
0.079
0.094
0.134
b2
3.0
3.40
0.118
c
0.40
0.80
0.015
0.03
D
19.85
20.15
0.781
0.793
E
15.45
15.75
0.608
e
5.45
L
14.20
14.80
0.560
L1
3.70
4.30
0.14
L2
0.620
0.214
18.50
0.582
0.17
0.728
øP
3.55
3.65
0.140
0.143
øR
4.50
5.50
0.177
0.216
S
5.50
0.216
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STW30NM60D
Table 9: Revision History
Date
Revision
24-June-2004
3
Description of Changes
The document change from “ADVANCED” to “COMPLETE”.
New Stylesheet.
Rds(on) Max@10V changed. See Table 6.
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STW30NM60D
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