AOSMD AOT9602

AOT3N60
2.5A, 600V N-Channel MOSFET
formerly engineering part number AOT9602
General Description
Features
The AOT3N60 has been fabricated using an
advanced high voltage MOSFET process that is
designed to deliver high levels of performance and
robustness in popular AC-DC applications.
By providing low RDS(on), Ciss and Crss along with
guaranteed avalanche capability these parts can be
adopted quickly into new and existing offline power
supply designs.
VDS (V) = 700V @ 150°C
ID = 2.5A
RDS(ON) < 3.5 Ω (VGS = 10V)
100% UIS Tested!
100% R g Tested!
C iss, C oss , C rss Tested!
D
Top View
TO-220
G
G
S
D
S
Absolute Maximum Ratings TA=25°C unless otherwise noted
Maximum
Parameter
Symbol
VDS
Drain-Source Voltage
600
VGS
Gate-Source Voltage
±30
Continuous Drain
TC=25°C
2.5
B
Current
TC=100°C
ID
1.6
Pulsed Drain Current
Avalanche Current
C
C
Repetitive avalanche energy
C
Single pulsed avalanche energy G
Peak diode recovery dv/dt
TC=25°C
B
o
Power Dissipation
Derate above 25 C
Junction and Storage Temperature Range
Maximum lead temperature for soldering
purpose, 1/8" from case for 5 seconds
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient
A
A
Maximum Case-to-Sink
Maximum Junction-to-Case D,F
Alpha & Omega Semiconductor, Ltd.
Units
V
V
A
IDM
8
IAR
2
A
EAR
60
mJ
EAS
dv/dt
120
5
59.5
mJ
V/ns
W
0.48
-50 to 150
W/ C
°C
300
°C
PD
TJ, TSTG
TL
Symbol
RθJA
RθCS
RθJC
o
Typical
54
Maximum
65
Units
-
0.5
1.2
2.1
°C/W
°C/W
°C/W
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AOT3N60
Electrical Characteristics (T J=25°C unless otherwise noted)
Parameter
Symbol
Conditions
Min
ID=250µA, VGS=0V, TJ=25°C
600
Typ
Max
Units
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
BVDSS
Breakdown Voltage Temperature
/∆TJ
Coefficient
IDSS
Zero Gate Voltage Drain Current
700
ID=250µA, VGS=0V, TJ=150°C
ID=250µA, VGS=0V
o
VDS=480V, TJ=125°C
10
Gate-Body leakage current
VDS=0V, VGS=±30V
Gate Threshold Voltage
VDS=VGS, ID=250µA
RDS(ON)
gFS
Static Drain-Source On-Resistance
Forward Transconductance
VSD
IS
Diode Forward Voltage
IS=1A, VGS=0V
Maximum Body-Diode Continuous Current
ISM
Maximum Body-Diode Pulsed Current
Reverse Transfer Capacitance
Rg
Gate resistance
SWITCHING PARAMETERS
Qg
Total Gate Charge
Qgs
Gate Source Charge
Qgd
Gate Drain Charge
tD(on)
Turn-On DelayTime
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
Turn-Off Fall Time
µA
±100
nA
4
5
V
VGS=10V, ID=1.25A
2.9
3.5
VDS=40V, ID=1.25A
2.8
Ω
S
1
V
2
A
8
A
3
0.64
DYNAMIC PARAMETERS
Ciss
Input Capacitance
Crss
V/ C
0.65
1
IGSS
Output Capacitance
V
VDS=600V, VGS=0V
VGS(th)
Coss
V
VGS=0V, VDS=25V, f=1MHz
VGS=0V, VDS=0V, f=1MHz
VGS=10V, VDS=480V, ID=2A
VGS=10V, VDS=300V, ID=2A,
RG=25Ω
240
304
370
pF
25
31.4
38
pF
2.6
3.3
4
pF
2.3
2.9
4.5
Ω
9.9
12
nC
2.1
3
nC
4.6
6
nC
17
20
ns
17
20
ns
24
30
ns
16
20
ns
ns
µC
trr
Body Diode Reverse Recovery Time
IF=2.5A,dI/dt=100A/µs,VDS=100V
175
210
Qrr
Body Diode Reverse Recovery Charge IF=2.5A,dI/dt=100A/µs,VDS=100V
1.4
1.7
A: The value of R θJA is measured with the device in a still air environment with T A =25°C.
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation
limit for cases where additional heatsinking is used.
C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C.
D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a
maximum junction temperature of TJ(MAX)=150°C.
G. L=60mH, IAS=2A, VDD=50V, RG=25Ω, Starting TJ=25°C
60
Rev 0. July 2008
100
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Alpha & Omega Semiconductor, Ltd.
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AOT3N60
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
5
10
10V
-55°C
VDS=40V
4
6.5V
ID(A)
ID (A)
3
6V
2
1
1
125°C
25°C
VGS=5.5V
0
0.1
0
5
10
15
20
25
30
2
4
VDS (Volts)
Fig 1: On-Region Characteristics
6
8
10
VGS(Volts)
Figure 2: Transfer Characteristics
2.5
6.0
RDS(ON) (mΩ)
5.0
Normalized On-Resistance
5.5
VGS=10V
4.5
4.0
3.5
3.0
2.5
2
VGS=10V
ID=1A
1.5
1
0.5
2.0
0
1
2
3
4
5
0
-100
6
ID (A)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage
-50
0
50
100
150
200
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
1.0E+01
1.2
60
IS (A)
BVDSS (Normalized)
125°C
1.0E+00
1.1
1
1.0E-01
25°C
1.0E-02
0.9
1.0E-03
0.8
-100
1.0E-04
-50
0
50
100
150
200
TJ (oC)
Figure 5: Break Down vs. Junction Temperature
Alpha & Omega Semiconductor, Ltd.
0.2
0.4
0.6
0.8
1.0
VSD (Volts)
Figure 6: Body-Diode Characteristics
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AOT3N60
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
15
10000
VDS=480V
ID=2A
Ciss
Capacitance (pF)
VGS (Volts)
12
9
6
1000
Coss
100
10
3
0
1
0
2
4
6
8
10
12
Qg (nC)
Figure 7: Gate-Charge Characteristics
14
0.1
RDS(ON)
limited
10µs
10
VDS (Volts)
Figure 8: Capacitance Characteristics
100
1ms
1
100µs
0.1
TJ(Max)=150°C
TC=25°C
10ms
0.1s
DC
0.01
1
10
100
1000
Current rating ID(A)
2.50
10
2.00
1.50
1.00
0.50
0.00
0
VDS (Volts)
10
25
50
75
100
125
150
TCASE (°C)
Figure 10: Current De-rating (Note B)
Figure 9: Maximum Forward Biased Safe Operating
Area for AOT3N60 (Note F)
ZθJC Normalized Transient
Thermal Resistance
1
3.00
100
ID (Amps)
Crss
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
D=Ton/T
TJ,PK=TA+PDM.ZθJC.RθJC
RθJC=0.45°C/W
1
0.1
PD
Ton
Single Pulse
0.01
0.00001
0.0001
0.001
0.01
0.1
1
T
10
100
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance for AOT3N60 (Note F)
Alpha & Omega Semiconductor, Ltd.
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AOT3N60
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
+
VDC
-
VDC
DUT
Qgs
Vds
Qgd
-
Vgs
Ig
Charge
Res istive Switching Test Circuit & Waveforms
RL
Vds
Vds
DUT
Vgs
Rg
+
VDC
90%
Vdd
-
10%
Vgs
Vgs
t d(on)
tr
t d(off)
t on
tf
t off
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
EAR= 1/2 LI
Vds
2
AR
BVDSS
Vds
Id
+
Vgs
Vgs
VDC
Rg
-
Vdd
I AR
Id
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Qrr = - Idt
Vds +
DUT
Vds -
Isd
Vgs
L
Vgs
Ig
Alpha & Omega Semiconductor, Ltd.
Isd
+
VDC
-
IF
trr
dI/dt
IRM
Vdd
Vdd
Vds
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