NT5117405J 4,194,304-word X 4-bit Dynamic RAM : Fast Page Mode with EDO NT 511740C5J Data Sheet 1 NANYA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. © NANYA TECHNOLOGY CORP NT5117405J 4,194,304-word X 4-bit Dynamic RAM : Fast Page Mode with EDO TABLE OF CONTENTS 1. Description.............................................................................................3 2. Features.................................................................................................3 3. Product Family........................................................................................3 4. Pin Configuration....................................................................................4 5. Block Diagram........................................................................................5 6. Electrical Characteristics.......................................................................6 7. DC Characteristics.................................................................................7 8. AC Characteristics.................................................................................8~11 9. DRAM AC Timing Waveforms..............................................................12~18 2 NANYA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. © NANYA TECHNOLOGY CORP NT5117405J 4,194,304-word X 4-bit Dynamic RAM : Fast Page Mode with EDO 1. DESCRIPTION The NT511740C5J is a 4,194,304-word x 4-bit dynamic RAM fabricated in NTC’s CMOS silicon gate technology. The NT511740C5J achieves high integration , high-speed operation , and lowpower consumption due to quadruple polysilicon double metal CMOS. The NT511740C5J is available in a 26/24-pin plastic SOJ. 2. FEATURES l l l l l l l l l 4,194,304-word x 4-bit configuration Single 5V power supply,+/-10% tolerance Input :TTL compatible , low input capacitance Output :TTL compatible , 3-state Refresh :2048 cycles/32 ms Fast page mode with EDO, read modify write capability /CAS before /RAS refresh, hidden refresh, /RAS-only refresh capability Multi-bit test mode capability Package options: 26/24-Pin 300 mil plastic SOJ (SOJ26/24-P300) (Product:NT511740C5J-XX) XX indicates speed rank. 3. PRO D UCT FAM ILY Access Tim e (M ax.) C ycle Time Power Dissipation Fam ily NT511740C5J-50 NT511740C5J-60 NT511740C5J-70 t RA C tA A 50ns 25ns 60 ns 30 ns 70 ns 35 ns t CA C 13ns 15 ns 20 ns t O EA 13ns 15 ns 20 ns (M in.) 84ns 104 ns 124 ns 3 Operation(M ax.) Standby(M ax.) 660m W 605m W 5.5 m W 550 m W NANYA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. © NANYA TECHNOLOGY CORP NT5117405J 4,194,304-word X 4-bit Dynamic RAM : Fast Page Mode with EDO 4. PIN CONFIGURATION (TOPVIEW) Vcc 1 26 Vss DQ1 2 25 DQ4 DQ2 3 24 DQ3 WE 4 23 CAS RAS 5 22 OE NC 6 21 A9 A10 8 19 A8 A0 9 18 A7 A1 10 17 A6 A2 11 16 A5 A3 12 15 A4 Vcc 13 14 Vss 26/24-Pin Plastic SOJ Pin Name A0-A10 Function Adress input RAS Row Adress Strobe CAS Column Adress Strobe DQ1-DQ4 Data Input/Data Output OE Output Enable WE Write Enable Vcc Power Supply (5v) Vss Ground(0V) NC No Connection Note:The same power supply voltage must be provided to every Vcc pin , and the same GND voltage level must be provided to every Vss pin. 4 NANYA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. © NANYA TECHNOLOGY CORP NT5117405J 4,194,304-word X 4-bit Dynamic RAM : Fast Page Mode with EDO 5. BLOCK DIAGRAM Timing Generator RAS Timing Generator CAS 11 Column Address Buffer Write Clock Generator Column Decoders 11 WE OE 4 Internal Address Counter A0-A10 Refresh Control Clock Sense Amplifiers 4 I/O Selector 4 4 4 11 Row Address Buffer 11 Row Decoders Word Drivers Output Buffers Input Buffers DQ1-DQ4 4 Memory Cells VCC On Chip VBB Generator On Chip IVCC Generator VSS 5 NANYA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. © NANYA TECHNOLOGY CORP NT5117405J 4,194,304-word X 4-bit Dynamic RAM : Fast Page Mode with EDO 6. ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings Parameter Voltage on Any Pin Relative to VSS Voltage on VCC Supply Relative to VSS Short Circuit Output Cuttent Po/WEr Dissipation Operation Temperature Symbol VIN,VOUT VCC IOS PD* Topr Rating -0.3 to VCC+0.3 -0.5 to 7 50 1 0 to 70 Tstg -55 to 150 Storage Temperature *:Ta = 25 o Unit V V mA W o C o C Recommended Operating Conditions o Input High Voltage Symbol VCC VSS VIH Min. 4.5 0 2.4 Typ. 5.0 0 - (Ta=0 C to70 Max. 5.5 0 VCC+0.3 Input Low Voltage VIL -0.3 - 0.8 Parameter Po/WEr Supply Voltage C o C) Unit V V V V Capacitance Parameter (Vcc = 5V+/-10%,Ta=25 Symbol Typ. o C , f=1 MHZ) Max. Unit Input Capacitance (A0-A10) CIN1 - 5 pF Input Capacitance (/RAS,/CAS,/WE,/OE) CIN2 - 7 pF Output Capacitance (DQ1-DQ4) CI/O - 7 pF 6 NANYA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. © NANYA TECHNOLOGY CORP NT5117405J 4,194,304-word X 4-bit Dynamic RAM : Fast Page Mode with EDO 7. DC Characteristics o (Vcc=5V+/-10% ,Ta=0 Parameter Symbol Output High Voltage Output LOW Voltage V OH V OL Input Leakage Current IL1 Output Leakage Current Average Power Supply Current (Operating) IL0 NT511740C NT511740C NT511740C 5J-50 5J-60 5J-70 Condition Min. Max. Min. Max. Min. Max. IOH =-5.0 mA o C to 70 C) Unit Note 2.4 0 Vcc 0.4 2.4 0 Vcc 0.4 2.4 0 Vcc 0.4 V V -10 10 -10 10 -10 10 µA -10 10 -10 10 -10 10 µA tRC = Min. - 120 - 110 - 100 mA 1,2 /RAS , /CAS=VIH - 2 - 2 - 2 /RAS, - 1 - 1 - 1 mA 1 - 120 - 110 - 110 mA 1,2 - 5 - 5 - 5 mA 1 - 110 - 100 - 90 mA 1,2 - 110 - 100 - 90 mA 1,3 IOL =4.2 mA 0V<=VI<=6.5V; All other pins not under test = 0V DQ disable 0V<=Vo<=5.5V /RAS,CAC cycling, Icc1 Power Supply Icc2 Current (Standby) /CAS >=Vcc-0.2V Average Power Supply Current (/RAS-only Refresh) Power Supply /RAS cycling, Icc3 /CAS = VIH, tRC=Min. Icc5 Current (Standby) /RAS= VIH, /CAS= VIL, DQ = enable Average Power Supply Current (/CAS before /RAS Refresh) Average Power Supply Current (Fast Page Mode) Notes¡G /RAS cycling, Icc6 /CAS before /RAS /RAS=VIL, Icc7 /CAS cycling tpc=Min. 1. ICC Max. is specified as Icc for output open condition. 2. Address can be changed once or less while /RAS=VIL. 3. Address can be changed once or less while /CAS=VIH. 7 NANYA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. © NANYA TECHNOLOGY CORP NT5117405J 4,194,304-word X 4-bit Dynamic RAM : Fast Page Mode with EDO 8. AC Characteristics (1/3) (Vcc=5V¡Ó 10% ,Ta=0 oC to 70 oC ) Note:1,2,3,12,13 NT511740C5J- NT511740C5J- NT511740C5J50 60 70 Unit Note Symbol Min. Max. Min. Max. Min. Max. Parameter Random Read or Write Cycle Time tRC 84 - 104 - 124 - ns Read Modify Write Cycle Time tRWC 110 - 135 - 160 - ns Fast Page Mode Cycle Time tHPC 20 - 25 - 30 - ns Fast Page Mode Read Modify Write Cycle Time tPRWC 58 - 68 - 78 - ns Access Time form /RAS tRAC - 50 - 60 - 70 ns 4,5,6 Access Time form /CAS tCAC - 13 - 15 - 20 ns 4,5 Access Time form Column Address tAA - 25 - 30 - 35 ns 4,6 Access Time form /CAS Precharge tCPA - 30 - 35 - 40 ns 4 Access Time form /OE t/OEA - 13 - 15 - 20 ns 4 Output Low Impedance Time from /CAS tCLZ 0 - 0 - 0 - ns 4 Data Output Hold After /CAS Low tDOH 5 - 5 - 5 - ns /CAS to Data Output Buffer Turn-off Delay Time tCEZ 0 13 0 15 0 20 ns 7,8 /RAS to Data Output Buffer Turn-off Time tREZ 0 13 0 15 0 20 ns 7,8 Delay /OE to Data Output Buffer Turn-off Delay Time t/OEZ 0 13 0 15 0 20 ns 7 /WE to Data Output Buffer Turn-off Time Delay t/WEZ 0 13 0 15 0 20 ns 7 Transition Time tT 1 50 1 50 1 50 ns 3 Refresh Period tREF - 32 - 32 - 32 ms /RAS Precharge Time tRP 30 - 40 - 50 - ns /RAS Pulse Width t/RAS 50 10,000 60 10,000 70 10,000 ns /RAS Pulse Width (Fast Page Mode with EDO) t/RASP 50 100,000 60 100,000 70 100,000 ns 8 NANYA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. © NANYA TECHNOLOGY CORP NT5117405J 4,194,304-word X 4-bit Dynamic RAM : Fast Page Mode with EDO AC Characteristics (2/3) NT10511740C5J50 Parameter NT511740C5J60 NT511740C5J70 Symbol Unit Min. Max. Min. Max. Min. Max. Note /RAS Hold Time tRSH 7 - 10 - 13 - ns /RAS Hold Time referenced to /OE tROH 7 - 10 - 13 - ns tCP 7 - 10 - 13 - ns /CAS Pulse Width t/CAS 7 10,000 10 10,000 13 10,000 ns /CAS Hold Time tCSH 35 - 40 - 45 - ns /CAS to /RAS Precharge Time tCRP 5 - 5 - 5 - ns /RAS Hold Time from /CAS Precharge Time tRHCP 30 - 35 - 40 - ns /OE Hold Time from /CAS (DQ Disable) tCHO 5 - 5 - 5 - ns /RAS to /CAS Delay Time tRCD 11 37 14 45 14 50 ns 5 /RAS to Column Address Delay Time tRAD 9 25 12 30 12 35 ns 6 Row Address Set-up Time tASR 0 - 0 - 0 - ns Row Address Hold Time tRAH 7 - 10 - 13 - ns Column Address Set-up Time tASC 0 - 0 - 0 - ns Column Address Hold Time tCAH 7 - 10 - 13 - ns Column Address to /RAS Lead Time tRAL tRCS tRCH tRRH tWCS 25 - 30 - 35 - ns 0 - 0 - 0 - ns 0 - 0 - 0 - ns 0 - 0 - 0 - ns 9 0 - 0 - 0 - ns 10 /CAS Precharge Time (Fast Page Mode with EDO) Read Command Set-up Time Read Command Hold Time Read Command Hold Time referenced to /RAS Write Command Set-up Time 9 NANYA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. © NANYA TECHNOLOGY CORP 9 NT5117405J 4,194,304-word X 4-bit Dynamic RAM : Fast Page Mode with EDO AC Characteristics (3/3) (Vcc=5V +/-10% ,Ta=0 oC to 70 oC) Note 1,2,3,12,13 NT511740C5J- NT511740C5J- NT511740A5J50 60 70 Parameter Write Command Hold Time Write Command Pulse Width /WE Pulse Width (DQ Disable) /OE Command Hold Time /OE Precharge Time /OE Command Hold Time Write Command to /RAS Lead Time Write Command to /CAS Lead Time Data-in Set-up Time Data-in Hold Time /OE to Data-in Delay Time /CAS to /WE Delay Time Column Address to /WE Delay Time /RAS to /WE Delay Time /CAS Precharge /WE Delay Time /CAS Active Delay Time from /RAS Precharge /RAS to /CAS Set-up Time (/CAS before /RAS) /RAS to /CAS Hold Time (/CAS before /RAS) /WE to /RAS Precharge Time (/CAS before /RAS) /WE Hold Time /RAS (/CAS before /RAS) /RAS to /WE Set-up Time (Test Mode) /RAS to /WE Hold Time (Test Mode) Unit Symbol tWCH tWP tWPE t/OEH t/OEP tOCH tRWL tCWL tDS tDH t/OED tCWD tAWD tRWD tCPWD tRPC tCSR tCHR tWRP tWRH tWTS tWTH 10 Note Min. Max. Min. Max. Min. Max. 7 - 10 - 13 - ns 7 - 10 - 10 - ns 7 - 10 - 10 - ns 7 - 10 - 13 - ns 7 - 10 - 10 - ns 7 - 10 - 10 - ns 7 - 10 - 13 - ns 7 - 10 - 13 - ns 0 - 0 - 0 - ns 11 7 - 10 - 13 - ns 11 13 - 15 - 20 - ns 30 - 34 - 44 - ns 10 42 - 49 - 59 - ns 10 67 - 79 - 94 - ns 10 47 - 54 - 64 - ns 10 5 - 5 - 5 - ns 5 - 5 - 5 - ns 10 - 10 - 10 - ns 10 - 10 - 10 - ns 10 - 10 - 10 - ns 10 - 10 - 10 - ns 10 - 10 - 10 - ns NANYA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. © NANYA TECHNOLOGY CORP NT5117405J 4,194,304-word X 4-bit Dynamic RAM : Fast Page Mode with EDO Notes: 1. A start-up delay of 200 µs is required after po/WEr-up,follo/WEd by a minimum of eight initialization cycles (/RAS-only refresh or /CAS before /RAS refresh) before proper device operation is achieved. 2. The AC characteristics assume tT=2 ns. 3. VIH(Min.) and VIL(Max.) are reference levels for measuring input timing signals. Transition time (tT) are measured bet/WEen VIH and VIL. 4. This parameter is measured with a load circuit equivalent to 2 TTL loads and 100 pF. 5. Operation within the tRCD (Max.) limit ensures that tRAC (Max.) can be met. tRCD (Max.) is specified as a reference point only . If tRCD is greater than the specified tRCD (Max.) limit, access time is controlled by tCAC. 6. Operation within the tRAD (Max.) limit ensures that tRAC (Max.) can be met. tRAD (Max.) is specified as a reference point only . If tRAD is greater than the specified tRAD (Max.) limit, access time is controlled by tAA. 7. tCEZ (Max.), tREZ (Max.), t/WEZ (Max.) and t/OEZ (Max.) define the time at which the output achieves the open circuit condition and are not referenced to output voltage levels. 8. tCEZ and tREZ must be satisfied for open circuit condition . 9. tRCH or tRRH must be satisfied for a read cycle. 10. tWCS, tCWD, tRWD, tAWD, and tCPWD are not restrictive operating parameters. They are included in the data tWCS(Min.), the cycle is an early write cycle and the sheet as electrical characteristics only . If tWCS¡Ù tCWD(Min.) , data out will remain open circuit (high impedance) throughout the entire cycle. If tCWD¡Ù ¡Ù ¡Ù ¡Ù tRWD tRWD(Min.) , tAWD tAWD(Min.) and tCPWD tCPWD(Min.), the cycle is a read modify write cycle and data out will contain data read from the selected cell; if neither of the above sets of conditions is satisfied, the condition of the data out (at access time) is indeterminate. 11. These parameters are referenced to /CAS leading edge in an early write cycle, and to /WE leading edge in an /OE control write cycle or a read modify write cycle . 12. The test mode is initiated by performing a /WE and /CAS before /RAS refresh cycle. This mode is latched and remains in effect until the exit cycle is generated. In a test mode CA0 and CA1 are not used and each DQ pin now accesses 8-bit locations .Since all 4 DQ pins are used, a total of 32 data bits can be written in parallel into the memory array. In a read cycle, if 8 data bits are equal the DQ pin will indicate a high level. If the 8 data bits are not equal, the DQ pin will indicate a low level. The test mode is cleared and the memory device returned to its normal operating state by performing a /RAS-only refresh cycle or a /CAS before /RAS refresh cycle. 13. In a test mode read cycle , the value of access time parameters is delayed for 5 ns for the specified value . These parameters should be specified in test mode cycle by adding the above value to the specified value in this data sheet. 11 NANYA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. © NANYA TECHNOLOGY CORP NT5117405J 4,194,304-word X 4-bit Dynamic RAM : Fast Page Mode with EDO 9.DRAM AC Timing Waveforms Read Cycle tRC tRP tRAS R A S VIH VIL tCRP tCSH tCRP tRCD C A S VIH tRSH tCAS VIL tRAD tRAL tASR VIH Address VIL tRAH tASC Row tCAH Column tRCH tRCS tRRH VIH W E VIL tAA tROH OE tREZ tOEA VIH VIL tCEZ tCAC tRAC D Q VIH Open VIL tOEZ Valid Data-out tCLZ "H" or "L" Write Cycle(Early Write) tRC tRP tRAS R A S VIH VIL tCRP tCSH tCRP tRCD C A S VIH tRSH tCAS VIL tRAD tRAL tASR VIH Address VIL tRAH tASC Row tCAH Column tCWL tWCS VIH tWCH tWP W E VIL tRWL OE VIH VIL tDS D Q VIH VIL tDH Open Valid data-in "H" or "L" 12 NANYA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. © NANYA TECHNOLOGY CORP NT5117405J 4,194,304-word X 4-bit Dynamic RAM : Fast Page Mode with EDO Read Modify Write Cycle tRWC tRP tRAS R A S VIH VIL tCRP tCSH tCRP tRCD C A S VIH tRSH tCAS VIL tASR Address VIH VIL tRAH tASC Row tCAH Column tCWD tRAD tCWL tRWD VIH W E VIL tAWD tRCS OE tRWL tWP tAA tOEA VIH VIL tOED tOEH tCAC tRAC DQ VIH VIL tOEZ tCLZ Valid Data-out tDS tDH Valid Data-in "H" or "L" 13 NANYA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. © NANYA TECHNOLOGY CORP NT5117405J 4,194,304-word X 4-bit Dynamic RAM : Fast Page Mode with EDO Fast Page Mode Read Cycle (Part-1) tRP tRASP R A S VIH tRHCP VIL tHPC tCRP tRCD C A S VIH VIL tCP tCP tCAS tRAD tCAS tCAS tCSH tASR Address VIH VIL WE VIH VIL tRAH tASC Row tCAH tASC Column tCAH tASC Column tCAH Column tRRH tRCS tOCH tCHO tRAC OE DQ tOEP tAA VIH VIL tOEP tAA tOEA tCPA tCAC VIH VIL tAA tOEA tCAC tOEZ tDOH Valid Data-out tCLZ tOEA tCAC tREZ tOEZ Valid Data-out Valid Data-out Valid Data-out "H" or "L" Fast Page Mode Read Cycle(Part-2) tRASP tRP R A S VIH tRHCP VIL tCRP tHPC tCRP CAS VIH VIL tRCD tCP tCP tCAS tCAS tCAS tRAD tCSH tASR Address VIH VIL WE VIH VIL tRAH tASC Row tCAH tASC Column tCAH Column tRCS tRCH tWPE tRAC OE tASC Column tRCS VIH VIL tCAH tAA tAA tAA tCPA tOEA tCAC D Q VIH VIL tCAC tCLZ tWEZ tCAC Valid Data-out tCEZ tDOH Valid Data-out Valid Data-out "H" or "L" 14 NANYA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. © NANYA TECHNOLOGY CORP NT5117405J 4,194,304-word X 4-bit Dynamic RAM : Fast Page Mode with EDO Fast page Mode Write Cycle(Early Write) tRASP RAS tRP VIH VIL tHPC tCRP tRCD C A S VIH VIL tHPC tCP tCP tCAS tRAD tCAS tCAS tRSH tCSH tASR Address VIH VIL tRAH tASC Row tCAH tASC Column tWCS VIH tCAH tASC Column tWCS tWCH tCAH Column tWCS tWCH tWCH W E VIL OE VIH VIL tDH tDS D Q VIH tDS Valid Data-in VIL tDH tDS Valid Data-in tDH Valid Data-in "H" or "L" Fast Page Mode Read Modify Write Cycle tRASP RAS VIH VIL CAS VIH VIL tRWD tCRP tCWD tRAD VIH Row tCPWD tHPRWC tASR tRAH tASC Address VIL tCP tRCD tCAH tASC tCWL Column tRWL tCPA tCAH Column tRCS tAWD tCWD tRCS VIH W E VIL tDS tRAC tAWD tWP tDS tAA OE VIH VIL VIL tOEH tOEH tOEA tCAC D Q VIH tWP tAA tCLZ tOEA tOEZ Valid Data-out tOED tOED tDH tCAC tOEZ Valid Data-out Valid Data-in tDH Valid Data-in tCLZ "H" or "L" 15 NANYA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. © NANYA TECHNOLOGY CORP NT5117405J 4,194,304-word X 4-bit Dynamic RAM : Fast Page Mode with EDO RAS-only Refresh Cycle RAS tRC tRP tRAS VIH VIL tRPC tCRP CAS VIH VIL Address VIH VIL DQ VIH VIL tASR tRAH Row tCEZ Open Note:WE,OE="H" or "L" CAS before RAS Refresh Cycle tRC tRAS tRP RAS VIH VIL tRP tRPC tCP CAS "H" or "L" tCSR tRPC tCHR VIH VIL tWRP tWRP tWRH W E VIH VIL tCEZ DQ VIH VIL Open Note:OE,Address="H" or "L" 16 NANYA TECHNOLOGY CORP. "H" or "L" reserves the right to change products and specifications without notice. © NANYA TECHNOLOGY CORP NT5117405J 4,194,304-word X 4-bit Dynamic RAM : Fast Page Mode with EDO Hidden Refresh Read Cycle tRC tRC tRAS RAS tCHR tRCD VIH VIL tRSH tRAD tASR Address tRP tRAS VIH VIL tCRP CAS tRP VIH VIL tRAH tASC Row tCAH Column tRCS tRAL VIH W E VIL tRRH tAA tROH OE tOEA VIH VIL tCAC tRAC D Q VIH tCEZ tCLZ Open VIL tREZ tOEZ Valid Data-out "H" or "L" Hidden Refresh Write Cycle tRC tRC tRAS RAS VIH VIL tRP tRSH tRAD tASR Address tRCD VIH VIL VIH VIL tRAS tCHR tCRP CAS tRP tRAL tRAH tASC Row tCAH Column tRWL tWCS VIH OE tWCH tWP W E VIL VIH VIL tDS D Q VIH VIL tDH Valid Data-in "H" or "L" 17 NANYA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. © NANYA TECHNOLOGY CORP NT5117405J 4,194,304-word X 4-bit Dynamic RAM : Fast Page Mode with EDO Test Mode Initiate Cycle tRC tRP tRAS R A S VIH VIL CAS VIH VIL tRPC tCP tCSR tWTS tCHR tWTH W E VIH VIL DQ VIH VIL tOFF Open Note:OE,Address="H" or "L" 18 "H" or "L" NANYA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. © NANYA TECHNOLOGY CORP