SSM95T07GP
N-CHANNEL ENHANCEMENT MODE
POWER MOSFET
PRODUCT SUMMARY
D
Simple Drive Requirement
Lower On-resistance
Fast Switching Characteristic
RoHS Compliant
BVDSS
75V
RDS(ON)
5mΩ
80A
ID
G
S
DESCRIPTION
The advanced power MOSFETs from Silicon Standard Corp.
provide the designer with the best combination of fast switching,
ruggedized device design, low on-resistance and cost-effectiveness.
G
D
The TO-220 package is universally preferred for all commercialindustrial power applications and suited for low voltage applications
such as DC/DC converters.
TO-220(P)
S
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Rating
Units
75
V
±20
V
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
ID@TC=25℃
Continuous Drain Current, VGS @ 10V
80
A
ID@TC=100℃
Continuous Drain Current, VGS @ 10V
70
A
320
A
300
W
2
W/℃
450
mJ
3
1
IDM
Pulsed Drain Current
PD@TC=25℃
Total Power Dissipation
Linear Derating Factor
4
EAS
Single Pulse Avalanche Energy
TSTG
Storage Temperature Range
-55 to 175
℃
TJ
Operating Junction Temperature Range
-55 to 175
℃
THERMAL DATA
Symbol
Parameter
Value
Units
Rthj-c
Thermal Resistance Junction-case
Max.
0.5
℃/W
Rthj-a
Thermal Resistance Junction-ambient
Max.
62
℃/W
07/11/2007 Rev.1.00
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1
SSM95T07GP
ELECTRICAL CHARACTERISTICS
o
(TJ=25 C unless otherwise specified)
Symbol
Parameter
Test Conditions
Typ.
Max. Units
75
-
-
V
BVDSS
Drain-Source Breakdown Voltage
ΔBVDSS/ΔTj
Breakdown Voltage Temperature Coefficient Reference to 25℃, ID=1mA
-
0.01
-
V/℃
RDS(ON)
Static Drain-Source On-Resistance2
VGS=10V, ID=60A
-
-
5
mΩ
VGS(th)
Gate Threshold Voltage
VDS=VGS, ID=250uA
2
-
4
V
gfs
Forward Transconductance
VDS=10V, ID=60A
-
57
-
S
IDSS
Drain-Source Leakage Current (T j=25oC)
VDS=75V, VGS=0V
-
-
10
uA
Drain-Source Leakage Current (T j=150oC)
VDS=60V ,VGS=0V
-
-
250
uA
IGSS
Gate-Source Leakage
2
VGS=0V, ID=1mA
Min.
VGS= ±20V
-
-
±100
nA
ID=80A
-
85
135
nC
Qg
Total Gate Charge
Qgs
Gate-Source Charge
VDS=40V
-
25
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=10V
-
36
-
nC
VDS=40V
-
22
-
ns
2
td(on)
Turn-on Delay Time
tr
Rise Time
ID=80A
-
160
-
ns
td(off)
Turn-off Delay Time
RG=3.3Ω,VGS=10V
-
38
-
ns
tf
Fall Time
RD=0.5Ω
-
165
-
ns
Ciss
Input Capacitance
VGS=0V
-
4290 6870
pF
Coss
Output Capacitance
VDS=25V
-
985
-
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
390
-
pF
Rg
Gate Resistance
f=1.0MHz
-
1.2
1.8
Ω
Min.
Typ.
IS=60A, VGS=0V
-
-
1.3
V
IS=40A, VGS=0V
-
75
-
ns
dI/dt=100A/µs
-
190
-
nC
SOURCE-DRAIN DIODE
Symbol
VSD
Parameter
Test Conditions
2
Forward On Voltage
2
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
Max. Units
Notes:
1.Pulse width limited by Max. junction temperature.
2.Pulse test
3.Package limitation current is 80A, calculated continuous current
based on maximum allowable junction temperature is 169A.
4.Starting Tj=25oC , L=1mH , IAS=30A.
THIS PRODUCT IS AN ELECTROSTATIC SENSITIVE, PLEASE HANDLE WITH CAUTION.
THIS PRODUCT HAS BEEN QUALIFIED FOR CONSUMER MARKET. APPLICATIONS OR USES AS CRITERIAL COMPONENT IN LIFE SUPPORT
DEVICE OR SYSTEM ARE NOT AUTHORIZED.
07/11/2007 Rev.1.00
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2
SSM95T07GP
250
120
10 V
9.0 V
8.0 V
7.0 V
ID , Drain Current (A)
200
10V
9.0V
8.0V
7.0V
V G = 6.0 V
o
T C = 1 75 C
100
ID , Drain Current (A)
o
T C = 25 C
150
100
V G = 6.0 V
80
60
40
50
20
0
0
0
1
2
3
0
4
1
2
3
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
12
2.4
I D =60A
V G =10V
I D =30A
o
T C =25 C
2.0
Normalized RDS(ON)
RDS(ON) (mΩ)
10
8
1.6
1.2
6
0.8
4
0.4
4
5
6
7
8
9
10
-50
0
50
100
150
200
T j , Junction Temperature ( o C)
V GS Gate-to-Source Voltage (V)
Fig 3. On-Resistance v.s. Gate Voltage
Fig 4. Normalized On-Resistance
v.s. Junction Temperature
60
1.4
50
1.2
T j =175 C
40
IS(A)
o
Normalized VGS(th) (V)
o
T j =25 C
30
20
1
0.8
0.6
10
0
0.4
0
0.2
0.4
0.6
0.8
1
1.2
1.4
-50
V SD , Source-to-Drain Voltage (V)
Fig 5. Forward Characteristic of
Reverse Diode
07/11/2007 Rev.1.00
0
50
100
150
200
T j ,Junction Temperature ( o C)
Fig 6. Gate Threshold Voltage v.s.
Junction Temperature
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3
SSM95T07GP
f=1.0MHz
10000
I D = 80 A
12
C iss
V DS = 40 V
V DS = 48 V
V DS = 64 V
10
8
C (pF)
VGS , Gate to Source Voltage (V)
14
6
1000
C oss
C rss
4
2
0
100
0
20
40
60
80
100
120
1
5
Q G , Total Gate Charge (nC)
9
13
17
21
25
29
V DS ,Drain-to-Source Voltage (V)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
1000
Normalized Thermal Response (Rthjc)
1
100us
ID (A)
100
1ms
10ms
10
100ms
DC
T c =25 o C
Single Pulse
1
Duty factor=0.5
0.2
0.1
0.1
0.05
PDM
0.02
t
0.01
T
Duty factor = t/T
Peak Tj = PDM x Rthjc + T C
Single Pulse
0.01
0.1
1
10
100
1000
0.00001
0.0001
V DS , Drain-to-Source Voltage (V)
0.001
0.01
0.1
1
t , Pulse Width (s)
Fig 9. Maximum Safe Operating Area
Fig 10. Effective Transient Thermal Impedance
VG
VDS
90%
QG
10V
QGS
QGD
10%
VGS
td(on) tr
td(off) tf
Charge
Fig 11. Switching Time Waveform
07/11/2007 Rev.1.00
Q
Fig 12. Gate Charge Waveform
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4
SSM95T07GP
Package Outline : TO-220
E1
A
E
Millimeters
SYMBOLS
φ
L2
L5
c1
D
L4
b1
L3
MIN
NOM
MAX
A
4.25
4.48
4.70
b
b1
c
c1
0.65
0.80
0.90
1.15
1.38
1.60
0.40
0.50
0.60
1.00
1.20
1.40
E
9.70
10.00
10.40
E1
---
---
11.50
e
----
2.54
----
L
12.70
13.60
14.50
L1
2.60
2.80
3.00
L2
1.00
1.40
1.80
L3
2.6
3.10
3.6
L4
14.70
15.50
16
L5
6.30
6.50
6.70
L1
L
c
b
φ
3.50
3.60
3.70
D
8.40
8.90
9.40
1.All Dimensions Are in Millimeters.
2.Dimension Does Not Include Mold Protrusions.
e
Part Marking Information & Packing : TO-220
Part Number
meet Rohs requirement
Package Code
XXXXXGP
LOGO
YWWSSS
Date Code (YWWSSS)
Y：Last Digit Of The Year
WW：Week
SSS：Sequence
07/11/2007 Rev.1.00
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5
SSM95T07GP
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, expressed or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
07/11/2007 Rev.1.00
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