SSC SSM9980GM

SSM9980M/GM
DUAL N-CHANNEL ENHANCEMENT-MODE POWER MOSFETS
Simple drive requirement
D2
D2
Lower gate charge
D1
D1
Fast switching characteristics
S1
80V
R DS(ON)
52mΩ
4.6A
ID
G2
S2
SO-8
BV DSS
G1
Description
D2
D1
Advanced Power MOSFETs from Silicon Standard provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and cost-effectiveness.
G2
G1
S1
The SSM9980M is in the SO-8 package, which is widely preferred for
commercial and industrial surface mount applications, and is well suited
for low voltage applications such as DC/DC converters.
S2
This device is available with Pb-free lead finish (second-level interconnect) as SSM9980GM.
Absolute Maximum Ratings
Symbol
Parameter
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
ID @ TA=25°C
ID @ TA=100°C
Rating
Units
80
V
± 20
V
3
4.6
A
3
2.9
A
Continuous Drain Current
Continuous Drain Current
1
IDM
Pulsed Drain Current
30
A
PD @ TA=25°C
Total Power Dissipation
2
W
Linear Derating Factor
0.016
W/°C
TSTG
Storage Temperature Range
-55 to 150
°C
TJ
Operating Junction Temperature Range
-55 to 150
°C
Thermal Data
Symbol
Rthj-a
12/10/2004 Rev.2.01
Parameter
Thermal Resistance Junction-ambient
3
Max.
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Value
Unit
62.5
°C/W
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SSM9980M/GM
Electrical Characteristics @ Tj=25oC (unless otherwise specified)
Symbol
Parameter
Test Conditions
Min.
Typ.
80
-
-
V
-
0.08
-
V/°C
VGS=10V, ID=4.6A
-
-
52
mΩ
VGS=4.5V, ID=3.6A
-
-
60
mΩ
Gate Threshold Voltage
VDS=VGS, ID=250uA
1
-
3
V
gfs
Forward Transconductance
VDS=10V, ID=4A
-
7
-
S
IDSS
Drain-Source Leakage Current (Tj=25oC)
VDS=80V, VGS=0V
-
-
1
uA
Drain-Source Leakage Current (Tj=70oC)
VDS=64V ,VGS=0V
-
-
25
uA
Gate-Source Leakage
VGS= ± 20V
-
±100
nA
BVDSS
Drain-Source Breakdown Voltage
∆ BV DSS/ ∆ Tj
Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA
RDS(ON)
VGS(th)
IGSS
Static Drain-Source On-Resistance
2
VGS=0V, ID=1mA
2
Max. Units
ID=4A
-
19
30
nC
Gate-Source Charge
VDS=64V
-
5
-
nC
Gate-Drain ("Miller") Charge
VGS=4.5V
-
10
-
nC
VDS=40V
-
11
-
ns
Qg
Total Gate Charge
Qgs
Qgd
2
td(on)
Turn-on Delay Time
tr
Rise Time
ID=1A
-
6
-
ns
td(off)
Turn-off Delay Time
RG=3.3Ω , VGS=10V
-
30
-
ns
tf
Fall Time
RD=40Ω
-
16
-
ns
Ciss
Input Capacitance
VGS=0V
-
1820 2910
pF
Coss
Output Capacitance
VDS=25V
-
130
-
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
94
-
pF
Min.
Typ.
IS=1.6A, VGS=0V
-
-
1.2
V
Source-Drain Diode
Symbol
VSD
Parameter
2
Forward On Voltage
2
Test Conditions
Max. Units
trr
Reverse Recovery Time
IS=4A, VGS=0V,
-
44
-
ns
Qrr
Reverse Recovery Charge
dI/dt=100A/µs
-
90
-
nC
Notes:
1.Pulse width limited by max. junction temperature.
2.Pulse width <300us , duty cycle <2%.
3.Surface mounted on 1 in2 copper pad of FR4 board ; 135°C/W when mounted on min. copper pad.
12/10/2004 Rev.2.01
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SSM9980M/GM
70
50
o
T A =25 C
10V
7.0V
5.0V
4.5V
50
40
30
20
V G =3.0V
10V
7.0V
5.0V
4.5V
T A =150 o C
40
ID , Drain Current (A)
ID , Drain Current (A)
60
30
20
V G =3.0V
10
10
0
0
0
2
4
6
8
10
12
0
2
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
6
8
10
12
Fig 2. Typical Output Characteristics
2.3
55
I D = 4.6 A
V G =10V
I D =3.6A
o
T A =25 C
1.8
Normalized RDS(ON)
RDS(ON) (mΩ )
4
V DS , Drain-to-Source Voltage (V)
50
45
1.3
0.8
40
0.3
2
4
6
8
10
12
-50
0
50
100
150
o
T j , Junction Temperature ( C)
V GS , Gate-to-Source Voltage (V)
Fig 3. On-Resistance vs. Gate Voltage
Fig 4. Normalized On-Resistance
vs. Junction Temperature
4
3
2.5
2
T j =150 o C
VGS(th) (V)
IS(A)
3
T j =25 o C
2
1.5
1
1
0.5
0
0
0.2
0.4
0.6
0.8
1
1.2
V SD , Source-to-Drain Voltage (V)
Fig.5 Forward Characteristic of
Reverse Diode
12/10/2004 Rev.2.01
1.4
-50
0
50
100
150
T j ,Junction Temperature ( o C)
Fig 6. Gate Threshold Voltage vs.
Junction Temperature
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SSM9980M/GM
f=1.0MHz
16
10000
VGS , Gate to Source Voltage (V)
I D =4A
V DS =64V
V DS =50V
V DS =40V
Ciss
1000
C (pF)
12
8
Coss
Crss
100
4
0
10
0
10
20
30
40
50
1
5
9
13
17
21
25
29
V DS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
100
1
Normalized Thermal Response (R thja)
Duty factor=0.5
10
ID (A)
1ms
1
10ms
100ms
0.1
o
T A =25 C
Single Pulse
1s
DC
0.01
0.2
0.1
0.1
0.05
PDM
t
0.02
T
0.01
0.01
Duty factor = t/T
Peak Tj = PDM x Rthja + Ta
Single Pulse
Rthja = 135°C/W
0.001
0.1
1
10
100
1000
0.0001
0.001
0.01
V DS , Drain-to-Source Voltage (V)
Fig 9. Maximum Safe Operating Area
0.1
1
10
100
1000
t , Pulse Width (s)
Fig 10. Effective Transient Thermal Impedance
VG
VDS
90%
QG
4.5V
QGS
QGD
10%
VGS
td(on) tr
td(off) tf
Fig 11. Switching Time Waveform
12/10/2004 Rev.2.01
Charge
Q
Fig 12. Gate Charge Waveform
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SSM9980M/GM
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responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
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without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
12/10/2004 Rev.2.01
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