SSC SSM95T06GS

SSM95T06GP,S
N-CHANNEL ENHANCEMENT-MODE POWER MOSFET
Low gate-charge
60V
BV DSS
D
Simple drive requirement
R DS(ON)
Fast switching
75A
ID
G
8.5mΩ
S
Description
G D
The SSM95T06S is in a TO-263 package, which is widely used for
commercial and industrial surface mount applications, and is well suited
for low voltage applications such as DC/DC converters. The through-hole
version, the SSM95T06P in TO-220, is available for low-footprint vertical
mounting. These devices are manufactured with an advanced process,
providing improved on-resistance and switching performance.
G
Pb-free lead finish (second-level interconnect)
D
S
TO-263 (S)
TO-220(P)
S
Absolute Maximum Ratings
Symbol
Parameter
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
3
Rating
Units
60
V
±20
V
ID @ TC=25°C
Continuous Drain Current, VGS @ 10V
75
A
ID @ TC=100°C
Continuous Drain Current, VGS @ 10V
66
A
260
A
138
W
1.11
W/°C
450
mJ
30
A
1
IDM
Pulsed Drain Current
PD @ TC=25°C
Total Power Dissipation
Linear Derating Factor
4
EAS
Single Pulse Avalanche Energy
IAR
Avalanche Current
TSTG
Storage Temperature Range
-55 to 150
°C
TJ
Operating Junction Temperature Range
-55 to 150
°C
Thermal Data
Symbol
Parameter
Value
Units
Rthj-c
Thermal Resistance Junction-case
Max.
0.9
°C/W
Rthj-a
Thermal Resistance Junction-ambient
Max.
62
°C/W
2/16/2005 Rev.1.10
www.SiliconStandard.com
1 of 5
SSM95T06GP,S
Electrical Characteristics @ T j=25oC (unless otherwise specified)
Symbol
Parameter
Test Conditions
Typ.
60
-
BVDSS
Drain-Source Breakdown Voltage
∆ BV DSS/∆ Tj
Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA
-
RDS(ON)
Static Drain-Source On-Resistance2
VGS=10V, ID=45A
-
VGS=4.5V, ID=20A
V
-
V/°C
-
8.5
mΩ
-
-
12
mΩ
VDS=VGS, ID=250uA
1
-
3
V
VDS=10V, ID=45A
-
72
-
S
VDS=60V, VGS=0V
-
-
10
uA
Drain-Source Leakage Current (T j=150 C)
VDS=48V ,VGS=0V
-
-
100
uA
Gate-Source Leakage
VGS= ±20V
-
-
±100
nA
ID=45A
-
72
115
nC
Gate Threshold Voltage
gfs
Forward Transconductance
o
IDSS
Drain-Source Leakage Current (T j=25 C)
o
IGSS
Max. Units
-
VGS(th)
2
VGS=0V, ID=1mA
Min.
0.05
Qg
Total Gate Charge
Qgs
Gate-Source Charge
VDS=48V
-
16
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=4.5V
-
53
-
nC
VDS=30V
-
20
-
ns
2
td(on)
Turn-on Delay Time
tr
Rise Time
ID=45A
-
76
-
ns
td(off)
Turn-off Delay Time
RG=3.3Ω , VGS=10V
-
67
-
ns
tf
Fall Time
RD=0.67Ω
-
109
-
ns
Ciss
Input Capacitance
VGS=0V
-
5700 9200
pF
Coss
Output Capacitance
VDS=25V
-
900
-
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
560
-
pF
Rg
Gate Resistance
f=1.0MHz
-
1.1
1.7
Ω
Min.
Typ.
IS=45A, VGS=0V
-
-
1.3
V
IS=20A, VGS=0V
-
40
-
ns
dI/dt=100A/µs
-
60
-
nC
Source-Drain Diode
Symbol
VSD
Parameter
2
Forward On Voltage
2
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
Test Conditions
Max. Units
Notes:
1.Pulse width limited by safe operating area.
2.Pulse width <300us , duty cycle <2%.
3.The maximum current is limited by the package to 75A .
4.Starting Tj=25oC , VDD=30V , L=1mH , RG=25Ω , IAS=30A.
2/16/2005 Rev.1.10
www.SiliconStandard.com
2 of 5
SSM95T06GP,S
120
250
10V
7.0 V
T C = 25 o C
10V
7.0 V
5.0V
4.5V
o
T C = 150 C
5.0V
ID , Drain Current (A)
ID , Drain Current (A)
200
150
4.5V
100
80
40
V G =3.0V
50
V G =3.0V
0
0
0
3
6
9
0
12
Fig 1. Typical Output Characteristics
6
9
12
Fig 2. Typical Output Characteristics
11
1.6
I D =45A
V G =10V
I D =20A
o
T C =25 C
Normalized R DS(ON)
10
RDS(ON) (mΩ )
3
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
9
1.2
0.8
8
7
0.4
2
4
6
8
10
-50
0
50
100
150
o
V GS Gate-to-Source Voltage (V)
T j , Junction Temperature ( C)
Fig 3. On-Resistance vs. Gate Voltage
Fig 4. Normalized On-Resistance
vs. Junction Temperature
2.0
50
Normalized VGS(th) (V)
IS(A)
40
30
T j =150 o C
T j =25 o C
20
1.5
1.0
0.5
10
0.0
0
0
0.2
0.4
0.6
0.8
1
1.2
1.4
-50
0
V SD , Source-to-Drain Voltage (V)
Fig 5. Forward Characteristic of
Reverse Diode
2/16/2005 Rev.1.10
50
100
150
o
T j , Junction Temperature ( C)
Fig 6. Gate Threshold Voltage vs.
Junction Temperature
www.SiliconStandard.com
3 of 5
SSM95T06GP,S
f=1.0MHz
10000
I D = 45 A
C iss
10
V DS = 30 V
V DS = 38 V
V DS = 48 V
8
C (pF)
VGS , Gate to Source Voltage (V)
12
6
1000
C oss
C rss
4
2
100
0
0
20
40
60
80
100
1
120
5
Q G , Total Gate Charge (nC)
9
13
17
21
25
29
V DS ,Drain-to-Source Voltage (V)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
1
Normalized Thermal Response (Rthjc)
1000
ID (A)
100
100us
1ms
10
10ms
T c =25 o C
Single Pulse
100ms
DC
1
Duty factor=0.5
0.2
0.1
0.1
0.05
PDM
0.02
t
0.01
T
Duty factor = t/T
Peak Tj = PDM x Rthjc + TC
Single Pulse
0.01
0.1
1
10
100
1000
0.00001
0.0001
V DS , Drain-to-Source Voltage (V)
0.001
0.01
0.1
1
t , Pulse Width (s)
Fig 9. Maximum Safe Operating Area
Fig 10. Effective Transient Thermal Impedance
130
VG
V DS =5V
T j =25 o C
ID , Drain Current (A)
104
T j =150 o C
QG
4.5V
78
QGS
QGD
52
26
Charge
Q
0
0
2
4
6
V GS , Gate-to-Source Voltage (V)
Fig 11. Transfer Characteristics
2/16/2005 Rev.1.10
Fig 12. Gate Charge Waveform
www.SiliconStandard.com
4 of 5
SSM95T06GP,S
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
2/16/2005 Rev.1.10
www.SiliconStandard.com
5 of 5