DATA SHEET MOS INTEGRATED CIRCUIT μ PD121WxxA Series HIGH CURRENT 1.5 A GENERAL-PURPOSE CMOS REGULATOR DESCRIPTION The μ PD121WxxA series is general-purpose CMOS regulators which have 1.5 A output current capacity. These products are suitable for power supply of large-scale ASICs etc. By ON/OFF function, the power consumption can be kept low level at the time of off-state. This series of regulator has 3 fixed output voltage type 1.8 V, 2.5 V, 3.3 V, and adjustable output voltage type (1.8 to 3.3 V). FEATURES • Output Current: 1.5 A • Output Voltage: 1.8 V, 2.5 V, 3.3 V (Fixed type) / 1.8 to 3.3 V (Adjustable type) • Output Voltage Tolerance: VO ± 2.0% (TJ = 25°C) • Dropout Voltage: VDIF = 1.0 V MAX. (IO = 1.5 A) • Quiescent Current: 150 μ A TYP. (IO = 0 A) • Standby Current: 1 μ A • Available for laminated ceramic capacitor: (Electric capacity 10 μ F or higher) • On-chip over-current protection circuit • On-chip thermal shut down circuit APPLICATIONS These regulators are suitable for large-scale ASICs which are used in digital appliances etc. PIN CONFIGURATION (Marking Side) 5-PIN TO-252 (5-PIN MP-3ZK) 6 1. INPUT 2. ON/OFF 3. GND 1 2 3 4 5 Note 4. NC / ADJ 5. OUTPUT 6. GND (Fin) Note No.3 pin is cut and can not be connected to substrate. No.6 is Fin and common to GND pin. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. G18852EJ1V0DS00 (1st edition) Date Published July 2007 NS Printed in Japan 2007 μ PD121WxxA Series BLOCK DIAGRAM μ PD121W18A, μ PD121W25A, μ PD121W33A VIN ON/OFF − Buffer + Constant Current ON/OFF Over-current protection − Error amp. + Reference voltage VOUT Thermal shut down Triming GND μ PD121W00A VIN ON/OFF − Buffer + Constant Current ON/OFF Over-current protection − Error amp. + Reference voltage VOUT ADJ Thermal shut down Triming GND 2 Data Sheet G18852EJ1V0DS μ PD121WxxA Series ORDERING INFORMATION Part Number Package Output Voltage Type Marking μ PD121W18AT1F 5-PIN TO-252 (5-PIN MP-3ZK) 1.8 V Fixed 121W18 μ PD121W25AT1F 5-PIN TO-252 (5-PIN MP-3ZK) 2.5 V Fixed 121W25 μ PD121W33AT1F 5-PIN TO-252 (5-PIN MP-3ZK) 3.3 V Fixed 121W33 μ PD121W00AT1F 5-PIN TO-252 (5-PIN MP-3ZK) 1.8 to 3.3 V Adjustable 121W00 Remark Since it is the tape-packaged product, “-E1” or “-E2” is added to the end of its product name. Part Number μ PD121W18AT1F-E1-AT Package Note 5-PIN TO-252 (5-PIN MP-3ZK) Package Type • 16 mm wide embossed taping • Pin 1 on draw-out side • 2,500 pcs/reel μ PD121W18AT1F-E2-AT Note 5-PIN TO-252 (5-PIN MP-3ZK) • 16 mm wide embossed taping • Pin 1 at take-up side • 2,500 pcs/reel μ PD121W25AT1F-E1-AT Note 5-PIN TO-252 (5-PIN MP-3ZK) • 16 mm wide embossed taping • Pin 1 on draw-out side • 2,500 pcs/reel μ PD121W25AT1F-E2-AT Note 5-PIN TO-252 (5-PIN MP-3ZK) • 16 mm wide embossed taping • Pin 1 at take-up side • 2,500 pcs/reel μ PD121W33AT1F-E1-AT Note 5-PIN TO-252 (5-PIN MP-3ZK) • 16 mm wide embossed taping • Pin 1 on draw-out side • 2,500 pcs/reel μ PD121W33AT1F-E2-AT Note 5-PIN TO-252 (5-PIN MP-3ZK) • 16 mm wide embossed taping • Pin 1 at take-up side • 2,500 pcs/reel μ PD121W00AT1F-E1-AT Note 5-PIN TO-252 (5-PIN MP-3ZK) • 16 mm wide embossed taping • Pin 1 on draw-out side • 2,500 pcs/reel μ PD121W00AT1F-E2-AT Note 5-PIN TO-252 (5-PIN MP-3ZK) • 16 mm wide embossed taping • Pin 1 at take-up side • 2,500 pcs/reel Note Pb-free (This product does not contain Pb in the external electrode and other parts.) Data Sheet G18852EJ1V0DS 3 μ PD121WxxA Series ABSOLUTE MAXIMUM RATINGS (TA = 25°C, unless otherwise specified) Parameter Symbol Input Voltage VIN ON/OFF Pin Voltage VON/OFF Internal Power Dissipation (TC = 25°C) Note Rating Unit −0.3 to +6.0 V −0.3 to VIN V PT 10 W Operating Ambient Temperature TA −40 to +85 °C Operating Junction Temperature TJ −40 to +150 °C Storage Temperature Tstg −55 to +150 °C Thermal Resistance (junction to ambient) Rth(J-A) 125 °C/W Thermal Resistance (junction to case) Rth(J-C) 12.5 °C/W Note Internally limited. When the operating junction temperature rises above 150°C, the internal circuit shuts down the output voltage. Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any parameter. That is, the absolute maximum ratings are rated values at which the product is on the verge of suffering physical damage, and therefore the product must be used under conditions that ensure that the absolute maximum ratings are not exceeded. TYPICAL CONNECTION μ PD121W18A, μ PD121W25A, μ PD121W33A ON/OFF D1 INPUT OUTPUT OUTPUT μ PD121W18A, 25A, 33A INPUT CIN COUT GND D2 GND μ PD121W00A ON/OFF D1 INPUT INPUT μ PD121W00A OUTPUT OUTPUT R1 GND D2 ADJ COUT CIN GND 4 Data Sheet G18852EJ1V0DS R2 μ PD121WxxA Series CIN : 0.1 μ F or higher. Be sure to connect CIN to prevent parasitic oscillation. Set this value according to the length of the line between the regulator and the INPUT pin. Use of a film capacitor or other capacitor with first-rate voltage and temperature characteristics is recommended. If using a laminated ceramic capacitor, it is necessary to ensure that CIN is 0.1 μ F or higher for the voltage and temperature range to be used. COUT : 10 μ F or higher. Be sure to connect COUT to prevent oscillation and improve excessive load regulation. Place CIN and COUT as close as possible to the IC pins (within 1 to 2 cm). Also, in case of using a laminated ceramic capacitor, please note following items. • It is necessary to ensure that COUT is 10 μ F or higher for the voltage and temperature range to be used. • In case of using laminated ceramic capacitor, it is easy to become state of parasitic oscillation. Because ESR of laminated ceramic capacitor is very low. Therefore, the capacitor and load condition (output current) which fulfill the condition of the stable operation area of ESR shown below are recommended. • Stable Operation Area as below is regulated under condition of which this product is not on a substrate. Therefore impedance on substrate is not considered. D1 : If the OUTPUT pin has a higher voltage than the INPUT pin, connect a diode. D2 : If the OUTPUT pin has a lower voltage than the GND pin, connect a Schottky barrier diode. R1, R2: The total amount of R1 and R2 is sure to below 500 kΩ (375 kΩ TYP.). R2 = 100 kΩ is recommended. VOUT = (1 + R1/R2) VADJ Note Note When VOUT = 3.0 V: R1 = 275 kΩ, R2 = 100 kΩ Caution Make sure that no external voltage is applied to the OUTPUT pin. μ PD121WxxA Series COUT ESR Stable Operation Area Unstable Operation Area 10 Stable Operation Area ESR (Ω) 1 0.1 Unstable Operation Area 0.01 0 150 300 450 600 750 900 1050 1200 1350 1500 IO (mA) Data Sheet G18852EJ1V0DS 5 μ PD121WxxA Series RECOMMENDED OPERATING CONDITIONS Parameter Symbol Input Voltage VIN Type Number MIN. TYP. MAX. Unit μ PD121W18A 2.8 5.5 V μ PD121W25A 3.5 5.5 V μ PD121W33A 4.3 5.5 V μ PD121W00A VO + 1 5.5 V 1.8 3.3 V Output Voltage VO μ PD121W00A ON/OFF Pin Voltage VON/OFF All 0 VIN V Output Current IO All 0 1.5 A Operating Ambient Temperature TA All − 40 + 85 °C Operating Junction Temperature TJ All − 40 + 125 °C Caution1. Turn on VIN and VON/OFF at the same time, or turn on VIN first and then VON/OFF. Turn off VIN and VON/OFF at the same time, or turn off VON/OFF first and then VIN. 2. If absolute maximum rating is not exceeded, you can used this product above the recommended operating range. However, since a margin with absolute maximum rating decreases, please use this product after sufficient evaluation. ELECTRICAL CHARACTERISTICS μ PD121W18A (TJ = 25°C, VIN = VON/OFF = 2.8 V, IO = 1.0 A, CIN = 0.1 μ F, COUT = 10 μ F, unless otherwise specified) Parameter Output Voltage Symbol Conditions MIN. TYP. MAX. Unit − 1.764 1.8 1.836 V (1.746) − (1.854) V VO1 VO2 2.8 V ≤ VIN ≤ 5.5 V, 0 A ≤ IO ≤ 1.5 A Line Regulation REGIN 2.8 V ≤ VIN ≤ 5.5 V − 1 18 mV Load Regulation REGL 0 A ≤ IO ≤ 1.5 A − 1 18 mV Quiescent Current IBIAS1 IO = 0 A − 150 300 μA IBIAS2 IO = 1.5 A − (2500) (5000) μA ΔIBIAS1 2.8 V ≤ VIN ≤ 5.5 V − (100) (300) μA ΔIBIAS2 0 A ≤ IO ≤ 1.5 A − (2350) (5000) μA Output Noise Voltage Vn 10 Hz ≤ f ≤ 100 kHz − 160 − μ Vr.m.s. Ripple Rejection R•R f = 1 kHz, 2.8 V ≤ VIN ≤ 3.8 V − 65 − dB Dropout Voltage VDIF IO = 1.5 A − 0.6 1.0 V Short Circuit Current IOshort − − 1.0 − A Peak Output Current IOpeak − 1.5 − − A Temperature Coefficient of ΔVO/ΔT IO = 5 mA, 0°C ≤ TJ ≤ 125°C − 0.01 − mV/°C ON-state Voltage VON IO = 0 A 1.5 − VIN V OFF-state Voltage VOFF IO = 0 A − − 0.5 V ON-state ON/OFF Pin Current ION IO = 0 A − − 2 μA Standby Current IBIAS(OFF) VON/OFF = 0 V − − 1 μA Quiescent Current Change Output Voltage Remark Values in parentheses are product design values, and are thus provided as reference values. 6 Data Sheet G18852EJ1V0DS μ PD121WxxA Series μ PD121W25A (TJ = 25°C, VIN = VON/OFF = 3.5 V, IO = 1.0 A, CIN = 0.1 μ F, COUT = 10 μ F, unless otherwise specified) Parameter Output Voltage Symbol Conditions − VO1 MIN. TYP. MAX. Unit 2.45 2.5 2.55 V (2.425) − (2.575) V 3.5 V ≤ VIN ≤ 5.5 V − 1 25 mV REGL 0 A ≤ IO ≤ 1.5 A − 1 25 mV IBIAS1 IO = 0 A − 150 300 μA IBIAS2 IO = 1.5 A − (2500) (5000) μA ΔIBIAS1 3.5 V ≤ VIN ≤ 5.5 V − (100) (300) μA ΔIBIAS2 0 A ≤ IO ≤ 1.5 A − (2350) (5000) μA Output Noise Voltage Vn 10 Hz ≤ f ≤ 100 kHz − 230 − μ Vr.m.s. Ripple Rejection R•R f = 1 kHz, 3.5 V ≤ VIN ≤ 4.5 V − 60 − dB Dropout Voltage VDIF IO = 1.5 A − 0.7 1.0 V Short Circuit Current IOshort − − 1.0 − A − 1.5 − − A − −0.07 − mV/°C VO2 3.5 V ≤ VIN ≤ 5.5 V, 0 A ≤ IO ≤ 1.5 A Line Regulation REGIN Load Regulation Quiescent Current Quiescent Current Change Peak Output Current IOpeak Temperature Coefficient of ΔVO/ΔT IO = 5 mA, 0°C ≤ TJ ≤ 125°C ON-state Voltage VON IO = 0 A 1.5 − VIN V OFF-state Voltage VOFF IO = 0 A − − 0.5 V Output Voltage ON-state ON/OFF Pin Current ION IO = 0 A − − 2 μA Standby Current IBIAS(OFF) VON/OFF = 0 V − − 1 μA Remark Values in parentheses are product design values, and are thus provided as reference values. Data Sheet G18852EJ1V0DS 7 μ PD121WxxA Series μ PD121W33A (TJ = 25°C, VIN = VON/OFF = 5.0 V, IO = 1.0 A, CIN = 0.1 μ F, COUT = 10 μ F, unless otherwise specified) Parameter Output Voltage Symbol Conditions − VO1 MIN. TYP. MAX. Unit 3.234 3.3 3.366 V (3.201) − (3.399) V 4.3 V ≤ VIN ≤ 5.5 V − 1 33 mV REGL 0 A ≤ IO ≤ 1.5 A − 1 33 mV IBIAS1 IO = 0 A − 150 300 μA IBIAS2 IO = 1.5 A − (2500) (5000) μA ΔIBIAS1 4.3 V ≤ VIN ≤ 5.5 V − (100) (300) μA ΔIBIAS2 0 A ≤ IO ≤ 1.5 A − (2350) (5000) μA Output Noise Voltage Vn 10 Hz ≤ f ≤ 100 kHz − 340 − μ Vr.m.s. Ripple Rejection R•R f = 1 kHz, 4.3 V ≤ VIN ≤ 5.3 V − 60 − dB Dropout Voltage VDIF IO = 1.5 A − 0.6 1.0 V Short Circuit Current IOshort − − 1.0 − A − 1.5 − − A − −0.1 − mV/°C VO2 4.3 V ≤ VIN ≤ 5.5 V, 0 A ≤ IO ≤ 1.5 A Line Regulation REGIN Load Regulation Quiescent Current Quiescent Current Change Peak Output Current IOpeak Temperature Coefficient of ΔVO/ΔT IO = 5 mA, 0°C ≤ TJ ≤ 125°C ON-state Voltage VON IO = 0 A 1.5 − VIN V OFF-state Voltage VOFF IO = 0 A − − 0.5 V Output Voltage ON-state ON/OFF Pin Current ION IO = 0 A − − 2 μA Standby Current IBIAS(OFF) VON/OFF = 0 V − − 1 μA Remark Values in parentheses are product design values, and are thus provided as reference values. 8 Data Sheet G18852EJ1V0DS μ PD121WxxA Series μ PD121W00A (TJ = 25°C, VIN = VON/OFF = 5.0 V, IO = 1.0 A, VO = 3.0 V, CIN = 0.1 μ F, COUT = 10 μ F, unless otherwise specified) Parameter Reference Voltage Line Regulation Symbol Conditions − VADJ1 VADJ2 2.8 V ≤ VIN ≤ 5.5 V, 0 A ≤ IO ≤ 1.5 A REGIN VO + 1 V ≤ VIN ≤ 5.5 V MIN. −2% Note (−3%) Note − TYP. MAX. Note Unit 0.8 +2% − (+3%) 1 1% Note mV 1% Note mV Note V V Load Regulation REGL 0 A ≤ IO ≤ 1.5 A − 1 Quiescent Current IBIAS1 IO = 0 A − 150 300 μA IBIAS2 IO = 1.5 A − (2500) (5000) μA ΔIBIAS1 VO + 1 V ≤ VIN ≤ 5.5 V − (100) (300) μA ΔIBIAS2 0 A ≤ IO ≤ 1.5 A − (2350) (5000) μA Output Noise Voltage Vn 10 Hz ≤ f ≤ 100 kHz − 220 − μ Vr.m.s. Ripple Rejection R•R f = 1 kHz, VO + 1 V ≤ VIN ≤ VO + 2 V − 70 − dB Dropout Voltage VDIF IO = 1.5 A − 0.6 1.0 V Short Circuit Current IOshort − − 1.0 − A − 1.5 − − A − −0.12 − mV/°C Quiescent Current Change Peak Output Current IOpeak Temperature Coefficient of ΔVO/ΔT IO = 5 mA, 0°C ≤ TJ ≤ 125°C ON-state Voltage VON IO = 0 A 1.5 − VIN V OFF-state Voltage VOFF IO = 0 A − − 0.5 V Output Voltage ON-state ON/OFF Pin Current ION IO = 0 A − − 2 μA Standby Current IBIAS(OFF) VON/OFF = 0 V − − 1 μA Note This is the percentage to the output voltage (VO: the unit is V). Remark Values in parentheses are product design values, and are thus provided as reference values. Data Sheet G18852EJ1V0DS 9 μ PD121WxxA Series TYPICAL CHARACTERISTICS Δ VO vs.TJ PD vs. TA 10.0 Δ VO - Output Voltage Temperature 15 nfin ite hea tsin k 5 Without heatsink 1.0 0 50 0 85 100 VIN = VON/OFF = 2.8 V 0 3.5 -5.0 μ PD121W18A μ PD121W25A μ PD121W33A Note μ PD121W00A -10.0 -40 TA - Operating Ambient Temperature - °C 3000 VO 1.0 2000 0.9 A IO = 0.9 A 0.5 A 0.5 A 0A 1000 0 A IBIAS 0 2.0 3.0 4.0 5.0 2.0 0.9 A 0.5 A 1.0 0A 1.0 1.0 1000 0.5 A 0A IBIAS 0 4.0 3.0 4.0 5.0 6.0 5.0 4.0 5000 TJ = 25°C VO = 3.0 V VO - Output Voltage - V 3000 2000 3.0 2.0 VO vs. VIN, IBIAS vs. VIN (μ PD121W00A) IO = 0.9 A 2.0 1000 IBIAS 0 0 IBIAS - Quiescent Current - μ A VO 0A 0.5 A 0.5 0A 4000 3.0 0.5 A 2000 IO = 0.9 A 0 5000 0.9 A 3000 VO 1.5 0 6.0 TJ = 25°C VO - Output Voltage - V 110 125 VIN - Input Voltage - V 4.0 4000 3.0 0.9 A VO 0A IO = 0.9 A 0A 1000 IBIAS 0 0 0 1.0 2.0 3.0 4.0 VIN - Input Voltage - V Data Sheet G18852EJ1V0DS 2000 0.5 A 1.0 0 6.0 3000 0.5 A 2.0 VIN - Input Voltage - V 10 85 4000 VO vs. VIN, IBIAS vs. VIN (μ PD121W33A) 1.0 60 5000 VIN - Input Voltage - V 0 35 2.5 VO - Output Voltage - V 1.5 IBIAS - Quiescent Current - μ A VO - Output Voltage - V 4000 2.0 10 TJ = 25°C 2.0 1.0 -15 3.0 5000 0 V VO vs. VIN, IBIAS vs. VIN (μ PD121W25A) TJ = 25°C 0.5 5.0 TJ - Operating Junction Temperature - °C VO vs. VIN, IBIAS vs. VIN ( μ PD121W18A) 2.5 V Note VO = 3.0 V -15.0 150 V 5.0 IBIAS - Quiescent Current - μ A th i 10 IO = 5 mA 5.0 5.0 6.0 IBIAS - Quiescent Current - μ A Wi Change - mV PD - Power Dissipation - W 20 μ PD121WxxA Series IOpeak vs. VDIF VDIF vs. IO 1.2 TJ = 25°C 2.5 2.0 1.5 μ PD121W18A μ PD121W25A μ PD121W33A Note μ PD121W00A 1.0 0.5 VDIF - Dropout Voltage - V IOpeak - Peak Output Current - A 3.0 0 1.0 2.0 3.0 4.0 0.8 0.6 0.4 0.2 0 0 5.0 0.25 0.5 1.0 1.25 IO - Output Current - A R • R vs. f ( μ PD121W18A) R • R vs. f (μ PD121W25A) 1.5 80 70 R • R - Ripple Rejection - dB IO = 5 mA 60 0.5 A 1.0 A 50 40 TJ = 25°C VIN = 2.8 to 3.8 V VON/OFF = 1.5 V CIN = 0.1 μ F COUT = 10 μ F 30 20 10 IO = 5 mA 0.5 A 70 60 50 40 30 20 10 0 TJ = 25°C VIN = 3.5 to 4.5 V VON/OFF = 1.5 V CIN = 0.1 μ F COUT = 10 μ F 1.0 A 0 10 100 1k 10 k 10 100 k 100 f - Frequency - Hz 80 R • R - Ripple Rejection - dB IO = 5 mA 60 0.5 A 1.0 A 50 40 TJ = 25°C VIN = 4.3 to 5.3 V VON/OFF = 1.5 V CIN = 0.1 μ F COUT = 10 μ F 30 20 10 10 k 100 k R • R vs. f (μ PD121W00A) 80 70 1k f - Frequency - Hz R • R vs. f (μ PD121W33A) R • R - Ripple Rejection - dB 0.75 VDIF - Dropout Voltage - V 80 R • R - Ripple Rejection - dB μ PD121W18A μ PD121W25A μ PD121W33A 1.0 Note VO = 3.0 V 0 TJ = 25°C IO = 5 mA 70 0.5 A 1.0 A 60 50 40 TJ = 25°C VO = 3.0 V VIN = 4.0 to 5.0 V VON/OFF = 1.5 V CIN = 0.1 μ F COUT = 10 μ F 30 20 10 0 0 10 100 1k 10 k 100 k 10 100 1k 10 k 100 k f - Frequency - Hz f - Frequency - Hz Data Sheet G18852EJ1V0DS 11 μ PD121WxxA Series VO vs. IO ( μ PD121W25A) VO vs. IO ( μ PD121W18A) 4.0 3.0 2.5 2.0 1.5 1.0 3.0 2.5 2.0 1.5 1.0 0.5 0.5 0 0 0 0.5 1.0 1.5 2.0 2.5 VO vs. IO ( μ PD121W33A) 4.0 TJ = 25°C VIN = VON/OFF = 5.0 V VO - Output Voltage - V 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 0.5 1.0 1.5 0 0.5 1.0 1.5 IO - Output Current - A IO - Output Current - A 2.0 2.5 IO - Output Current - A 12 TJ = 25°C VIN = VON/OFF = 3.5 V 3.5 VO - Output Voltage - V 3.5 VO - Output Voltage - V 4.0 TJ = 25°C VIN = VON/OFF = 2.8 V Data Sheet G18852EJ1V0DS 2.0 2.5 μ PD121WxxA Series PACKAGE DRAWING (Unit: mm) 5-PIN TO-252 (MP-3ZK) E A b1 E1 c1 L1 6 D1 D H 1 2 3 4 5 A1 L2 c x4 e b L GAUGE PLANE SEATING PLANE c2 (UNIT:mm) ITEM D D1 E E1 H NOTE 1. No Plating area DIMENSIONS 6.10 ±0.20 4.4TYP(4.0MIN) 6.50±0.20 4.4TYP(4.3MIN) 9.8TYP(10.3MAX) A 2.30±0.10 A1 0 to 0.25 b 0.60±0.10 b1 5.0 c 0.50±0.10 c1 0.50±0.10 c2 0.508 e 1.14 L 1.52±0.12 L1 1.0 L2 0.80 P5T1F-114-1 2006 Data Sheet G18852EJ1V0DS 13 μ PD121WxxA Series RECOMMENDED MOUNTING CONDITIONS The μ PD121WxxA Series should be soldered and mounted under the following recommended conditions. For soldering methods and conditions other than those recommended below, contact an NEC Electronics sales representative. For technical information, see the following website. Semiconductor Device Mount Manual (http://www.necel.com/pkg/en/mount/index.html) Note Note μ PD121W18AT1F-AT , μ PD121W25AT1F-AT , Note μ PD121W33AT1F-AT , μ PD121W00AT1F-AT Note: 5-PIN TO-252 (5-PIN MP-3ZK) Process Infrared reflow Conditions Symbol Package peak temperature: 260°C, Time: 60 seconds MAX. (at 220°C or higher), IR60-00-3 Count: Three times, Flux: Rosin flux with low chlorine (0.2 Wt% or below) recommended. Partial Heating Method Pin temperature: 350°C or below, P350 Heat time: 3 seconds or less (per each side of the device). Note Pb-free (This product does not contain Pb in the external electrode and other parts.) Caution Apply only one kind of soldering condition to a device, except for "partial heating method", or the device will be damaged by heat stress. REFERENCE DOCUMENTS USER’S MANUAL USAGE OF THREE TERMINAL REGULATORS Document No.G12702E INFORMATION VOLTAGE REGULATOR OF SMD Document No.G11872E SEMICONDUCTOR DEVICE MOUNT MANUAL http://www.necel.com/pkg/en/mount/index.html 14 Data Sheet G18852EJ1V0DS μ PD121WxxA Series NOTES FOR CMOS DEVICES 1 VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between VIL (MAX) and VIH (MIN) due to noise, etc., the device may malfunction. Take care to prevent chattering noise from entering the device when the input level is fixed, and also in the transition period when the input level passes through the area between VIL (MAX) and VIH (MIN). 2 HANDLING OF UNUSED INPUT PINS Unconnected CMOS device inputs can be cause of malfunction. If an input pin is unconnected, it is possible that an internal input level may be generated due to noise, etc., causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND via a resistor if there is a possibility that it will be an output pin. All handling related to unused pins must be judged separately for each device and according to related specifications governing the device. 3 PRECAUTION AGAINST ESD A strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it when it has occurred. Environmental control must be adequate. When it is dry, a humidifier should be used. It is recommended to avoid using insulators that easily build up static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work benches and floors should be grounded. The operator should be grounded using a wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with mounted semiconductor devices. 4 STATUS BEFORE INITIALIZATION Power-on does not necessarily define the initial status of a MOS device. Immediately after the power source is turned ON, devices with reset functions have not yet been initialized. Hence, power-on does not guarantee output pin levels, I/O settings or contents of registers. A device is not initialized until the reset signal is received. A reset operation must be executed immediately after power-on for devices with reset functions. 5 POWER ON/OFF SEQUENCE In the case of a device that uses different power supplies for the internal operation and external interface, as a rule, switch on the external power supply after switching on the internal power supply. When switching the power supply off, as a rule, switch off the external power supply and then the internal power supply. Use of the reverse power on/off sequences may result in the application of an overvoltage to the internal elements of the device, causing malfunction and degradation of internal elements due to the passage of an abnormal current. The correct power on/off sequence must be judged separately for each device and according to related specifications governing the device. 6 INPUT OF SIGNAL DURING POWER OFF STATE Do not input signals or an I/O pull-up power supply while the device is not powered. The current injection that results from input of such a signal or I/O pull-up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal elements. Input of signals during the power off state must be judged separately for each device and according to related specifications governing the device. Data Sheet G18852EJ1V0DS 15 μ PD121WxxA Series • The information in this document is current as of July, 2007. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. • No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may appear in this document. • NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC Electronics products listed in this document or any other liability arising from the use of such products. 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(2) "NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as defined above). M8E 02. 11-1