UTRON UT62W256C 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.1 REVISION HISTORY REVISION Rev. 1.0 Rev. 1.1 DESCRIPTION Original. 1.Add Extended temperature : -20℃~85℃ 2.Add order information for lead free product UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 1 Draft Date Aug.13. 2001 Apr. 21. 2003 P80069 UTRON UT62W256C 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.1 FEATURES GENERAL DESCRIPTION The UT62W256C is a 262,144-bit low power CMOS static random access memory organized as 32,768 words by 8 bits. It is fabricated using high performance, high reliability CMOS technology. its standby current is stable within the range of operating temperature. Fast access time : 35/70ns Low power consumption: Operation : 40/20 mA (max.) (VCC≦3.6V) 50/40 mA (max.) (VCC≦5.5V) Standby : -L / -LL version 1 / 0.5uA (typical) VCC=2.7~3.6V 2 / 1uA (typical) VCC=4.5~5.5V Wide Range power supply: 2.7V~5.5V Operating temperature : Commercial temperature : 0℃~70℃ Extended temperature : -20℃~85℃ All inputs and outputs are TTL compatible Fully static operation Three state outputs Data retention voltage : 1.5V (min.) Package : 28-pin 600 mil PDIP 28-pin 330 mil SOP 28-pin 8x13.4mm STSOP The UT62W256C is designed for low power application. It is particularly well suited for battery back-up nonvolatile memory application. The UT62W256C operates with wide range power supply and all inputs and outputs are fully TTL compatible PIN CONFIGURATION FUNCTIONAL BLOCK DIAGRAM DECODER 1 28 2 27 WE A7 3 26 A13 A6 4 A5 5 A4 6 A3 7 A2 8 32K × 8 MEMORY ARRAY Vcc Vss I/O DATA CIRCUIT I/O1-I/O8 COLUMN I/O A1 9 A0 10 UT62W256C A0-A14 Vcc A14 A12 25 A8 24 A9 23 A11 22 OE 21 A10 20 CE 19 I/O8 I/O1 11 18 I/O7 I/O2 12 17 I/O6 I/O3 13 16 I/O5 Vss 14 15 I/O4 PDIP/SOP CE WE CONTROL CIRCUIT OE PIN DESCRIPTION SYMBOL A0 - A14 I/O1 - I/O8 CE WE OE VCC VSS DESCRIPTION Address Inputs Data Inputs/Outputs Chip Enable Input Write Enable Input A10 OE 1 28 A11 2 27 CE A9 3 26 I/O8 A8 4 25 I/O7 A13 5 24 I/O6 WE 6 23 I/O5 Vcc 7 22 I/O4 A14 8 21 Vss A12 9 20 I/O3 A7 10 19 I/O2 A6 11 18 I/O1 A5 12 17 A0 A4 13 16 A1 A3 14 15 A2 Output Enable Input Power Supply Ground UT62W256C STSOP UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 2 P80069 UTRON UT62W256C 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.1 ABSOLUTE MAXIMUM RATINGS* PARAMETER Terminal Voltage with Respect to VSS Commercial Operation Temperature Extended Storage Temperature Power Dissipation DC Output Current Soldering Temperature (under 10 sec) SYMBOL RATING -0.5 to 7.0 0 to 70 -20 to 85 -65 to 150 1 50 260 VTERM TA TA TSTG PD IOUT Tsolder UNIT V ℃ ℃ ℃ W mA ℃ *Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability. TRUTH TABLE MODE Standby Output Disable Read Write Note: CE H L L L OE X H L X I/O OPERATION High - Z High - Z DOUT DIN WE X H H L SUPPLY CURRENT ISB, ISB1 ICC,ICC1,ICC2 ICC,ICC1,ICC2 ICC,ICC1,ICC2 H = VIH, L=VIL, X = Don't care. DC ELECTRICAL CHARACTERISTICS (TA = 0℃ to 70℃ / -20℃ to 85℃(E)) PARAMETER Power Supply Voltage Input High Voltage Input Low Voltage Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage Operation Power Supply Current Standby Power Supply Current SYMBOL TEST CONDITION VCC ＊1 VIH ＊2 VIL ILI VSS ≦VIN ≦VCC VSS ≦VI/O ≦VCC, MIN. TYP. MAX. 2.7~3.6 2.0 VCC+0.5 - 0.5 0.6 -1 1 MIN. TYP. MAX. 4.5~5.5 2.2 VCC+0.5 - 0.5 0.8 -1 1 UNIT V V V µA ILO CE =VIH or OE = VIH or WE = VIL -1 - 1 -1 - 1 µA VOH VOL IOH= - 1mA IOL= 4mA ICC CE = VIL ,II/O = 2.2 - - 0.4 40 2.4 - 40 0.4 50 V V mA - - 20 - 30 40 mA 0mA ,Cycle=Min. - 35 - 70 ICC1 Cycle=1µs CE =0.2V; II/O = 0mA other pins at 0.2V or VCC-0.2V - - 6 - - 10 mA ICC2 Cycle=500ns CE =0.2V ; II/O = 0mA other pins at 0.2V or VCC-0.2V - - 12 - - 20 mA - 3 - 3 mA 1 0.5 40 20 2 1 100 50 µA µA ISB CE =VIH ISB1 CE ≧VCC-0.2V -L -LL - - Notes: 1. Overshoot : Vcc+2.0v for pulse width less than 10ns. 2. Undershoot : Vss-2.0v for pulse width less than 10ns. 3. Overshoot and Undershoot are sampled, not 100% tested. UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 3 P80069 UTRON UT62W256C 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.1 CAPACITANCE (TA=25℃, f=1.0MHz) PARAMETER Input Capacitance Input/Output Capacitance SYMBOL CIN CI/O MIN. MAX 8 10 - UNIT pF pF Note : These parameters are guaranteed by device characterization, but not production tested. AC TEST CONDITIONS Input Pulse Levels Input Rise and Fall Times Input and Output Timing Reference Levels Output Load 0V to 3.0V 5ns 1.5V CL = 100Pf+1TTL, IOH/IOL = -1mA/4mA AC ELECTRICAL CHARACTERISTICS (VCC = 2.7V~5.5V , TA = 0℃ to 70℃ / -20℃ to 85℃(E)) (1) READ CYCLE PARAMETER Read Cycle Time Address Access Time Chip Enable Access Time Output Enable Access Time Chip Enable to Output in Low Z Output Enable to Output in Low Z Chip Disable to Output in High Z Output Disable to Output in High Z Output Hold from Address Change SYMBOL UT62W256C-35 tRC tAA tACE tOE tCLZ* tOLZ* tCHZ* tOHZ* tOH UT62W256C-70 MIN. MAX. MIN. MAX. 35 10 5 5 35 35 25 25 25 - 70 10 5 5 70 70 35 35 35 - UNIT ns ns ns ns ns ns ns ns ns (2) WRITE CYCLE PARAMETER Write Cycle Time Address Valid to End of Write Chip Enable to End of Write Address Set-up Time Write Pulse Width Write Recovery Time Data to Write Time Overlap Data Hold from End of Write Time Output Active from End of Write Write to Output in High Z SYMBOL UT62W256C-35 tWC tAW tCW tAS tWP tWR tDW tDH tOW* tWHZ* UT62W256C-70 MIN. MAX. MIN. MAX. 35 30 30 0 25 0 20 0 5 - 15 70 60 60 0 50 0 30 0 5 - 25 UNIT ns ns ns ns ns ns ns ns ns ns *These parameters are guaranteed by device characterization, but not production tested. UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 4 P80069 UTRON UT62W256C 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.1 TIMING WAVEFORMS READ CYCLE 1 (Address Controlled) (1,2) tRC Address tAA tOH Dout tOH Previous data valid Data Valid READ CYCLE 2 ( CE and OE Controlled) (1,3,4,5) t RC Address tAA CE tACE OE tCHZ tOE tOHZ tCLZ tOLZ Dout t OH High-Z Data Valid High-Z Notes : 1. WE is high for read cycle. 2.Device is continuously selected OE =low, CE =low. 3.Address must be valid prior to or coincident with CE =low,; otherwise tAA is the limiting parameter. 4.tCLZ, tOLZ, tCHZ and tOHZ are specified with CL=5pF. Transition is measured±500mV from steady state. 5.At any given temperature and voltage condition, tCHZ is less than tCLZ, tOHZ is less than tOLZ. UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 5 P80069 UTRON UT62W256C 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.1 WRITE CYCLE 1 ( WE Controlled) (1,2,3,5,6) tW C Address tAW CE t CW t AS tW P tW R WE t W HZ Dout tOW High-Z (4) (4) tDW Din t DH Data Valid WRITE CYCLE 2 ( CE Controlled) (1,2,5,6) tW C A ddress tA W CE tW R tA S tC W tW P WE tW H Z D out H igh-Z (4) tD W D in tD H D ata V alid UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 6 P80069 UTRON UT62W256C 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.1 Notes : 1. WE , CE must be high during all address transitions. 2.A write occurs during the overlap of a low CE , low WE . 3. During a WE controlled write cycle with OE low, tWP must be greater than tWHZ+tDW to allow the drivers to turn off and data to be placed on the bus. 4.During this period, I/O pins are in the output state, and input signals must not be applied. 5. If the CE low transition occurs simultaneously with or after WE low transition, the outputs remain in a high impedance state. 6.tOW and tWHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state. DATA RETENTION CHARACTERISTICS (TA = 0℃ to 70℃ / -20℃ to 85℃(E)) PARAMETER Vcc for Data Retention SYMBOL VDR Data Retention Current Chip Disable to Data Retention Time Recovery Time IDR tCDR TEST CONDITION CE ≧VCC-0.2V Vcc=1.5V CE ≧VCC-0.2V See Data Retention Waveforms (below) -L - LL tR MIN. 1.5 TYP. - MAX. 5.5 UNIT V - 1 0.5 20 10 0 - - µA µA ns tRC* - - ns tRC* = Read Cycle Time DATA RETENTION WAVEFORM Low Vcc Data Retention Waveform ( CE controlled) V DR ≧ 1.5V V CC V cc(min.) V cc(min.) tCDR CE V IH tR CE ≧ V CC -0.2V UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 7 V IH P80069 UTRON UT62W256C 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.1 PACKAGE OUTLINE DIMENSION 28 pin 600 mil PDIP PACKAGE OUTLINE DIMENSION UNIT SYMBOL A1 A2 B c D E e eB L θ INCH(BASE) 0.010(MIN) 0.150±0.001 0.018±0.005 0.010±0.004 1.460±0.005 0.600±0.010 0.100 (TYP) 0.640±0.03 0.130±0.010 o o 0 ~15 MM(REF) 0.254(MIN) 3.810±0.254 0.457±0.127 0.254±0.102 37.084±0.127 15.240±0.254 2.540(TYP) 16.256±0.762 3.302±0.254 o o 0 ~15 UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 8 P80069 UTRON UT62W256C 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.1 28 pin 330 mil SOP PACKAGE OUTLINE DIMENSION UNIT SYMBOL A A1 A2 b c D E E1 e L L1 S y θ INCH(BASE) 0.112 (MAX) 0.004(MIN) 0.098±0.005 0.016 (TYP) 0.010 (TYP) 0.713±0.005 0.331±0.005 0.465±0.012 0.050 (TYP) 0.0404±0.008 0.067±0.008 0.047 (MAX) 0.003(MAX) o o 0 ∼10 MM(REF) 2.845 (MAX) 0.102(MIN) 2.489±0.127 0.406(TYP) 0.254(TYP) 18.110±0.127 8.407±0.127 11.811±0.305 1.270(TYP) 1.0255±0.203 1.702 ±0.203 1.194 (MAX) 0.076(MAX) o o 0 ∼10 UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 9 P80069 UTRON UT62W256C 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.1 28 pin 8x13.4mm STSOP PACKAGE OUTLINE DIMENSION HD cL 28 14 15 E e 1 "A" y Seating Plane D 14 A2 c A 15 A1 0 1 28 UNIT SYMBOL A A1 A2 D E e HD L1 y Θ SEATING PLANE "A" DATAIL VIEW L1 INCH(BASE) MM(REF) 0.047 (MAX) 0.004 ±0.002 0.039 ±0.002 0.465 ±0.004 0.315 ±0.004 0.022 (TYP) 0.528 ±0.008 0.0315 ±0.004 0.003 (MAX) o o 0 ∼5 1.20 (MAX) 0.10 ±0.05 1.00 ±0.05 11.800 ±0.100 8.000 ±0.100 0.55 (TYP) 13.40 ±0.20. 0.80 ±0.10 0.076 (MAX) o o 0 ∼5 UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 10 P80069 UTRON UT62W256C 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.1 ORDERING INFORMATION Commercial temperature : PART NO. ACCESS TIME (ns) UT62W256CPC-35L UT62W256CPC-35LL UT62W256CPC-70L UT62W256CPC-70LL UT62W256CSC-35L UT62W256CSC-35LL UT62W256CSC-70L UT62W256CSC-70LL UT62W256CLS-35L UT62W256CLS-35LL UT62W256CLS-70L UT62W256CLS-70LL 35 35 70 70 35 35 70 70 35 35 70 70 Extended temperature : PART NO. ACCESS TIME (ns) UT62W256CPC-35LE UT62W256CPC-35LLE UT62W256CPC-70LE UT62W256CPC-70LLE UT62W256CSC-35LE UT62W256CSC-35LLE UT62W256CSC-70LE UT62W256CSC-70LLE UT62W256CLS-35LE UT62W256CLS-35LLE UT62W256CLS-70LE UT62W256CLS-70LLE 35 35 70 70 35 35 70 70 35 35 70 70 STANDBY CURRENT (µA) max. 100µA 50µA 100µA 50µA 100µA 50µA 100µA 50µA 100µA 50µA 100µA 50µA STANDBY CURRENT (µA) max. 100µA 50µA 100µA 50µA 100µA 50µA 100µA 50µA 100µA 50µA 100µA 50µA UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 11 PACKAGE 28PIN PDIP 28PIN PDIP 28PIN PDIP 28PIN PDIP 28PIN SOP 28PIN SOP 28PIN SOP 28PIN SOP 28PIN STSOP 28PIN STSOP 28PIN STSOP 28PIN STSOP PACKAGE 28PIN PDIP 28PIN PDIP 28PIN PDIP 28PIN PDIP 28PIN SOP 28PIN SOP 28PIN SOP 28PIN SOP 28PIN STSOP 28PIN STSOP 28PIN STSOP 28PIN STSOP P80069 UTRON UT62W256C 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.1 ORDERING INFORMATION (for lead free product) Commercial temperature : PART NO. ACCESS TIME (ns) UT62W256CPCL-35L UT62W256CPCL-35LL UT62W256CPCL-70L UT62W256CPCL-70LL UT62W256CSCL-35L UT62W256CSCL-35LL UT62W256CSCL-70L UT62W256CSCL-70LL UT62W256CLSL-35L UT62W256CLSL-35LL UT62W256CLSL-70L UT62W256CLSL-70LL Extended temperature : PART NO. UT62W256CPCL-35LE UT62W256CPCL-35LLE UT62W256CPCL-70LE UT62W256CPCL-70LLE UT62W256CSCL-35LE UT62W256CSCL-35LLE UT62W256CSCL-70LE UT62W256CSCL-70LLE UT62W256CLSL-35LE UT62W256CLSL-35LLE UT62W256CLSL-70LE UT62W256CLSL-70LLE 35 35 70 70 35 35 70 70 35 35 70 70 ACCESS TIME (ns) 35 35 70 70 35 35 70 70 35 35 70 70 STANDBY CURRENT (µA) max. 100µA 50µA 100µA 50µA 100µA 50µA 100µA 50µA 100µA 50µA 100µA 50µA STANDBY CURRENT (µA) max. 100µA 50µA 100µA 50µA 100µA 50µA 100µA 50µA 100µA 50µA 100µA 50µA UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 12 PACKAGE 28PIN PDIP 28PIN PDIP 28PIN PDIP 28PIN PDIP 28PIN SOP 28PIN SOP 28PIN SOP 28PIN SOP 28PIN STSOP 28PIN STSOP 28PIN STSOP 28PIN STSOP PACKAGE 28PIN PDIP 28PIN PDIP 28PIN PDIP 28PIN PDIP 28PIN SOP 28PIN SOP 28PIN SOP 28PIN SOP 28PIN STSOP 28PIN STSOP 28PIN STSOP 28PIN STSOP P80069 UTRON Rev. 1.1 UT62W256C 32K X 8 BIT LOW POWER CMOS SRAM THIS PAGE IS LEFT BLANK INTENTIONALLY. UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 13 P80069