STMICROELECTRONICS L9333_01

L9333
QUAD LOW SIDE DRIVER
■
■
■
■
■
■
■
■
■
■
■
WIDE OPERATING SUPPLY VOLTAGE
RANGE FROM 4.5V UP TO 32V FOR
TRANSIENT 45V
VERY LOW STANDBY QUIESCENT
CURRENT TYPICALLY < 2µA
INPUT TO OUTPUT SIGNAL TRANSFER
FUNCTION PROGRAMMABLE
HIGH SIGNAL RANGE FROM -14V UP TO 45V
FOR ALL INPUTS
3.3V CMOS COMPATIBLE INPUTS
DEFINED OUTPUT OFF STATE FOR OPEN
INPUTS
FOUR OPEN DRAIN DMOS OUTPUTS, WITH
RDSon = 1.5Ω FOR VS > 6V AT 25°C
OUTPUT CURRENT LIMITATION
CONTROLLED OUTPUT SLOPE FOR LOW EMI
OVERTEMPERATURE PROTECTION FOR
EACH CHANNEL
INTEGRATED OUTPUT CLAMPING FOR FAST
INDUCTIVE RECIRCULATION VFB > 45V
MULTIPOWER BCD TECHNOLOGY
SO20 (12+4+4)
DIE
ORDERING NUMBERS:
L9333MD
(SO20 12+4+4)
L9333DIE1
(DIE)
■
STATUS MONITORING FOR
- OVERTEMPERATURE
- DISCONNECTED GROUND OR SUPPLY
VOLTAGE
DESCRIPTION
The L9333 is a monolithic integrated quad low side
driver. It is intended to drive lines, lamps or relais in
automotive or industrial applications.
BLOCK DIAGRAM
IN 4
OU T 4
CHANNEL 4
VS
R IN
IN 1
OU T 1
=
&
PR G
TH ER MA L
S H U TD O WN
C H A N N E L1
4
R IN
PR G
D IAG
D IA G N O S TIC
LO G IC
R EN
EN
VS
REF ERE NCE
V int
V lo g ic
G ND
March 2001
1/13
L9333
PIN CONNECTION (Top view)
1
20
PRG
IN2
2
19
OUT1
DIAG
3
18
OUT2
GND
4
17
GND
GND
5
16
GND
GND
6
15
GND
GND
7
14
GND
VS
8
13
OUT3
IN3
9
12
OUT4
IN4
10
11
EN
So 12+4+4
Med. Power
IN1
PIN FUNCTION
Pin
N°
Pin Name
1
IN 1
Input 1
2
IN 2
Input 2
3
DIAG
Diagnostic
4, 5, 6, 7,
14, 15,
16, 17
GND
Ground
8
VS
Supply Voltage
9
IN 3
Input 3
10
IN 4
Input 4
11
EN
Enable
12
OUT4
OUTPUT4
13
OUT 3
OUTPUT 3
18
OUT 2
OUTPUT 2
19
OUT 1
OUTPUT 1
20
PRG
2/13
Description
Programming
L9333
ABSOLUTE MAXIMUM RATINGS
Symbol
VS
dVS/dt
VIN, VEN,
VPRG
Parameter
Value
Unit
Supply voltage DC
Supply voltage Pulse (T = 400ms)
-0.3 to 32
-0.3 to 45
V
V
Supply voltage transient
-10 to +10
V/µs
-14 to 45
V
-0.3 to 45 1)
V
-0.3 to 45
V
Input, Enable, Programming
Pin voltage
VOUT
Output voltage
VDIAG
Diagnostic output voltage
Note 1) : In flyback phase the output voltage can reach 60V.
ESD - PROTECTION
Value
against GND
Unit
Supply pins and signal pins
±2
KV
Output pins
±4
KV
Parameter
Note: Human-Body-Model according to MIL 883C. The device widthstand ST1 class level.
THERMAL DATA
Symbol
Parameter
TJSD
Temperature shutdown threshold
TJSDhys
Temperature shutdown hysteresis
Min
Typ
175
Max
Unit
220
°C
20
K
SO 12+4+4
Rth (j-p)
Thermal resistance junction to pins
15
°C/W
Rth (j-a)
Thermal resistance junction to ambient 2)
50
°C/W
Note 2) : With 6cm2 on board heat sink area.
LIFE TIME
Symbol
Parameter
Condition
tB
useful life time
VS ≤ 14V
EN = low
tb
operating life time
4.5V ≤ VS ≤ 32V
EN = high
Value
Unit
20
years
5000
hours
3/13
L9333
OPERATING RANGE:
Within the operating range the IC operates as described in the circuit description, including the diagnostic table.
Symbol
Parameter
VS
VIN, VEN,
VPRG
Condition
Min
Max
Unit
Supply voltage
4.5
32
V
Input voltage
-14
45
V
-0.3
60
V
VOUT
Output voltage
VDIAG
Diagnostic output voltage
-0.3
45
V
Junction temperature
-40
150
°C
TJ
Voltage will be limited by internal ZDiode clamping
ELECTRICAL CHARACTERISTCS
The electrical characteristics are valid within the defined Operating Conditions, unless otherwise specified.
The function is guaranteed by design until TJSDon switch-on-threshold.
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
<2
10
µA
50
µA
2
3.5
mA
mA
SUPPLY
IQ
Quiescent current
VS ≤ 14V; VEN ≤ 0.3V
Tamb 85 °C
VS ≤ 14V; VEN ≤ 0.3V
Ta 150°C
VS ≤ 14V; EN = high, Output = off
EN = high, Output = on
1
Inputs, IN1 - IN4; Programming, PRG
VINlow
Input voltage LOW
-14
1
V
VINhigh
Input voltage HIGH
2
45
V
50
µA
IIN
Input current
0V ≤ VIN ≤ 45V 3)
-25
RIN
Input impedance
V IN < 0V; VIN > VS
10
60
kΩ
Note 3) : Current direction depends on the programming setting (PRG=high leads into a positive current see also Blockdiagram page 1)
Enable EN
VENlow
Input voltage LOW
-14
1
V
VENhigh
Input voltage HIGH
2
45
V
REN
Input impedance
-14V < VEN < 1.5V
5
IEN
Input current
1.5V < VEN < 45V
5
4/13
kΩ
80
µA
L9333
ELECTRICAL CHARACTERISTCS (continued)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
1.7
3.8
Ω
1
5
µA
25
µA
Outputs OUT1- OUT4
RDSon
Output ON-resistor
VS > 6V, IO = 0.3A
IOLeak
Leakage current
VO = VS = 14V; Ta < 125°C
VO = VS = 14V; Ta < 150°C
VOClamp
IOSC
CO
Output voltage during clamping
EFB ≤ 2mJ; 10 mA < IO < 0.3A
45
52
60
V
Short-circuit current
VS > 6V
400
700
1000
mA
internal output capacities
VO > 4.5V
100
pF
0.8
V
5
15
mA
0.1
1
µA
5
µA
Diagnostic Output DIAG
VDlow
Output voltage LOW
IDL = 0.6mA
IDmax
Max. output current
internal current limitation; VD =
14V
IDLeak
Leakage current
V D = VS = 14 V; Ta < 125 °C
1
VD = VS = 14 V; Ta < 150 °C
Timing Characteristics 4)
td,on
On delay time
VS = 14V
2
3.5
µs
td,off
Off delay time
Cext = 0F; Lext = 0H
3
4.5
µs
tset
Enable settling time
only testing condition
20
µs
ON or OFF Diagnostic delay time
10mA ≤ I0 ≤ 200mA
10
µs
16
V/µs
td,DIAG
Sout
Output voltage slopes
2.5
9
Note : All parameters are measured at 125°C.
Note 4) : See also Fig.3 Timing Characteristics
5/13
L9333
Figure 1. Timing Characteristics
VE N
Active
t
VPR G
Non-Inverting Mode
Inverting Mode
t
V
IN
t
V OUT
VS
0.8 V S
5)
0.2 V S
t
t set
t d,off
t d,on
Note 5) : Output voltage slope not controlled for enable low!
6/13
t set
L9333
FUNCTIONAL DESCRIPTION
The L9333 is a quad low side driver for lines, lamps or inductive loads in automotive and industrial applications.
The logic input levels are 3.3V CMOS compatible. This allows the device to be driven directly by a microcontroller. For the noise immunity, all input thresholds have a hysteresis of typ. 100mV. Each input (IN, EN and
PRG) is protected to withstand voltages from -14V to 45V. The device is activated with a 'high' signal on ENable.
ENable 'low' switches the device into the sleep mode. In this mode the quiescent current is typically less than
2µA. A high signal on PRoGramming input changes the signal transfer polarity from noninverting to the inverting
mode. This pin can be connected either to VS or GND. If these pins are not connected, the forced status of the
PRG and EN pin is low. For packaged applications it is still recommended to connect all input pins to ground
respective VS to avoid EMC influence. The forced condition leads to a mode change if the PRG pin was high
before the interruption. Independent of the PRoGramming input, the OUTput switches off, if the signal INput pin
is not connected. This function is verified using a leakage current of 5µA (sink for PRG=high; source for
PRG=low) during circuit test.
Each output driver has a current limitation of min 0.4A and an independent thermal shut-down. The thermal
shut-down deactivates that output, which exceeds temperature switch off level. When the junction temperature
decreases 20K below this temperature threshold the output will be activated again. This 20K is the hysteresis
of the thermal shutdown function. The Gates, of the output DMOS transistors are charged and discharged with
a current source. Therefore the output slope is limited. This reduces the electromagnetic radiation. For inductive loads an output voltage clamp of typically 52V is implemented.
The DIAGnostic is an open drain output. The logic status depends on the PRoGramming pin. If the PRG pin is
'low' the DIAG output becomes low, if the device works correctly. At thermal shut-down of one channel or if the
ground is disconnected the DIAGnostic output becomes high. If the PRG pin is 'high' this output is switched off
at normal function and switched on at overtemperature. For the fault condition of interrupted ground, the potential of VS and Diagnostic should be equal.
DIAGNOSTIC TABLE
Pins
EN
PRG
IN
OUT
DIAG
H
L
L
L (on)
L (on)
H
L
H
H (off)
L (on)
H
H
L
H (off)
H (off)
H
H
H
L (on)
H (off)
L
X
X
H (off)
H (off)
Overtemperature,
disconnected ground or
supply voltage
H
L
X
H (off) *
H (off)
Overtemperature
H
H
X
H(off) *
L(on)
Normal function
X = not relevant
* selective for each channel at overtemperature
7/13
L9333
Figure 2. Application for Inverting Transfer Polarity
BOARD VOLTAGE 14 V
VCC = 5V or 3.3V
33µF
MICROCONTROLLER
VCC
PRG
INT
VS
M
DIAG
A 0:8
8
Adressdecoder
VCC = 5V
EN
2W
L9333
D0
IN 1
OUT 1
D1
IN 2
OUT 2
D2
IN 3
OUT 3
D3
IN 4
OUT 4
250 mA
240Ω
VCC
IN
50 kHz
GND
GND
12 mH
10µH
50pF
GND
Figure 3. Application for non Inverting Transfer Polarity
BOARD VOLTAGE 14 V
33µF
PRG
VS
DIAG
M
VCC = 5V
EN
L9333
IN 1
OUT 1
IN 2
OUT 2
IN 3
OUT 3
IN 4
2W
12 mH
240Ω
10µH
Note We recommend to use the device for driving inductive loads with flyback energy EFB ≤ 2mJ.
VCC
IN
OUT 4
GND
8/13
250 mA
50pF
GND
L9333
EMC SPECIFICATION
EMS (electromagnetic susceptibility)
Measurement setup:
DUT mounted on a specific application board is driven in a typical application circuit (see below). Two devices
are stimulated by a generator to read and write bus signals. They will be monitored externally to ensure proper
function.
Measurement method:
a)
The two bus lines are transferred 2m under a terminated stripline. That's where they were exposed to the
RF-field. Stripline setup and measurement method is described in DIN 40839-4 or ISO 11452-5.
b)
DUT mounted on the same application board is exposed to RF through the tophole of a TEM-cell. Measurement method according SAE J1752.
c)
The two bus lines are transferred into a BCI current injection probe. Setup and measurement method is
described in ISO 11452-4.
Failure criteria:
Failure monitoring is done by envelope measurement of the logic signals with a LeCroy oscilloscope with acceptance levels of 20% in amplitude and 2% time.
Limits:
The device is measured within the described setup and limits without fail function.
The Electromagnetic Susceptivity is not tested in production.
a) Field strength under stripline of > 250V/m in the frequency range 1 - 400MHz modulation:AM 1kHz 80%.
b) Field strength in TEM-cell of > 500V/m in the frequency range 1 - 400MHz modulation:
AM 1kHz 80%.
c) RF-currents with BCI of > 100mA in the frequency range 1 - 400MHz modulation:
Measured Circuit
AM 1kHz 80%.
The EMS of the device was verified in the below described setup.
9/13
10/13
f
f
f
1kHz
2
500Hz
2
250Hz
2
5
4
17
125Hz 16
7
8
13
U(t)
11
-
+
14V
Flat cable
Stripline
2m
9
5
4
17
16
1
4 ∗ 4.7n
4 ∗ 10kΩ
SM6T39A
SMBYW01-200
33µF
IN4
IN3
IN2
IN1
10nF
VS
GND
10kΩ
4.7nF
OUT4
OUT3
OUT2
OUT1
DIAG
PRG
4.7nF
L9333
EN
4.7nF
10kΩ
Jumper
ANECHOIC CHAMBER
Jumper
20kΩ
4 ∗ 1nF
optional
7
8
13
14
19
optional
4 ∗ 100Ω
11
L9333
Figure 4.
1
9
14
L9333
mm
inch
OUTLINE AND
MECHANICAL DATA
DIM.
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
2.35
2.65
0.093
0.104
A1
0.1
0.3
0.004
0.012
B
0.33
0.51
0.013
0.020
C
0.23
0.32
0.009
0.013
D
12.6
13
0.496
0.512
E
7.4
7.6
0.291
0.299
e
1.27
0.050
H
10
10.65
0.394
0.419
h
0.25
0.75
0.010
0.030
L
0.4
1.27
0.016
0.050
SO20 (12+4+4)
K
0˚ (min.)8˚ (max.)
L
h x 45˚
A
B
e
A1
K
C
H
D
20
11
E
1
0
1
SO20MEC
PAD
11/13
L9333
L9333
12/13
L9333
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
 2001 STMicroelectronics - All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain
- Sweden - Switzerland - United Kingdom - U.S.A.
http://www.st.com
13/13