RF2125 2 HIGH POWER LINEAR AMPLIFIER Typical Applications • PCS Communication Systems • Commercial and Consumer Systems • Digital Communication Systems • Portable Battery Powered Equipment 2 POWER AMPLIFIERS • DECT Cordless Applications Product Description .315 .305 ü GaAs MESFET SiGe HBT Si CMOS RF IN 1 RF IN 2 U pg r ad ed P Si Bi-CMOS GaAs HBT S ee PC 3 BIAS CIRCUIT VCC 4 8 RF OUT 7 RF OUT .017 .013 R F2 12 .050 .004 .000 5P 1 .180 SQ MAX Metal lid and base, gold plated 4°MAX 0°MIN Optimum Technology Matching® Applied Si BJT .057 MAX .166 SQ ro du ct The RF2125 is a high power, high efficiency linear amplifier IC. The device is manufactured on an advanced Gallium Arsenide Heterojunction Bipolar Transistor (HBT) process, and has been designed for use as the final RF amplifier in digital PCS phone transmitters and base stations requiring linear amplification operating between 1500MHz and 2200MHz. It will also function as a high efficiency amplifier for constant envelope applications such as DECT. The device is packaged in an 8-lead ceramic package with a backside ground. The device is self-contained with the exception of the output matching network and power supply feed line. It produces a typical output power level of 1W. .017 .013 .006 .004 Package Style: SOP-8-C Features • Single 2.7V to 7.5V Supply • 1W Output Power • 14dB Gain • 45% Efficiency • Power Down Mode • 1500MHz to 2200MHz Operation 6 RF OUT 5 RF OUT PACKAGE BASE Ordering Information RF2125 RF2125 PCBA High Power Linear Amplifier Fully Assembled Evaluation Board GND Functional Block Diagram Rev A7 010112 RF Micro Devices, Inc. 7625 Thorndike Road Greensboro, NC 27409, USA Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com 2-61 RF2125 Absolute Maximum Ratings Parameter Parameter Rating Unit -0.5 to +7.5 -0.5 to +3.6V 450 +20 20:1 -40 to +100 -40 to +85 -40 to +150 VDC V mA dBm °C °C °C Specification Min. Typ. Max. Caution! ESD sensitive device. RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s). Unit 42 12 Two-tone Specification -25 -30 -35 -45 ad ed P IM3 IM5 IM7 MHz dBm dBm dBm % % % dB dBc dBc dBc dB Power Control 1.5 U pg r VPC PC Current Power Control “OFF” Power Supply voltage Supply Current Power Down Current 0.2 270 3.3 1 2 0.5 2.7 to 7.5 360 0.5 VCC =3.6V, PIN =+17dBm VCC =4.8V, PIN =+17dBm VCC =6.0V, PIN =+17dBm Maximum output, VCC =3.6V Maximum output, VCC =4.8V Maximum output, VCC =6.0V R F2 12 +29.3 1500 to 2200 +28.5 +29.5 +30 45 45 45 14 -40 -45 -35 15 1.5:1 ro du ct Frequency Range Maximum Output Power Maximum Output Power Maximum Output Power Total Power Added Efficiency Total Power Added Efficiency Total Power Added Efficiency Small-signal Gain Second Harmonic Third Harmonic Fourth Harmonic Isolation Input VSWR 5P T=25 °C, VCC =6.0V, VPC =3.5V, ZLOAD =12Ω, PIN = 0dBm, Freq=1885MHz, Idle current=180mA Overall Power Supply Condition 3.5 440 10 VPC =0.2V With external matching network; see application schematic dBc dBc dBc POUT =+23.5dBm for each tone POUT =+24dBm for each tone POUT =+24dBm for each tone V mA mA V To obtain 180mA idle current VPC =2.0V VPC =3.5V Threshold voltage at device input V mA µA POUT =+30dBm, VCC =6.0V VPC =0.2V S ee POWER AMPLIFIERS 2 Supply Voltage (VCC) Power Control Voltage (VPC) DC Supply Current Input RF Power Output Load Operating Case Temperature Operating Ambient Temperature Storage Temperature 2-62 Rev A7 010112 RF2125 Pin 1 Function RF IN 2 3 RF IN PC 4 VCC 5 RF OUT 6 7 8 Pkg Base RF OUT RF OUT RF OUT GND Description Interface Schematic RF input. This input is DC coupled, so an external blocking capacitor is required if this pin is connected to a DC path. An optimum match to 50 Ω is obtained by providing an external series capacitor of 4.3pF and then a shunt capacitor of 3.3pF; see the application schematic. Those values are typical for 1880MHz; other values may be required for other frequencies. Same as pin 1. 2 Same as pin 5. Same as pin 5. ro du ct R F2 12 5P POWER AMPLIFIERS Power control pin. For obtaining maximum performance the voltage on this pin can be used to set correct bias level. In a typical application this is implemented by a feedback loop. The feedback can be based on the actual supply current of the device, i.e., maintaining a fixed current level, or it can be based on the RF output power level to maintain a fixed RF power level (Automatic Level Control loop). A voltage of 0.5V or lower brings the part into power down state. Power supply pin for the bias circuits. External low frequency bypass capacitors should be connected if no other low frequency decoupling is nearby. RF output and bias for the output stage. The power supply for the output transistor needs to be supplied to this pin. This can be done through a quarter wave length microstrip line that is RF grounded at the other end, or through an RF inductor that supports the required DC currents. Optimum load impedance is achieved by providing a shunt capacitor of 3.0pF and a series capacitor of 3.9pF; see the application schematic. Those values are typical for 1880MHz; other values may be required for other frequencies. Since there are several output pins available, which are internally connected, one pin can be used for connecting the bias, another for connecting a (third) harmonic trap filter, and the other pins for the RF output. Same as pin 5. Ground connection. The backside of the package should be connected to the ground plane through a short path, i.e., vias under the device may be required. ad ed P Application Schematic 1880MHz 5.1 pF RF IN 1 8 2 7 3 6 U pg r 3.3 pF 3.9 pF VPD 3.3 pF S ee 100 nF BIAS CIRCUIT 5 4 PACKAGE BASE VCC 100 nF Rev A7 010112 RF OUT 33 nH 100 pF 2-63 RF2125 Evaluation Board Schematic 1880MHz (Download Bill of Materials from www.rfmd.com.) 2 POWER AMPLIFIERS RF IN 50 Ω µstrip J1 C2 5.1 pF C1 3.3 pF P1-3 1 8 2 7 3 C7 1 nF RF OUT 50 Ω µstrip J2 C3 3.3 pF 6 BIAS CIRCUIT 4 C9 100 nF C4 3.9 pF P1 5 C8 1 nF P1-1 L1 33 nH PACKAGE BASE 5P P1-3 P1-1 VCC 2 GND 3 PC C6 100 pF R F2 12 C5 1 µF 1 2125401 Rev A PTI Package ro du ct Evaluation Board Layout 1.5” x 1.0” S ee U pg r ad ed P Board Thickness 0.031”; Board Material FR-4 2-64 Rev A7 010112 RF2125 The data below is valid only under small-signal conditions. The device needs to be biased in Class A, with the output power below the 1-dB compression point. For large signal operation this data may be used as a starting point, but further tuning to optimize performance will be required. Voltage and idle current have only very limited effect on the input and output impedances, hence only one plot is shown, valid for VCC =5 to 7V, and ICC =50 to 250mA. 2 26 POWER AMPLIFIERS RF2125 Gain DB(|S[2,1]|) Vcc=6.5V, Icc=200mA 24 22 DB(GMax) Vcc=6.5V, Icc=200mA 20 Gain (dB) 18 DB(|S[2,1]|) Vcc=5.0V, Icc=50mA 16 14 DB(GMax) Vcc=5.0V, Icc=50mA 12 10 8 5P 6 4 2 1 1.2 1.4 1.6 1.8 2 2.2 2.4 R F2 12 0 2.6 Frequency (GHz) 0. S22 4 2.5 GHz 4. 0 5.0 0.2 10.0 P 4.0 5.0 3.0 2.0 1 1.5 2 2.5 FREQUENCY (GHz) .0 -2 ad ed 0.8 0.6 1.0 -1.0 -37 Swp Min 1GHz S ee -0.8 .4 -0. 6 -0 U pg r -0.2 -36 -3 .0 1 GHz -35 -4. 0 -5.0 0.4 10.0 -10.0 0.2 1 GHz 0 -34 3.0 S12 (dB) S11 DB(|S[1,2]|) ro du ct 2.0 2.5 GHz RF2125 S12 -33 Swp Max 2.5GHz 0. 6 0.8 1.0 RF2125 Input / Output Impedance, Class A bias Rev A7 010112 2-65 S ee U pg r ad ed P ro du ct R F2 12 5P POWER AMPLIFIERS RF2125 2 2-66 Rev A7 010112