www.fairchildsemi.com KM4112 70µA, Low Cost, +2.7V & +5V, 7.3MHz Rail-to-Rail Amplifier ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ General Description 70µA supply current 7.3MHz bandwidth Fully specified at +2.7V and +5V supplies Output voltage range: 0.04V to 4.96V; Vs = +5 Input voltage range: -0.3V to +3.8V; Vs = +5 9V/µs slew rate ±4mA linear output current ±9mA short circuit output current 29nV/√Hz input voltage noise Competes with low power CMOS amps Small package option (SOT23-5) Applications ■ ■ ■ ■ ■ Portable/battery-powered applications A/D buffer Active filters Signal conditioning Portable test instruments KM4112 Package SOT23-5 1 -Vs 2 +In 3 + Out 5 +Vs 4 -In - The KM4112 is an ultra-low power, low cost, voltage feedback amplifier. The KM4112 uses only 70µA of supply current and is designed to operate on +2.7V, +5V, or ±2.5V supplies. The input voltage range extends 300mV below the negative rail and 1.2V below the positive rail. The KM4112 offers high bipolar performance at a low CMOS price. The KM4112 offers superior dynamic performance with a 7.3MHz small signal bandwidth and 9V/µs slew rate. The combination of low power, high bandwidth, and rail-to-rail performance make the KM4112 well suited for battery-powered communication/computing systems. Non-Inverting Freq. Response Vs = +5V Normalized Magnitude (2dB/div) Features G=2 Rf = 10kΩ 0.01 0.1 1 10 Frequency (MHz) REV. 2 July 2001 DATA SHEET KM4112 KM4112 Electrical Characteristics PARAMETERS (Vs = +2.7V, G = 2, RL = 10kΩ to Vs/2, Rf = 10kΩ; unless noted) CONDITIONS Case Temperature Frequency Domain Response -3dB bandwidth TYP MIN & MAX +25°C +25°C UNITS NOTES 1 G = +1, Vo = 0.05Vpp G = +2, Vo < 0.2Vpp G = -1, Vo = 2Vpp 6.5 3 2 3.5 MHz MHz MHz MHz Time Domain Response rise and fall time settling time to 0.1% overshoot slew rate 0.2V step 1V step 1V step, 2V step, G = -1 55 700 7 7 ns ns % V/µs Distortion and Noise Response 2nd harmonic distortion 3rd harmonic distortion THD input voltage noise 1Vpp, 100kHz 1Vpp, 100kHz 1Vpp, 100kHz >10kHz 68 65 63 30 dBc dBc dB nV/√Hz full power bandwidth gain bandwidth product DC Performance input offset voltage average drift input bias current average drift input offset current power supply rejection ratio open loop gain quiescent current Input Characteristics input resistance input capacitance input common mode voltage range common mode rejection ratio Output Characteristics output voltage swing linear output current short circuit output current power supply operating range DC DC, Vcm = 0V to Vs - 1.5 RL = 10kΩ to Vs/2 RL = 2kΩ to Vs/2 1 3 90 100 2.1 63 82 62 >10 1.6 -0.3 to 1.5 95 ±5 100 58 65 95 mV µV/°C nA pA/°C nA dB dB µA 2 2 2 2 68 MΩ pF V dB 2 250 0.035 to 2.665 0.15 to 2.55 0.07 to 2.6 ±4 ±9 2.7 2.5 to 5.5 V V mA mA V 2 2 2 Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. NOTES: 1) For G = +1, Rf = 0. 2) 100% tested at +25°C. Absolute Maximum Ratings supply voltage 0 to +6V maximum junction temperature +175°C storage temperature range -65°C to +150°C lead temperature (10 sec) +260°C operating temperature range (recommended) -40°C to +85°C input voltage range +Vs +0.5V; -Vs -0.5V internal power dissipation see power derating curves 2 Package Thermal Resistance Package θJA 5 lead SOT23 256°C/W REV. 2 July 2001 KM4112 DATA SHEET KM4112 Electrical Characteristics PARAMETERS (Vs = +5V, G = 2, RL = 10kΩ to Vs/2, Rf = 10kΩ; unless noted) CONDITIONS Case Temperature Frequency Domain Response -3dB bandwidth TYP MIN & MAX +25°C +25°C UNITS NOTES 1 G = +1, Vo = 0.05Vpp G = +2, Vo < 0.2Vpp G = -1, Vo = 2Vpp 7.3 3.4 2.5 4 MHz MHz MHz MHz Time Domain Response rise and fall time settling time to 0.1% overshoot slew rate 0.2V step 2V step 2V step, 2V step, G = -1 50 600 4 9 ns ns % V/µs Distortion and Noise Response 2nd harmonic distortion 3rd harmonic distortion THD input voltage noise 2Vpp, 100kHz 2Vpp, 100kHz 2Vpp, 100kHz >10kHz 67 56 55 29 dBc dBc dB nV/√Hz full power bandwidth gain bandwidth product DC Performance input offset voltage average drift input bias current average drift input offset current power supply rejection ratio open loop gain quiescent current Input Characteristics input resistance input capacitance input common mode voltage range common mode rejection ratio Output Characteristics output voltage swing linear output current short circuit output current power supply operating range DC DC, Vcm = 0V to Vs - 1.5 RL = 10kΩ to Vs/2 RL = 2kΩ to Vs/2 1 8 90 100 1.3 63 76 70 >10 1.6 -0.3 to 3.8 97 0.04 to 4.96 0.09 to 4.9 ±4 ±9 5 ±5 100 58 65 100 mV µV/°C nA pA/°C nA dB dB µA 2 2 2 2 68 MΩ pF V dB 2 250 0.15 to 4.85 2.5 to 5.5 V V mA mA V 2 2 2 Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. NOTES: 1) For G = +1, Rf = 0. 2) 100% tested at +25°C. REV. 2 July 2001 3 DATA SHEET KM4112 KM4112 Performance Characteristics (Vs = +5V, G = 2, RL = 10kΩ to Vs/2, Rf = 10kΩ; unless noted) Inverting Frequency Response Vs = +5V Normalized Magnitude (1dB/div) Normalized Magnitude (2dB/div) Non-Inverting Frequency Response Vs = +5V G=1 G=2 G = 10 G=5 0.01 0.1 1 G = -2 G = -10 G = -5 G = -1 0.01 10 0.1 1 10 Non-Inverting Freq. Response Vs = +2.7V Inverting Frequency Response Vs = +2.7V Normalized Magnitude (1dB/div) Frequency (MHz) Normalized Magnitude (2dB/div) Frequency (MHz) G=1 G=2 G = 10 G=5 0.01 0.1 1 G = -1 G = -2 G = -10 G = -5 0.01 10 0.1 Frequency (MHz) 1 10 Frequency (MHz) Large Signal Frequency Response Open Loop Gain & Phase vs. Frequency 0 80 |Gain| Open Loop Gain (dB) 70 Vo = 2Vpp -20 60 -40 50 -60 40 -80 30 -100 20 -120 10 -140 -160 0 Open Loop Phase (deg) Magnitude (1dB/div) Vo = 1Vpp Phase -180 -10 0.01 0.1 1 1 10 10 Frequency (MHz) 100 1k 10k 100k 1M Frequency (Hz) Input Voltage Noise 2nd & 3rd Harmonic Distortion; Vs = +5V 140 -20 120 -30 100 -40 Distortion (dBc) Voltage Noise (nV/√Hz) Vo = 2Vpp 80 60 40 20 0 0.0001 -50 -60 -70 2nd -80 -90 0.001 0.01 0.1 Frequency (MHz) 4 3rd 1.0 10 10 100 1000 Frequency (kHz) REV. 2 July 2001 KM4112 DATA SHEET KM4112 Performance Characteristics (Vs = +5V, G = 2, RL = 10kΩ to Vs/2, Rf = 10kΩ; unless noted) 2nd & 3rd Harmonic Distortion; Vs = +2.7V PSRR 0 -20 Vo = 1Vpp -10 -20 -40 3rd PSRR (dB) Distortion (dBc) -30 -50 -60 2nd -30 -40 -50 -70 -60 -80 -70 -90 -80 10 100 1 1000 Frequency (kHz) 10 100 1k 10k 100k 1M Frequency (Hz) Output Swing vs. RL CMRR 4.95 0 -10 4.90 Output Swing (Vpp) CMRR (dB) -20 -30 4.85 -40 -50 4.80 -60 -70 4.75 -80 -90 4.70 -100 1 10 100 1k 10k 100k 1M Frequency (Hz) 1 10 100 RL (kΩ) Output Voltage (0.5V/div) Large Signal Pulse Response Vs = +5V Time (1µs/div) REV. 2 July 2001 5 DATA SHEET KM4112 The design utilizes a patent pending topology that provides increased slew rate performance. The common mode input range extends to 300mV below ground and to 1.2V below Vs. Exceeding these values will not cause phase reversal. However, if the input voltage exceeds the rails by more than 0.5V, the input ESD devices will begin to conduct. The output will stay at the rail during this overdrive condition. The design uses a Darlington output stage. The output stage is short circuit protected and offers “soft” saturation protection that improves recovery time. The typical circuit schematic is shown in Figure 1. 2.0 Maximum Power Dissipation (W) General Description The KM4112 is a single supply, general purpose, voltagefeedback amplifier fabricated on a complementary bipolar process. The KM4112 offers 7.3MHz unity gain bandwidth, 9V/µs slew rate, and only 70µA supply current. It features a rail-to-rail output stage and is unity gain stable. 1.5 1.0 SOT23-5 lead 0.5 0 -50 -30 -10 10 30 50 70 90 Ambient Temperature ( C) Figure 2: Power Derating Curves Overdrive Recovery For an amplifier, an overdrive condition occurs when the output and/or input ranges are exceeded. The recovery time varies based on whether the input or output is overdriven and by how much the ranges are exceeded. The KM4112 will typically recover in less than 60ns from an overdrive condition. Figure 3 shows the KM4112 in an overdriven condition. +Vs 6.8µF + 0.01µF Out KM4112 - Rf Input Output Input Voltage (0.2V/div) In Output Voltage (1V/div) G=5 + Time (2µs/div) Rg Figure 3: Overdrive Recovery Figure 1: Typical Configuration Power Dissipation The maximum internal power dissipation allowed is directly related to the maximum junction temperature. If the maximum junction temperature exceeds 150°C, some reliability degradation will occur. If the maximum junction temperature exceeds 175°C for an extended time, device failure may occur. Driving Capacitive Loads A small series resistance (Rs) at the output of the amplifier, illustrated in Figure 4, will improve stability and settling performance. + Rs Rf The KM4112 is short circuit protected. However, this may not guarantee that the maximum junction temperature (+150°C) is not exceeded under all conditions. Follow the maximum power derating curves shown in Figure 2 to ensure proper operation. 6 CL RL Rg Figure 4: Typical Topology for driving a capacitive load REV. 2 July 2001 KM4112 DATA SHEET Layout Considerations General layout and supply bypassing play major roles in high frequency performance. Fairchild has evaluation boards to use as a guide for high frequency layout and to aid in device testing and characterization. Follow the steps below as a basis for high frequency layout: The KEB002 evaluation board is built for dual supply operation. Follow these steps to use the board in a single supply application: 1. Short -Vs to ground 2. Use C3 and C4, if the -Vs pin of the KM4112 is not directly connected to the ground plane. Include 6.8µF and 0.01µF ceramic capacitors ■ Place the 6.8µF capacitor within 0.75 inches of the power pin ■ Place the 0.01µF capacitor within 0.1 inches of the power pin ■ Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance ■ Minimize all trace lengths to reduce series inductances ■ Refer to the evaluation board layouts shown in Figure 6 for more information. Evaluation Board Information The following evaluation boards are available to aid in the testing and layout of this device: Eval Board KEB002 Description Products Single Channel, KM4112IT5 Dual Supply 5 & 6 lead SOT23 Evaluation board schematics and layouts are shown in Figure 5 and Figure 6. REV. 2 July 2001 Figure 5: Evaluation Board Schematic 7 DATA SHEET KM4112 KM4112 Evaluation Board Layout Figure 6a: KEB002 (top side) Figure 6b: KEB002 (bottom side) b CL DATUM ’A’ KM4112 Package Dimensions e 2 SOT23-5 CL CL E α e1 C D CL A 8 A2 E1 SYMBOL A A1 A2 b C D E E1 L e e1 α MIN 0.90 0.00 0.90 0.25 0.09 2.80 2.60 1.50 0.35 MAX 1.45 0.15 1.30 0.50 0.20 3.10 3.00 1.75 0.55 0.95 ref 1.90 ref 0 10 NOTE: A1 1. All dimensions are in millimeters. 2 Foot length measured reference to flat foot surface parallel to DATUM ’A’ and lead surface. 3. Package outline exclusive of mold flash & metal burr. 4. Package outline inclusive of solder plating. 5. Comply to EIAJ SC74A. 6. Package ST 0003 REV A supercedes SOT-D-2005 REV C. REV. 2 July 2001 KM4112 DATA SHEET Ordering Information Model Part Number Package Container Pack Qty KM4112 KM4112IT5 SOT23-5 Partial Reel <3000 KM4112 KM4112IT5TR3 SOT23-5 3000 Reel Temperature range for all parts: -40°C to +85°C DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICES TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. www.fairchildsemi.com 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. © 2001 Fairchild Semiconductor Corporation