LTC1314/LTC1315 PCMCIA Switching Matrix with Built-In N-Channel VCC Switch Drivers U DESCRIPTIO FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ Output Current Capability: 120mA External 12V Regulator Can Be Shut Down Built-In N-Channel VCC Switch Drivers Digital Selection of 0V, VCCIN, VPPIN or Hi-Z 3.3V or 5V VCC Supply Break-Before-Make Switching 0.1µA Quiescent Current in Hi-Z or 0V Mode No VPPOUT Overshoot Logic Compatible with Standard PCMCIA Controllers UO APPLICATI ■ ■ ■ ■ ■ S Notebook Computers Palmtop Computers Pen-Based Computers Handi-Terminals Bar-Code Readers The LTC®1314/LTC1315 provide the power switching necessary to control Personal Computer Memory Card International Association (PCMCIA) Release 2.0 card slots. When used in conjunction with a PC card interface controller, these devices form a complete minimum component count interface for palmtop, pen-based and notebook computers. The LTC1314/LTC1315 provide 0V, 3.3V, 5V, 12V and Hi-Z power output for flash VPP programming. A built-in charge pump produces 12V of gate drive for inexpensive N-channel 3.3V/5V VCC switching. The 12V regulator can be shut down when 12V is not required at VPPOUT. All digital inputs are TTL compatible and interface directly with industry standard PC card interface controllers. The LTC1314 is available in 14-pin SO and the LTC1315 in 24-pin SSOP. , LTC and LT are registered trademarks of Linear Technology Corporation. U TYPICAL APPLICATION Linear Technology PCMCIA Product Family Typical PCMCIA Single Slot Driver STEP-UP REGULATOR LT®1301 VOUT SHDN 3.3V OR 5V VIN 12V + COUT 5V PCMCIA CARD SLOT CONTROLLER VPPIN VDD SHDN VPPOUT LTC1314 EN0 EN1 DRV5 VCC0 VCCIN VCC1 DRV3 5V 0.1µF VPP1 VPP2 PCMCIA CARD SLOT VCC + 1µF GND 3.3V LTC1314 • TA01 DEVICE DESCRIPTION PACKAGE LT1312 SINGLE PCMCIA VPP DRIVER/REGULATOR 8-PIN SO LT1313 DUAL PCMCIA VPP DRIVER/REGULATOR 16-PIN SO* LTC®1314 SINGLE PCMCIA SWITCH MATRIX 14-PIN SO LTC1315 DUAL PCMCIA SWITCH MATRIX 24-PIN SSOP LTC1470 PROTECTED VCC 5V/3.3V SWITCH MATRIX 8-PIN SO LTC1472 PROTECTED VCC AND VPP SWITCH MATRIX 16-PIN SO* *NARROW BODY LTC1314 Truth Table EN0 EN1 VCC0 VCC1 VPPOUT DRV3 0 0 X X GND X DRV5 X 0 1 X X VCCIN X X 1 0 X X VPPIN X X 1 1 X X Hi-Z X X X X 1 0 X 1 0 X X 0 1 X 0 1 X X 0 0 X 0 0 X X 1 1 X 0 0 X = DON’T CARE 1 LTC1314/LTC1315 W W W AXI U U ABSOLUTE RATI GS VPPIN to GND ........................................ 13.2V to – 0.3V VDD to GND ................................................. 7V to – 0.3V VCCIN to GND .............................................. 7V to – 0.3V VPPOUT to GND...................................... 13.2V to – 0.3V Digital Input Voltage ................................... 7V to – 0.3V Operating Temperature Range .................... 0°C to 70°C Storage Temperature Range ................ – 65°C to 150°C Lead Temperature (Soldering, 10 sec)................. 300°C U W U PACKAGE/ORDER I FOR ATIO ORDER PART NUMBER TOP VIEW VPPIN 1 NC 2 SHDN 3 14 VCCIN LTC1314CS 13 NC 12 VPPOUT TOP VIEW AVPPIN 1 24 AVCCIN ASHDN 2 23 AVPPOUT AEN0 3 22 GND AEN1 4 21 VDD AVCC0 5 20 ADRV3 AVCC1 6 19 ADRV5 EN0 4 11 GND BVPPIN 7 18 BVCCIN EN1 5 10 VDD BSHDN 8 17 BVPPOUT BEN0 9 16 GND BEN1 10 15 VDD VCC0 6 9 DRV3 VCC1 7 8 DRV5 S PACKAGE 14-LEAD PLASTIC SO TJMAX = 125°C, θJA = 110°C/W BVCC0 11 14 BDRV3 BVCC1 12 13 BDRV5 ORDER PART NUMBER LTC1315CG G PACKAGE 24-LEAD PLASTIC SSOP TJMAX = 125°C, θJA = 95°C/W Consult factory for Industrial and Military grade parts. ELECTRICAL CHARACTERISTICS VDD = 5V, VCCIN = 5V, VPPIN = 12V, TA = 25°C unless otherwise specified. SYMBOL VCCIN VPPIN VDD ICC IPP PARAMETER Input Voltage Range Input Voltage Range Supply Voltage Range VCCIN Supply Current, No Load VPPIN Supply Current, No Load IDD VDD Supply Current, No Load IIN IOUT RON Input Current: EN0, EN1, VCC0 or VCC1 High Impedance Output Leakage Current On Resistance, VPPOUT = VPPIN On Resistance, VPPOUT = VCCIN On Resistance, VPPOUT = GND Input High Voltage, Digital Inputs Input Low Voltage, Digital Inputs VINH VINL 2 CONDITIONS ● ● ● VPPOUT = VPPIN, VCCIN, 0V or Hi-Z VPPOUT = VPPIN, VCCIN VPPOUT = 0V, Hi-Z VPPOUT = VPPIN or VCCIN VPPOUT = 0V or Hi-Z VPPOUT = 0V or Hi-Z, DRV3 or DRV5 On 0V < VIN < VDD EN0 = EN1 = 5V, 0V < VPPOUT < 12V VPPIN = 12V, ILOAD = 120mA VCCIN = 5V, ILOAD = 5mA VDD = 5V, ISINK = 1mA ● ● ● ● ● ● ● ● ● ● ● ● ● LTC1314/LTC1315 MIN TYP MAX 3 5.5 0 12.6 4.5 5.5 0.1 1 15 40 0.1 1 60 120 0.1 10 85 200 ±1 0.1 10 0.55 1.2 2 5 100 250 2 0.8 UNITS V V V µA µA µA µA µA µA µA µA Ω Ω Ω V V LTC1314/LTC1315 ELECTRICAL CHARACTERISTICS SYMBOL VOH VOL VG-VDD tON tOFF t1 t2 t3 t4 t5 t6 t7 PARAMETER SHDN Output High Voltage SHDN Output Low Voltage Gate Voltage Above Supply Turn-On Time, DRV3 and DRV5 Turn-Off Time, DRV3 and DRV5 Delay + Rise Time Delay + Rise Time Delay + Rise Time Delay + Fall Time Delay + Fall Time Delay + Fall Time Output Turn-On Delay VDD = 5V, VCCIN = 5V, VPPIN = 12V, TA = 25°C unless otherwise specified. CONDITIONS VPPOUT = VCCIN, 0V or Hi-Z, ILOAD = 400µA VPPOUT = VPPIN, ISINK = 400µA VDRV3 or VDRV5 CGATE = 1000pF, Time for VGATE > VDD + 1V CGATE = 1000pF, Time for VGATE < 0.5V VPPOUT = GND to VCCIN, VPPIN = 0V, Note 1 VPPOUT = GND to VPPIN (Note 1) VPPOUT = VCCIN to VPPIN (Note 1) VPPOUT = VPPIN to VCCIN (Note 3) VPPOUT = VPPIN to GND (Note 2) VPPOUT = VCCIN to GND, VPPIN = 0V (Note 2) VPPOUT = Hi-Z to VPPIN or VCCIN (Notes 1, 6) The ● denotes specifications which apply over the full operating temperature range. Note 1: To 90% of the final value, COUT = 0.1µF, ROUT = 2.9k. Note 2: To 10% of the final value, COUT = 0.1µF, ROUT = 2.9k. LTC1314/LTC1315 MIN TYP MAX 3.5 0.4 6 7 13 50 150 500 3 10 30 5 15 50 5 15 50 5 15 50 2 6 20 15 50 150 10 25 100 5 15 50 ● ● ● UNITS V V V µs µs µs µs µs µs µs µs µs Note 3: To 50% of the initial value, COUT = 0.1µF, ROUT = 2.9k. Note 4: Measured current data is per channel. Note 5: Input logic low equal to 0V, high equal to 5V. Note 6: VPPIN = 0V when switching from Hi-Z to VCCIN. U W TYPICAL PERFORMANCE CHARACTERISTICS 75 2.7 70 65 VCC SWITCH 2.1 1.8 1.5 1.2 0.9 VPP SWITCH 55 50 45 40 35 0.3 30 30 –10 10 50 TEMPERATURE (°C) 70 90 1314/15 G01 VPPOUT = VPPIN = 12V 60 0.6 0 –50 –30 14.2 DRV3/DRV5 OUTPUT VOLTAGE (V) 3.0 2.4 DRV3/DRV5 Output Voltage vs Temperature Supply Current vs Temperature SUPPLY CURRENT (µA) SWITCH ON RESISTANCE (Ω) Switch On Resistance vs Temperature 25 –50 –30 VPPOUT = VCCIN VPPIN = 12V 30 –10 10 50 TEMPERATURE (°C) 70 90 1314/15 G02 14.0 13.8 13.6 13.4 13.2 13.0 –50 –30 30 50 –10 10 TEMPERATURE (°C) 70 90 1314/15 G03 3 LTC1314/LTC1315 U W TYPICAL PERFORMANCE CHARACTERISTICS IPPIN vs VPPIN IDD vs VDD 20 80 VPPIN = 12V VCCIN = 5V T = 25°C 70 16 40 VPPOUT = VPPIN 14 VPPOUT = VPPIN IPPIN (µA) IDD (µA) 60 50 VDD = VCCIN = 5V T = 25°C 18 VPPOUT = VCCIN 30 12 10 8 6 20 10 0 VPPOUT = VCCIN 4 VPPOUT = 0V OR HI-Z 0 1 2 3 VDD (V) 4 5 VPPOUT = 0V OR HI-Z 2 6 0 0 2 4 8 6 VPPIN (V) 1314/15 G04 10 12 14 1314/15 G05 U U U PIN FUNCTIONS LTC1314 VPPIN (Pin 1): 12V Power Input. NC (Pin 2): Not Connected. SHDN (Pin 3): Shutdown Output. When the output is high, the external 12V regulator can be shut down to conserve power consumption. EN0, EN1 (Pins 4, 5): Logic inputs that control the voltage output on VPPOUT. The input thresholds are compatible with TTL/CMOS levels. Refer to Truth Table. VCC0 (Pin 6): Logic input that controls the state of the MOSFET gate driver DRV3. ESD protection device limits input excursions to 0.6V below ground. VCC1 (Pin 7): Logic input that controls the state of the MOSFET gate driver DRV5. ESD protection device limits input excursions to 0.6V below ground. 4 DRV5, DRV3 (Pins 8, 9): Gate driver outputs that control the external MOSFETs that switch the VCC pin of card slot to Hi-Z, 3.3V, or 5V. VDD (Pin 10): Positive Supply, 4.5V ≤ VDD ≤ 5.5V. This pin supplies the power to the control logic and the charge pumps and must be continuously powered. GND (Pin 11): Ground Connection. VPPOUT (Pin 12): Switched output that provides 0V, 3.3V, 5V, 12V, or Hi-Z to the VPP pin of the card slot. Refer to Truth Table. NC (Pin 13): Not Connected. VCCIN (Pin 14): 5V or 3.3V Power Input. LTC1314/LTC1315 U U U PIN FUNCTIONS LTC1315 VPPIN (Pins 1, 7): 12V Power Inputs. SHDN (Pins 2, 8): Shutdown Outputs. When the output is high, the external 12V regulator can be shut down to conserve power consumption. EN0, EN1 (Pins 3, 4, 9, 10): Logic inputs that control the voltage output on VPPOUT. The input thresholds are compatible with TTL/CMOS levels. Refer to the Truth Table. VCC0 (Pins 5, 11): Logic inputs that control the state of the MOSFET gate driver DRV3. ESD protection device limits input excursions to 0.6V below ground. DRV5, DRV3 (Pins 13, 14, 19, 20): Gate driver outputs that control the external MOSFETs that switch the VCC pin of card slot to Hi-Z, 3.3V, or 5V. VDD (Pins 15, 21): Positive Supplies, 4.5V ≤ VDD ≤ 5.5V. These pins supply the power to the control logic and the charge pumps and must be continuously powered. GND (Pins 16, 22): Ground Connections. VPPOUT (Pins 17, 23): Switched outputs that provide 0V, 3.3V, 5V, 12V, or Hi-Z to the VPP pin of the card slot. Refer to the Truth Table. VCCIN (Pins 18, 24): 5V or 3.3V Power Inputs. VCC1 (Pins 6, 12): Logic inputs that control the state of the MOSFET gate driver DRV5. ESD protection device limits input excursions to 0.6V below ground. W BLOCK DIAGRAM LTC1314 or 1/2 LTC1315 SHDN GATE CHARGE AND DISCHARGE CONTROL LOGIC VPPIN CHARGE PUMP TTL TO CMOS CONVERTER EN0 BREAK-BEFOREMAKE SWITCHES OSCILLATOR AND BIAS TTL TO CMOS CONVERTER EN1 VCCIN GATE CHARGE AND DISCHARGE CONTROL LOGIC VPPIN CHARGE PUMP + GATE CHARGE CONTROL LOGIC 10V VPPOUT – GND VCC0 VCC1 TTL TO CMOS CONVERTER TTL TO CMOS CONVERTER DRV3 GATE CHARGE AND DISCHARGE CONTROL LOGIC OSCILLATOR AND CHARGE PUMP DRV5 OUTPUT SWITCHES LTC1314 • BD 5 LTC1314/LTC1315 U W W SWITCHI G TI E WAVEFOR S EN0 EN1 VPPIN Hi-Z VPPOUT VCCIN GND t3 t1 t6 t4 t5 t7 t2 NOTE: 1µF CAPACITOR CONNECTED ON BOTH VPPIN AND VCCIN PINS AT TIMING TEST LTC1314 • SW U W U U APPLICATIONS INFORMATION PCMCIA VPP control is easily accomplished using the LTC1314 or LTC1315 switching matrix. Two control bits (LTC1314) or four control bits (LTC1315) determine the output voltage and standby/operate mode conditions. Output voltages of 0V, VCCIN (3.3V or 5V), VPPIN, or a high impedance state are available. When either the high impedance or low voltage (0V) conditions are selected, the device switches into “sleep” mode and draws 0.1µA of current from the VDD supply. The LTC1314/LTC1315 are low resistance power MOSFET switching matrices that operate from the computer system main power supply. Device power is obtained from VDD, which is 5V ±0.5V. The gate drives for the NFETs (both internal and external) are derived from internal charge pumps, therefore VPPIN is only required when it’s switched to VPPOUT. Internal break-before-make switches determine the output voltage and device mode. Flash Memory Card VPP Power Considerations PCMCIA compatible flash memory cards require tight regulation of the 12V VPP programming supply to ensure that the internal flash memory circuits are never subjected to damaging conditions. Flash memory circuits are typi- 6 cally rated with an absolute maximum of 13.5V and VPP must be maintained at 12V ±5% under all possible load conditions during erase and program cycles. Undervoltage can decrease specified flash memory reliability and overvoltage can damage the device. VCC Switch Driver and VPP Switch Matrix Figures 1 and 2 show the approach that is very space and power efficient. The LTC1314/LTC1315 used in conjunction with the LT1301 DC/DC converter, provide complete power management for a PCMCIA card slot. The LTC1314/ LTC1315 and LT1301 combination provides a highly efficient, minimal parts count solution. These circuits are especially good for applications that are adding a PCMCIA socket to existing systems that currently have only 5V or 3.3V available. The LTC1314 drives three N-channel (LTC1315 six N-channel) MOSFETs that provide VCC pin power switching. On-chip charge pumps provide the necessary voltage to fully enhance the switches. With the charge pumps onchip, the MOSFET drive is available without the need for a 12V supply. The LTC1314/LTC1315 provide a natural break-before-make action and smooth transitions due to LTC1314/LTC1315 U U W U APPLICATIONS INFORMATION D1 MBRS130LT3 L1 22µH + C1 47µF 5V + VCC SW SELECT SENSE LT1301 SHDN PGND ILIM GND C2 33µF NC C1: AVX TPSD476M016R0150 C2: AVX TPSD336M020R0200 L1: SUMIDA CD75-220K VDD VPPIN VPPOUT LTC1314 SHDN 5V 0.1µF EN0 PCMCIA CONTROLLER EN1 DRV5 VCC0 VCCIN VCC1 PC CARD SOCKET Q1A 1/2 Si9956DY VCC + 1µF Q2A DRV3 GND VPP1 VPP2 LTC1314 • F01 Si9956DY Q2B 3.3V Figure 1. LTC1314 Switch Matrix with the LT1301 Boost Regulator L1 22µH + C1 47µF D1 MBRS130LT3 + VCC SW SELECT SENSE LT1301 SHDN PGND ILIM GND C2 33µF NC C1: AVX TPSD476M016R0150 C2: AVX TPSD336M020R0200 L1: SUMIDA CD75-220K VDD ASHDN BSHDN AVPPIN BVPPIN AVPPOUT 5V AEN0 AEN1 ADRV5 AVCC0 AVCCIN AVCC1 0.1µF Q1A 1/2 Si9956DY CC + 1µF Q2A ADRV3 VPP1 VPP2 PC CARD SOCKET #1 V Si9956DY PCMCIA CONTROLLER Q2B LTC1315 3.3V BVPPOUT 5V BEN0 BEN1 BDRV5 BVCC0 BVCCIN BVCC1 BDRV3 0.1µF Q1B 1/2 Si9956DY VPP1 VPP2 PC CARD SOCKET #2 V CC + 1µF Q3A 1314/15 F02 Si9956DY GND Q3B 3.3V Figure 2. Typical Two-Socket Application Using the LTC1315 and the LT1301 7 LTC1314/LTC1315 U U W U APPLICATIONS INFORMATION the asymmetrical turn-on and turn-off of the MOSFETs. The LT1301 switching regulator is in shutdown mode and consumes only 10µA until the VPP pins require 12V. The VPP switching is accomplished by a combination of the LTC1314/LTC1315 and LT1301. The LT1301 is in shutdown mode to conserve power until the VPP pins require 12V. When the VPP pins require 12V, the LT1301 is activated and the LTC1314/LTC1315’s internal switches route the VPPIN pin to the VPPOUT pin. The LT1301 is capable of delivering 12V at 120mA maintaining high efficiency. The LTC1314/LTC1315’s break-before-make and slope-controlled switching will ensure that the output voltage transition will be smooth, of moderate slope, and without overshoot. This is critical for flash memory products to prevent damaging parts from overshoot and ringing exceeding the 13.5V device limit. 13V TO 20V (MAY BE FROM AUXILLARY WINDING) 10µF LT1121 Supply Bypassing For best results, bypass VCCIN and VPPIN at their inputs with 1µF capacitors. VPPOUT should have a 0.01µF to 0.1µF capacitor for noise reduction and electrostatic discharge (ESD) damage prevention. Larger values of output capacitor will create large current spikes during transitions, requiring larger bypass capacitors on the VCCIN and VPPIN pins. + 121k 1% 200pF ADJ GND SHDN PGND 5V Often systems have an available supply voltage greater than 12V. The LTC1314/LTC1315 can be used in conjunction with an LT1121 linear regulator to supply the PC card socket with all necessary voltages. Figures 3 and 4 show these circuits. The LTC1314/LTC1315 enable the LT1121 linear regulator only when 12V is required at the VPP pins. In all other modes the LT1121 is in shutdown mode and consumes only 16µA. The LT1121 also provides thermal shutdown and current limiting features to protect the socket, the card and the system regulator. VOUT VIN + With Higher Voltage Supplies Available 1µF 56.2k 1% 100k 5V 2N7002 VDD VPPIN VPPOUT LTC1314 SHDN 5V 0.1µF EN0 PCMCIA CONTROLLER EN1 DRV5 VCC0 VCCIN VCC1 DRV3 PC CARD SOCKET Q1A 1/2 Si9956DY VCC + 1µF Q2A GND Si9956DY Q2B 3.3V Figure 3. LTC1314 with the LT1121 Linear Regulator 8 VPP1 VPP2 1314/15 F03 LTC1314/LTC1315 U U W U APPLICATIONS INFORMATION 13V TO 20V (MAY BE FROM AUXILIARY WINDING) (12V) VOUT VIN + 10µF + 200pF LT1121 SHDN PGND 1µF 121k ADJ GND 56.2k 5V VDD ASHDN BSHDN AVPPIN BVPPIN AVPPOUT 5V AEN0 AEN1 ADRV5 AVCC0 AVCCIN AVCC1 VPP1 VPP2 PC CARD SOCKET #1 V 0.1µF Q1A 1/2 Si9956DY CC + 1µF Q2A ADRV3 Si9956DY Q2B LTC1315 PCMCIA CONTROLLER 3.3V VPP1 VPP2 PC CARD SOCKET #2 V BVPPOUT 5V BEN0 BEN1 BDRV5 BVCC0 BVCCIN BVCC1 BDRV3 0.1µF Q1B 1/2 Si9956DY CC + 1µF Q3A 1314/15 F04 Si9956DY GND Q3B 3.3V Figure 4. Typical Two-Socket Application Using the LTC1315 and the LT1121 U TYPICAL APPLICATIONS N Single Slot Interface to CL-PD6710 5V 12V FROM LT1301 VDD VPPIN VPP_PGM EN0 VPP_VCC EN1 CIRRUS LOGIC CL-PD6710 VPPOUT 5V LTC1314 DRV5 VCC _5 VCC0 VCC _3 VCC1 VCCIN DRV3 GND NOTE: CL-PD6710 HAS ACTIVE-LOW VCC DRIVE 0.1µF 1/2 Si9956DY OR 1/2 MMDF3N02HD PCMCIA CARD SLOT VCC + Si9956DY OR MMDF3N02HD VPP1 VPP2 1µF LTC1314 • TA02 3.3V 9 LTC1314/LTC1315 U TYPICAL APPLICATIONS N Dual Slot Interface to CL-PD6720 12V 5V VPPIN AVPPOUT VDD AEN0 AEN1 BEN0 BEN1 A_VPP_PGM A_VPP_VCC B_VPP_PGM B_VPP_VCC 5V 1/2 Si9956DY ADRV5 AVCCIN + ADRV3 CIRRUS LOGIC CL-PD6720 VPP1 VPP2 PCMCIA CARD SLOT #1 VCC 0.1µF 1µF Si9956DY LTC1315 A_VCC_5 A_VCC_3 B_VCC_5 B_VCC_3 3.3V AVCC0 AVCC1 BVCC0 BVCC1 BVPPOUT 5V VPP1 VPP2 PCMCIA CARD SLOT #2 VCC 0.1µF 1/2 Si9956DY BDRV5 BVCCIN + BDRV3 1µF LTC1315 • TA02 Si9956DY GND 3.3V NOTE: CL-PD6720 HAS ACTIVE-LOW VCC DRIVE Single Slot Interface to “365” Type Controller A_VPP_EN0 A_VPP_EN1 5V 12V FROM LT1301 VDD VPPIN EN0 EN1 “365” TYPE CONTROLLER VPPOUT 5V LTC1314 DRV5 A_VCC _EN0 VCC1 A_VCC _EN1 VCC0 VCCIN DRV3 GND NOTE: “365” TYPE CONTROLLERS HAVE ACTIVE-HIGH VCC DRIVE 10 0.1µF 1/2 Si9956DY OR 1/2 MMDF3N02HD PCMCIA CARD SLOT VCC + Si9956DY OR MMDF3N02HD 3.3V VPP1 VPP2 1µF LTC1314 • TA03 LTC1314/LTC1315 U TYPICAL APPLICATIONS N Dual Slot Interfae to “365” Type Controller 12V 5V VPPIN AVPPOUT VDD AEN0 AEN1 BEN0 BEN1 A_VPP_EN0 A_VPP_EN1 B_VPP_EN0 B_VPP_EN1 5V 1/2 Si9956DY ADRV5 AVCCIN + ADRV3 “365” TYPE CONTROLLER VPP1 VPP2 PCMCIA CARD SLOT #1 VCC 0.1µF 1µF Si9956DY LTC1315 A_VCC_EN0 A_VCC_EN1 B_VCC_EN0 B_VCC_EN1 3.3V AVCC1 AVCC0 BVCC1 BVCC0 BVPPOUT 5V VPP1 VPP2 PCMCIA CARD SLOT #2 VCC 0.1µF 1/2 Si9956DY BDRV5 BVCCIN + BDRV3 1µF LTC1315 • TA03 Si9956DY GND 3.3V NOTE: “365” TYPE CONTROLLERS HAVE ACTIVE-HIGH VCC DRIVE Typical PCMCIA Dual Slot Driver 3.3V OR 5V VIN 12V STEP-UP REGULATOR LT1301 VOUT + SHDN COUT BVPPIN AVPPIN ASHDN BSHDN AVPPOUT 5V VDD VDD AEN0 AEN1 PCMCIA CARD SLOT CONTROLLER 5V 0.1µF PCMCIA CARD SLOT VCC #1 ADRV5 AVCC0 AVCCIN AVCC1 ADRV3 LTC1315 Truth Table VPP1 VPP2 + 1µF LTC1315 3.3V BVPP OUT BEN0 BEN1 5V 0.1µF BDRV5 BVCC0 BVCCIN BVCC1 BDRV3 VPP1 VPP2 PCMCIA CARD SLOT #2 V EN0 EN1 VCC0 VCC1 VPPOUT DRV3 0 0 X X GND X DRV5 X 0 1 X X VCCIN X X 1 0 X X VPPIN X X 1 1 X X Hi-Z X X X X 1 0 X 1 0 X X 0 1 X 0 1 X X 0 0 X 0 0 X X 1 1 X 0 0 X = DON’T CARE CC + 1µF LTC1315 • TA01 GND 3.3V Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 11 LTC1314/LTC1315 U PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted. G Package 24-Lead Plastic SSOP 0.318 – 0.328* (8.04 – 8.33) 24 23 22 21 20 19 18 17 16 15 14 13 0.301 – 0.311 (7.65 – 7.90) 1 2 3 4 5 6 7 8 9 10 11 12 0.205 – 0.212* (5.20 – 5.38) 0.068 – 0.078 (1.73 – 1.99) 0° – 8° 0.005 – 0.009 (0.13 – 0.22) 0.0256 (0.65) BSC 0.022 – 0.037 (0.55 – 0.95) *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006 INCH (0.15mm). 0.002 – 0.008 (0.05 – 0.21) 0.010 – 0.015 (0.25 – 0.38) 24SSOP 0694 S Package 14-Lead Plastic SOIC 0.337 – 0.344* (8.560 – 8.738) 14 13 12 11 10 9 8 0.228 – 0.244 (5.791 – 6.197) 0.150 – 0.157* (3.810 – 3.988) 1 0.010 – 0.020 × 45° (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 2 3 4 5 6 7 0.053 – 0.069 (1.346 – 1.752) 0.004 – 0.010 (0.101 – 0.254) 0° – 8° TYP 0.016 – 0.050 0.406 – 1.270 0.014 – 0.019 (0.355 – 0.483) 0.050 (1.270) TYP SO14 0294 *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006 INCH (0.15mm). RELATED PARTS See PCMCIA Product Family table on the first page of this data sheet. 12 Linear Technology Corporation LT/GP 0195 10K • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7487 (408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977 LINEAR TECHNOLOGY CORPORATION 1995