Circuit Note CN-0285 Devices Connected/Referenced Circuits from the Lab™ reference circuits are engineered and tested for quick and easy system integration to help solve today’s analog, mixed-signal, and RF design challenges. For more information and/or support, visit www.analog.com/CN0285. ADF4351 Fractional-N PLL IC with Integrated VCO ADL5375 Wideband Transmit Modulator ADP150 Low Noise 3.3 V LDO ADP3334 Low Noise Adjustable LDO Broadband Low Error Vector Magnitude (EVM) Direct Conversion Transmitter EVALUATION AND DESIGN SUPPORT CIRCUIT FUNCTION AND BENEFITS Circuit Evaluation Boards CN-0285 Evaluation Board (EVAL-CN0285-EB1Z) Design and Integration Files Schematics, Layout Files, Bill of Materials This circuit is a complete implementation of the analog portion of a broadband direct conversion transmitter (analog baseband in, RF out). RF frequencies from 500 MHz to 4.4 GHz are supported using a phase-locked loop (PLL) with a broadband, integrated voltage controlled oscillator (VCO). Harmonic filtering of the local oscillator (LO) from the PLL ensures excellent quadrature accuracy, sideband suppression, and low EVM. ADP150 5.5V ADP3334 5.5V 1µF 1µF 1µF 1µF 3.3V 5.0V VVCO VDD 16 17 VVCO 28 10 DVDD AVDD I/Q SMA INPUTS 26 4 6 32 CE PDB RF VP SDV DD VPS1, VPS2 ADL5375 IBBP 1nF 1nF FREF IN 29 REF IN 51Ω RFOUTB+ 14 VVCO IBBN RFOUTB– 15 1 CLK 2 DATA ZBIAS ZBIAS LOIP RFOUTA+ 12 ADF4351 22 RSET LOIN RFOUTA– 13 4.7kΩ QUADRATURE PHASE SPLITTER RFOUT VTUNE 20 1kΩ QBBP CPOUT 7 47nF 2.7nF SW 5 CPGND SDGND AGND AGNDVCO 8 31 9 11 18 21 QBBN 680pF 360Ω DGND 27 I/Q SMA INPUTS 10921-001 SPI-COMPATIBLE SERIAL BUS 3 LE Figure 1. Direct Conversion Transmitter (Simplified Schematic: All Connections and Decoupling Not Shown) Rev. 0 Circuits from the Lab™ circuits from Analog Devices have been designed and built by Analog Devices engineers. Standard engineering practices have been employed in the design and construction of each circuit, and their function and performance have been tested and verified in a lab environment at room temperature. However, you are solely responsible for testing the circuit and determining its suitability and applicability for your use and application. Accordingly, in no event shall Analog Devices be liable for direct, indirect, special, incidental, consequential or punitive damages due to any cause whatsoever connected to the use of any Circuits from the Lab circuits. (Continued on last page) One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2013 Analog Devices, Inc. All rights reserved. Circuit Note 10921-002 CN-0285 Figure 2. Evaluation Board for CN-0285 Direct Conversion Transmitter Low noise, low dropout regulators (LDOs) ensure that the power management scheme has no adverse impact on phase noise and EVM. This combination of components represents industryleading direct conversion transmitter performance over a frequency range of 500 MHz to 4.4 GHz CIRCUIT DESCRIPTION The circuit shown in Figure 1 uses the ADF4351, a fully integrated fractional-N PLL IC, and the ADL5375 wideband transmit modulator. The ADF4351 provides the LO signal for the ADL5375 transmit quadrature modulator, which upconverts analog I/Q signals to RF. Taken together, the two devices provide a wideband, baseband IQ-to-RF transmit solution. The ADF4351 is powered off the ultralow noise 3.3 V ADP150 regulator for optimal LO phase noise performance. The ADL5375 is powered off a 5 V ADP3334 LDO. The ADP150 LDO has an output voltage noise of only 9 µV rms and helps to optimize VCO phase noise and reduce the impact of VCO pushing (equivalent to power supply rejection). Filtering is required on the ADF4351 RF outputs to attenuate harmonic levels to minimize errors in the quadrature generation block of the ADL5375. From measurement and simulation, the odd-order harmonics contribute more than even-order harmonics to quadrature error and, if attenuated to below −30 dBc, results in sideband suppression performance of −40 dBc or better. The second harmonic (2H) and third harmonic (3H) levels of the ADF4351 are as given in the data sheet and shown in Table 1. To get the third harmonic below −30 dBc, approximately 20 dB of attenuation is required. Table 1. ADF4351 RF Output Harmonic Levels Unfiltered Harmonic Content Second Third Second Third Value (dBc) −19 −13 −20 −10 Description Fundamental VCO output Fundamental VCO output Divided VCO output Divided VCO output This circuit gives four different filter options to cover four different bands. The filters were designed with a 100 Ω differential input (ADF4351 RF outputs with appropriate matching) and a 50 Ω differential output (ADL5375 LOIN differential impedance). A Chebyshev response was used for optimal filter roll-off at the expense of increased pass-band ripple. The filter schematic is shown in Figure 3. This topology allows the use of either a fully differential filter to minimize component count, a single-ended filter for each output, or a combination of the two. It was determined that for higher frequencies (>2 GHz) two single-ended filters gave the best performance because the series inductor values are twice the value compared to a fully differential filter and, hence, the impact of component parasitics is reduced. For lower frequencies (<2 GHz), a fully differential filter provides adequate results. Table 2. ADF4351 RF Output Filter Component Values (DNI = Do Not Insert) Frequency Range (MHz) 500 to 1300 (Filter Type A) 850 to 2450 (Filter Type B) 1250 to 2800 (Filter Type C) 2800 to 4400 (Filter Type D) ZBIAS 27 nH||50 Ω 19 nH||(100 Ω in Position C1c) 50 Ω 3.9 nH L1 (nH) 3.9 2.7 0Ω 0Ω Rev. 0 | Page 2 of 5 L2 (nH) 3.9 2.7 3.6 0Ω C1a (pF) DNI 3.3 DNI DNI C1c (pF) 4.7 100 Ω DNI DNI C2a (pF) DNI 4.7 2.2 DNI C2c (pF) 5.6 DNI DNI DNI C3a (pF) DNI 3.3 1.5 DNI C3c (pF) 3.3 DNI DNI DNI Circuit Note CN-0285 The ADF4351 output match consists of the ZBIAS pull-up and, to a lesser extent, the decoupling capacitors on the supply node. To get a broadband match, it is recommended to use either a resistive load (ZBIAS = 50 Ω) or a resistive in parallel with a reactive load for ZBIAS. The latter gives slightly higher output power, depending on the inductor chosen. Note that it is possible to place the parallel resistor as a differential component (that is, 100 Ω) in Position C1c to minimize board space (see Filter Type B, Table 2). Q MAGNITUDE ERROR (I/Q ERROR PHASE) ERROR VECTOR MEASURED SIGNAL PHASE ERROR (I/Q ERROR PHASE) 0 I Figure 5. EVM Plot 3.3V A sweep of sideband suppression vs. frequency is shown in Figure 4 for the circuit using Filter Type B (800 MHz to 2400 MHz). In this sweep, the test conditions were the following: 120pF 120pF 0.1µF C1a C2a L1 RFOUTA+ 12 L2 C1c ZBIAS C2c L1 RFOUTA– 13 L2 C1a ADF4351 C2a C3a • 1nF 3 LOIP • C3c 1nF 4 C3a LOIN 10921-003 ZBIAS ADL5375 Figure 3. ADF4351 RF Output Filter Schematic As can be seen from Table 2, at frequencies lower than 1250 MHz, a fifth-order filter is required. For 1.25 GHz to2.8 GHz, third-order filtering is sufficient. For frequencies more than 2.8 GHz, filtering is not required because the harmonic levels are sufficiently low to meet the sideband suppression specifications. –20 5dBm FILTER B: 850MHz TO 2450MHz SIDEBAND SUPPRESSION (dBc) –25 –30 –35 EVM measurements are given in Table 3 comparing the results with and without the filter. In this case, the baseband I/Q signals were generated using 3GPP Test Model 4 using a Rohde & Schwarz AMIQ I/Q modulation generator with differential I and Q analog outputs. Filter Type B was also used. A block diagram of the test setup for the EVM is shown in Figure 6. For comparative purposes, the ADF4350 is also measured. Lower EVM due to in-band PLL noise improvements on the ADF4351 can be seen in Table 3. Other contributing factors to the EVM improvement are the lower phase frequency detector (PFD) spurious levels on the ADF4351. –45 –50 –55 –60 1200 1400 1600 1800 2000 CARRIER FREQUENCY (MHz) 2200 2400 10921-004 –65 1000 Baseband I/Q amplitude = 1 V p-p differential sine waves in quadrature with a 500 mV (ADL5375-05) dc bias Baseband I/Q frequency (fBB) = 1 MHz. EVM is a measure of the quality of the performance of a digital transmitter or receiver and is a measure of the deviation of the actual constellation points from their ideal locations, due to both magnitude and phase errors (see Figure 5). –40 –70 800 IDEAL SIGNAL (REFERENCE) 10921-005 Design the filter with a cutoff approximately 1.2 times to 1.5 times the highest frequency in the band of interest. This cutoff allows margin in the design, because typically the cutoff is lower than designed due to parasitics. The effect of printed circuit board (PCB) parasitics can be simulated in an electromagnetic (EM) simulation tool for improved accuracy. Figure 4. Sideband Suppression for Filter Type B, 850 MHz to 2450 MHz Rev. 0 | Page 3 of 5 CN-0285 Circuit Note Table 3. Single-Carrier W-CDMA Composite EVM Results Comparing Filter vs. No Filter on ADF4351 RF Outputs (Measured As Per 3GPP Specification Test Model 4) Frequency (MHz) ADF4350 Composite EVM No LO Filtering ADF4350 Composite EVM with LO Filtering, Filter B ADF4351 Composite EVM with LO Filtering, Filter B 2140 3.27% 1.31% 1.02% 1800 900 1.46% 10.01% 1.13% 1.03% 0.95% 0.96% COMMON VARIATIONS R&S AMIQ GEN. I+ I– Q+ It is possible to use the auxiliary outputs on the ADF4351 to switch between two filter types where wideband operation beyond that possible with one single filter is required (see Figure 8). An RF double-pole, 4-throw switch (DP4T) is used to select the differential outputs of either Filter 1 or Filter 2. SPECTRUM ANALYZER [R&S FSQ 8] Q– CN-0285 EVALUATION BOARD RF OUT 1nF RFOUTA+ 12 5.5V FILTER 1 3 LOIP 4 LOIN 1nF RFOUTA– 13 DP4T SWITCH 10921-006 RFOUTB+ 14 FILTER 2 RFOUTB– 15 Figure 6. EVM Measurement Setup (Simplified Diagram) In addition to the improvement in sideband suppression and EVM, there is also a performance benefit to driving the ADL5375 LO inputs differentially. This benefit improves modulator output IP2 performance by 2 dB to 5 dB, compared with single-ended LO drive. Note that most external VCOs only come with a singleended output, so using the differential outputs on the ADF4351 provides a benefit over an external VCO in this case. Figure 7 shows sideband suppression results using an 850 MHz to 2450 MHz filter (Filter Type B). Figure 8. Application Diagram Showing Possibility of Filter Switching Using the ADF4351 Main and Auxiliary Outputs CIRCUIT EVALUATION AND TEST The EVAL-CN0285-EB1Z evaluation board contains the circuit described in CN-0285, allowing for the quick setup and evaluation of the performance of the circuit. The control software for the EVAL-CN0285-EB1Z uses the standard ADF4351 programming software located on the CD that accompanies the evaluation board. The following equipment is needed: –30 SIDEBAND SUPPRESSION (dBc) ADL5375 Equipment Needed –20 • –40 • • • • • –50 –60 –4dBm –1dBm +2dBm +5dBm –70 –80 1000 1200 1400 1600 1800 2000 CARRIER FREQUENCY (MHz) 2200 2400 A standard PC running Windows® XP, Windows Vista (32bit), or Windows 7 with a USB port The EVAL-CN0285-EB1Z circuit evaluation board The ADF435x programming software 5.5 V power supplies An I-Q signal source, such as the Rohde & Schwarz AMIQ A spectrum analyzer, such as the Rohde & Schwarz FSQ8 For additional details, see the UG-521 User Guide, the ADF4351 data sheet, and the ADL5375 data sheet. 10921-007 –90 800 ADF4351 10921-008 POWER SUPPLY Figure 7. Sideband Suppression Results for 850 MHz to 2450 MHz Filter Type B A complete design support package for this circuit note can be found at http://www.analog.com/CN0285-DesignSupport. Rev. 0 | Page 4 of 5 Circuit Note CN-0285 Getting Started Data Sheets and Evaluation Boards See the UG-521 User Guide for software installation and test setup. The user guide also includes the block diagram, the application schematic, the bill of materials, and the layout and assembly information. In addition, see the ADF4351 data sheet and the ADL5375 data sheet for additional details. ADF4351 Data Sheet Functional Block Diagram ADP150 Data Sheet See Figure 1 and Figure 6 in this document, and also see the UG-521 User Guide. ADP3334 Data Sheet ADF4351 Evaluation Board ADL5375 Data Sheet ADL5375 Evaluation Board REVISION HISTORY Setup and Test After setting up the equipment, use standard RF test methods to measure the sideband suppression of the circuit. 2/13—Revision 0: Initial Version LEARN MORE CN0285 Design Support Package: http://www.analog.com/CN0285-DesignSupport ADIsimPLL Design Tool ADIsimPower Design Tool ADIsimRF Design Tool AN-0996 Application Note. The Advantages of Using a Quadrature Digital Upconverter (QDUC) in Point-to-Point Microwave Transmit Systems. Analog Devices. AN-1039 Application Note. Correcting Imperfections in IQ Modulators to Improve RF Signal Fidelity. Analog Devices. (Continued from first page) Circuits from the Lab circuits are intended only for use with Analog Devices products and are the intellectual property of Analog Devices or its licensors. While you may use the Circuits from the Lab circuits in the design of your product, no other license is granted by implication or otherwise under any patents or other intellectual property by application or use of the Circuits from the Lab circuits. Information furnished by Analog Devices is believed to be accurate and reliable. However, Circuits from the Lab circuits are supplied "as is" and without warranties of any kind, express, implied, or statutory including, but not limited to, any implied warranty of merchantability, noninfringement or fitness for a particular purpose and no responsibility is assumed by Analog Devices for their use, nor for any infringements of patents or other rights of third parties that may result from their use. Analog Devices reserves the right to change any Circuits from the Lab circuits at any time without notice but is under no obligation to do so. ©2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. CN10921-0-2/13(0) Rev. 0 | Page 5 of 5