IRF IR2127

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Data Sheet No. PD-6.036D
IR2127
CURRENT SENSING SINGLE CHANNEL DRIVER
Features
Product Summary
n Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
n Gate drive supply range from 10 to 20V
n Undervoltage lockout
n 5V Schmitt-triggered input logic
n FAULT lead indicates shutdown has occured
n Output in phase with input
VOFFSET
600V max.
IO+/-
200 mA / 420 mA
VOUT
10 - 20V
VCSth
250 mV
ton/off (typ.)
150 & 100 ns
Description
The IR2127 is a high voltage, high speed power
MOSFET and IGBT driver. Proprietary HVIC and
latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is
compatible with standard CMOS or LSTTL outputs.
The protection circuity detects over-current in the
driven power transistor and terminates the gate
drive voltage. An open drain FAULT signal is provided to indicate that an over-current shutdown has
occurred. The output driver features a high pulse
current buffer stage designed for minimum crossconduction. The floating channel can be used to
drive an N-channel power MOSFET or IGBT in the
high side or low side configuration which operates
up to 600 volts.
Packages
Typical Connection
V CC
IN
FAULT
VCC
VB
IN
HO
FAULT
CS
COM
To Order
VS
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IR2127
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions.
Symbol
Parameter
Definition
Value
Min.
Max.
VB
High Side Floating Supply Voltage
-0.3
625
VS
High Side Floating Offset Voltage
VB - 25
VB + 0.3
VHO
High Side Floating Output Voltage
VS - 0.3
VB + 0.3
VCC
Logic Supply Voltage
-0.3
25
VIN
Logic Input Voltage
-0.3
VCC + 0.3
VFLT
FAULT Output Voltage
-0.3
VCC + 0.3
VCS
Current Sense Voltage
VS - 0.3
VB + 0.3
dVs/dt
Allowable Offset Supply Voltage Transient
PD
Package Power Dissipation @ TA ≤ +25°C
RθJA
Thermal Resistance, Junction to Ambient
—
50
(8 Lead DIP)
—
1.0
(8 Lead SOIC)
—
0.625
(8 Lead DIP)
—
125
(8 Lead SOIC)
—
200
TJ
Junction Temperature
—
150
TS
Storage Temperature
-55
150
TL
Lead Temperature (Soldering, 10 seconds)
—
300
Units
V
V/ns
W
°C/W
°C
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential.
Symbol
Parameter
Definition
Value
Min.
Max.
VB
High Side Floating Supply Voltage
VS + 10
VS + 20
VS
High Side Floating Offset Voltage
Note 1
600
VHO
High Side Floating Output Voltage
VS
VB
VCC
Logic Supply Voltage
VIN
Logic Input Voltage
11.8
20
0
VCC
VFLT
FAULT Output Voltage
0
VCC
VCS
Current Sense Signal Voltage
VS
VS + 5
Ambient Temperature
-40
125
TA
Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS.
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Units
V
°C
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IR2127
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15V, CL = 1000 pF and TA = 25°C unless otherwise specified. The dynamic electrical characteristics
are measured using the test circuit shown in Figure 3.
Symbol
Parameter
Definition
Value
Min. Typ. Max. Units Test Conditions
ton
Turn-On Propagation Delay
—
150
200
VS = 0V
toff
Turn-Off Propagation Delay
—
100
150
VS = 600V
tr
Turn-On Rise Time
—
80
120
tf
Turn-Off Fall Time
—
40
60
900
t bl
Start-Up Blanking Time
500
750
t cs
CS Shutdown Propagation Delay
—
240
360
tflt
CS to FAULT Pull-Up Propagation Delay
—
340
510
ns
Static Electrical Characteristics
VBIAS (VCC, VBS) = 15V and TA = 25°C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to
COM. The VO and IO parameters are referenced to VS .
Symbol
Parameter
Definition
VIH
Logic “1” Input Voltage
VIL
Logic “0” Input Voltage
VCSTH+
CS Input Positive Going Threshold
Value
Min. Typ. Max. Units Test Conditions
2.7
—
—
V
VCC = 10V to 20V
—
—
0.8
VCC = 10V to 20V
180
250
320
VCC = 10V to 20V
VOH
High Level Output Voltage, VBIAS - VO
—
—
100
mV
IO = 0A
VOL
Low Level Output Voltage, VO
—
—
100
IO = 0A
I LK
Offset Supply Leakage Current
—
—
50
VB = VS = 600V
IQBS
Quiescent VBS Supply Current
—
150
300
VIN = 0V or 5V
IQCC
Quiescent VCC Supply Current
—
60
120
IIN+
Logic “1” Input Bias Current
—
7.0
15
VIN = 0V or 5V
µA
VIN = 5V
IIN-
Logic “0” Input Bias Current
—
—
1.0
VIN = 0V
ICS+
“High” CS Bias Current
—
—
1.0
VCS = 3V
I CS-
“High” CS Bias Current
—
—
1.0
VCS = 0V
VBSUV+
VBS Supply Undervoltage Positive Going
Threshold
8.8
10.3
11.8
VBSUV-
VBS Supply Undervoltage Negative Going
Threshold
7.5
9.0
10.6
I O+
Output High Short Circuit Pulsed Current
200
250
—
IO-
Output Low Short Circuit Pulsed Current
420
500
—
To Order
V
mA
VO = 0V, VIN = 5V
PW ≤ 10 µs
VO = 15V, VIN = 0V
PW ≤ 10 µs
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IR2127
Functional Block Diagram
VB
VCC
UV
DETECT
UP
SHIFTERS
HV
LEVEL
SHIFT
PULSE
FILTER
R
Q
BUFFER
R
HO
S
IN
PULSE
GEN
VB
VS
DELAY
PULSE
GEN
FAULT
Q
R
S
PULSE
FILTER
Q
DOWN
SHIFTER
R
S
COM
Lead Definitions
Lead
Symbol Description
VCC
IN
FAULT
COM
VB
HO
VS
CS
Logic and gate drive supply
Logic input for gate driver output (HO), in phase with HO
Indicates over-current shutdown has occurred, negative logic
Logic ground
High side floating supply
High side gate drive output
High side floating supply return
Current sense input to current sense comparator
Lead Assignments
8 Lead DIP
SO-8
IR2127
IR2127S
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+
CS
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IR2127
Device Information
Process & Design Rule
Transistor Count
Die Size
Die Outline
Thickness of Gate Oxide
Connections
First
Layer
Second
Layer
Contact Hole Dimension
Insulation Layer
Passivation
Method of Saw
Method of Die Bond
Wire Bond
Leadframe
Package
HVDCMOS 4.0 µm
206
77 X 85 X 26 (mil)
Material
Width
Spacing
Thickness
Material
Width
Spacing
Thickness
Material
Thickness
Material
Thickness
Method
Material
Material
Die Area
Lead Plating
Types
Materials
800Å
Poly Silicon
4 µm
6 µm
5000Å
Al - Si (Si: 1.0% ±0.1%)
6 µm
7 µm
20,000Å
8 µm X 8 µm
PSG (SiO2)
1.5 µm
PSG (SiO2)
1.5 µm
Full Cut
Ablebond 84 - 1
Thermo Sonic
Au (1.0 mil / 1.3 mil)
Cu
Ag
Pb : Sn (37 : 63)
8 Lead PDIP / SO-8
EME6300 / MP150 / MP190
Remarks:
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B-127
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IR2127
IN
CS
50%
50%
IN
FAULT
ton
tr
toff
90%
HO
HO
Figure 1. Input/Output Timing Diagram
tf
90%
10%
10%
Figure 2. Switching Time Waveform Definition
50%
IN
tbl
CS
VCSTH
CS
90%
t cs
HO
HO
90%
FAULT
Figure 3. Start-up Blanking Time Waveform Definitions
Figure 4. CS Shutdown Waveform Definitions
VCSTH
CS
tflt
FAULT
90%
Figure 5. CS to FAULT Waveform Definitions
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